KR0172020B1 - Resin-sealed semiconductor device - Google Patents

Abstract

The IC chip is mounted on an island and connected to the lead of the lead frame by a TAB lead supported by a sus panda and the whole is encapsulated with a plastic material for package formation. The distance between the top face of the island and the bottom face of the sus panda, the distance between the top face of the sus panda and the top face of the package and the distance between the bottom face of the island and the bottom face of the package are substantially equal to each other.

Description

Plastic Encapsulation Semiconductor Device in TAB System

1 (a) and 1 (b) are a plan view and a cross-sectional view of a conventional plastic encapsulation semiconductor device, each of which is not encapsulated.

2 (a) and 2 (b) are a plan view and a sectional view of the plastic encapsulation semiconductor device of the TAB system of the first embodiment of the present invention, respectively, in which the encapsulation is not performed.

3 (a) and 3 (b) are a plan view and a sectional view of the plastic encapsulation semiconductor device of the TAB system of the second embodiment of the present invention, respectively, in which the encapsulation is not performed.

* Explanation of symbols for main parts of the drawings

1: Lead frame lead 1a: Internal lead part

1b: External lead portion 2: Ireland

3: Sus Panda 4: TAB Lead

4a: inner lead portion 4b: outer lead portion

5: IC chip 6: Mounting material

7: encapsulation resin

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plastic encapsulated semiconductor device, and more particularly, to a semiconductor device in which a lead frame having an internal lead connected to an IC chip and an IC chip by tape automatic bonding (TAB) technology is sealed by plastic molding.

Conventional plastic encapsulation semiconductor devices are fabricated by die-bonding IC chips to islands of the lead frame, connecting the bond pads of the IC chips to the internal leads of the lead frame by wire bonding, and then sealing them by plastic molding. have.

However, some problems arise in this conventional fabrication system when the number of bond pads is increased and when the pad pitch is reduced to improve the function and scale of the IC chip. As the above problems,

(1) Due to the reduction of the pad pitch, the capillary or wedge of the wiring coupling portion comes into contact with the wiring which is already connected, and as a result, reliable coupling becomes difficult.

(2) The time required for bonding is increased in proportion to the increase in the number of pads.

In this situation, a package system for connecting an IC chip and a lead frame using a TAB has been developed and put into practical use.

In the plastic encapsulation semiconductor device of the TAB system, the IC chip is die-bonded on the island of the lead frame by the die mount material, and the electrode terminal of the IC chip is connected to the TAB lead supported by the suspender of the tape carrier. It connects to the lead of the lead frame arrange | positioned at the outer peripheral part of a package by this. That is, the inner lead portion of the TAB lead is connected to the electrode terminal of the IC chip, and the outer lead portion is connected to the inner lead of the lead frame. Except for the external lead portion of the lead frame, the entire semiconductor device is sealed by plastic molding.

With such a package system, the coupling of the internal leads to the IC chip can be done together by the coupling mechanism, and the above-mentioned package system can be narrowed because it can eliminate the pores of the bonder or the interference between the wedge and the wiring. Pitch can achieve IC chip of many pins. In addition, since the number of electrode pads does not increase the number of coupling stems, the efficiency for the wire-coupling system increases with the increase in the number of pads.

It is an object of the present invention to improve a plastic encapsulated semiconductor device using TAB, in particular to protect component parts such as islands, sus pandas and IC chips from displacement in a package by balancing the resin flow in the plastic encapsulation step. It is for.

According to the present invention for achieving the above object, in the plastic encapsulation semiconductor device, the IC chip is provided on an island of the lead frame, and the internal lead portion and the external lead portion of the TAB lead supported by the suspender are each IC chip. Is connected to the inner lead portion of the lead frame and is sealed by mold plastic. In addition, the plastic encapsulation semiconductor device is characterized in that the distance Hm measured from the upper surface of the island to the lower surface of the sus Panda is substantially the same as the distance Hu measured from the upper surface of the sus panda to the upper surface of the molded plastic.

Preferably, the distance Hm measured from the top face of the island to the bottom face of the sus panda is substantially equal to the distance H1 measured from the bottom face of the island to the bottom face of the mold plastic.

In addition, the width Ws and depth Ls of the sus panther are formed substantially equal to the width W1 and depth L1 of the island.

According to the invention, (1) the distance Hm measured from the top surface of the island to the bottom surface of the sus panda is substantially the same as the distance Hu measured from the top surface of the sus panda to the top surface of the mold plastic, (2) The distance Hm measured from the top face of the island to the bottom face of the sus panda is substantially equal to the distance H1 measured from the bottom face of the island to the bottom face of the molded plastic.

After all, during the transfer molding the cross-sectional areas of the three flow paths of resin formed between (1) the metal die and the island, (2) the island and the sus panda, and (3) the sus panda's metal die are substantially the same as each other. The resistance of these pathways to resin flow is the same. Thus, the resin injected from the gate into the holes of the metal die flows through these passages at the same flow rate. As a result, since there is no pressure difference between the sus panda or the island up and down, the displacement of the sus panda or the island is suppressed.

In addition, since the width Ws and the depth L1 of the sus Panda are substantially the same as the width W1 and the depth L1 of the islands, respectively, it is possible to increase the area of the island, thereby reducing the thermal resistance of the package.

The above objects, features and advantages of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings.

Before describing an embodiment of the present invention, a conventional plastic encapsulation semiconductor device of a TAB system will be described.

As shown in FIG. 1 (a) and FIG. 1 (b), the IC chip 5 is die-coupled onto the island 2 of the lead frame through the mounting material 6, and the IC chip 5 The electrode terminal of is connected to the lead 1 of the lead frame arranged in the outer peripheral part of the package by the TAB lead 4 supported by the sus Panda 3 of the tape carrier. That is, the inner lead portion 4a of the TAB lead 4 is connected to the electrode terminal of the IC chip 5, and its outer lead portion is connected to the inner lead portion of the lead frame. This structure except for the outer lead portion 1b of the lead frame is sealed by the encapsulation plastic 7.

According to this packaging system, the internal lead coupling to the IC chip can be performed together by a coupling mechanism, which makes it possible to eliminate the small pores of the bonder or the interference between the wedge and the wiring, so that the packaging system is a narrow pad of many pins. A pitch IC chip can be achieved. In addition, even if the number of electrode pads is increased, there is no increase in the number of coupling steps, so that the efficiency with respect to the wiring coupling system is increased as the number of pads is increased.

In the conventional plastic encapsulation semiconductor device of the TAB system, no specific consideration is taken regarding the positional relationship between the island 2 and the sus Panda 3 in the package. Therefore, in the conventional plastic encapsulation semiconductor device, the distance H1 between the bottom surface of the package and the bottom surface of the island, the distance Hm between the top surface of the island and the bottom surface of the sus panda, and the distance between the top surface of the sus panda and the top surface of the package The relationship between Hu is HmHuH1 as shown in FIG. 1 (b).

In the above plastic encapsulated semiconductor device of the TAB system, the various parts in the package are arranged without particular consideration of positional balance. Thus, in the transfer molding step for encapsulating the package in plastic, the resin flow is not constant and the island and / or sus panda may be displaced. The displacement mechanism of these parts will be described.

In the transfer molding step, for example, the resin injected into the hole of the metal die from right to left in FIG. 1 (b) is (1) between the metal die and the island, (2) between the island and the sus panda, and ( 3) Fill the hole as it flows through the path between the sus panda and the metal die to the left of the hole. However, since the islands and sus pandas are arranged in the relation HmHuH1, the passage 2 has the least resistance to resin flow, and the resin flow rate in this passage is maximum and the flow rate in the narrowest passage 1 is minimal. It becomes Differences in the resin flow rates between the islands or sus pandas above and below cause pressure differentials between them, causing the islands and / or sus pandas to be displaced vertically during resin injection.

This displacement of the island and / or sus panda can cause the following problems.

A) A short circuit may be generated between adjacent TAB leads 4 or between the TAB leads and the IC chip.

B) The island 2, sus panda 3, and / or TAB lid 4 may be exposed to the resin encapsulation surface. If not exposed, the resin encapsulation thickness in these portions can be reduced.

C) The shrinkage of the resin after sealing the package becomes inconsistent and the IC chip is subjected to bending stress.

D) The package may be rolled out and the coplanarity of the external leads may be degraded.

In addition, if the island is likely to be displaced, since the island is large, it is impossible to reduce the thermal resistance of the semiconductor because the island is large in size.

Now, embodiments of the present invention will be described with reference to FIGS. 2 (a) and 2 (b).

In FIGS. 2 (a) and 2 (b), reference numeral 1 denotes a lead separated by cutting from the lead frame, and each lead 1 is connected to an internal lead portion 1a in the package. It consists of the external lead part 1b which is outside of a package. The reference numeral 2 denotes an island supported by the frame part of the lead frame by the support pin 2a, and the reference numeral 3 denotes an annular sus panda of polyimide separated from the tape carrier. Reference numeral 4 in the drawing denotes a TAB lead supported by the sus Panda 3. Each TAB lead 4 is composed of an inner lead portion 4a inside the annular sus Panda 3 and an outer lead portion 4b outside the sus Panda 3. The reference numeral 5 denotes an IC chip mounted on the island 2 through a mounting material 6 such as an Ag paste, and the reference numeral 7 denotes an encapsulating resin encapsulating the entire package by transfer molding. Indicates. The external configuration of the encapsulating resin is shown in dashed lines. That is, reference numerals 8 and 9 denote upper and lower surfaces of the package, respectively. A number of leads are provided on each side of the encapsulation resin, but these are omitted from the central portion of each side for simplicity of explanation.

In this embodiment, the distance H1 between the bottom face of the package 9 and the bottom face of the island 9, the distance Hm between the top face of the island 2 and the bottom face of the suspan 3, and the sus panda 3. The distance Hu between the top face of the top face and the top face of the package 8 is shown in FIG.

Is in a relationship.

This equation (1) adjusts the lengths of the inner lead portion 4a and the outer lead portion 4b of the TAB lead 4, and at the time of the inner coupling and the outer coupling of the TAB lead 4, It can be satisfied by adjusting the height to set the dimple length D of the island 2.

During the transfer molding step of the fabrication of the package, the lead frame on which the IC chip 5 is mounted lies between the upper metal die and the lower metal die, so that the IC chip 5 is substantially at the center of the hole created by the upper and lower metal dies. Is placed. Subsequently, the resin is injected into the hole by an over-and-under gate system in which the resin is injected simultaneously into the upper part of the lead frame and the lower part of the lead frame.

According to the relationship of Hm ≒ Hu, the flow resistance of the passage between the upper surface of the island 2 and the lower surface of the sus Panda 3, and between the upper surface of the sus Panda 3 and the upper surface of the package is a resin encapsulation step. Balance is maintained. Thus, the resin flow up and down the sus panda 3 becomes constant during the resin encapsulation step, and eventually the displacement of the sus panda 3 is limited. Further, according to the relationship of Hm_H1, the displacement of the island 2 is limited for a similar reason as described above. As a result, a short circuit between adjacent TAB leads 4 and / or between the TAB leads 4 and the IC chip 5 is prevented. In addition, since the resin uniformly fills the pores, the shrinkage of the resin after the sealing step becomes constant so that the IC chip 5 is not affected by the bending stress. In addition, the curling of the package is reduced, thereby improving the coplanarity of the outer leads of the package, and in particular, it is possible to prevent defects that occur when the package is installed on the surface of a thin quad flat package (GFP) or the like.

A second embodiment of the present invention will be described with reference to FIGS. 3 (a) and 3 (b). In Figs. 3 (a) and 3 (b), parts corresponding to those shown in Figs. 2 (a) and 2 (b) are the same as those used in the first embodiment without detailed description thereof. Reference numerals in the drawings are given together. In the second embodiment, the distance H1 between the bottom surface of the package and the bottom surface of the island 2, the distance Hm between the top surface of the island 2 and the bottom surface of the suspan 3, and of the sus panda 3. The distance Hu between the top face and the top face of the package was made substantially the same as in the case of the first embodiment.

In addition, in the second embodiment, the following equation is provided between the width W1 and the depth L1 of the island 92 and between the width Ws and the depth Ls of the sus Panda 4. That is, W1 ≒ Ws and

L1 ≒ Ls

By the above formula, the uniformity of the resin flow during the resin encapsulation step is further improved as compared with the first embodiment, and the effect of the first embodiment is further improved by the second embodiment. In addition, the area of the island 2 can be increased, which in turn improves the thermal radiation of the plastic encapsulated semiconductor device. That is, the thermal resistance of this embodiment can be reduced to 29 ° C., which is considerably lower than 49 ° C. of conventional plastic encapsulated semiconductor devices.

As described above, according to the present invention, during the plastic encapsulation step, the plastic material uniformly fills the three spaces of the holes created by the metal die, namely the top of the sus panda, between the sus panda and the island, and the bottom of the island, Any displacement of the sus Panda and the island in the hole is prevented. Therefore, according to the present invention, it is possible to prevent the occurrence of a short circuit between adjacent TAB leads and / or between the TAB leads and the IC chip. In addition, after the plastic encapsulation, the IC chip is not affected by the bending stress and the package is prevented from curling. Thus, the coplanarity of the package is substantially improved during the formation of the outer leads. In addition, the island, sus panda and / or TAB leads are never exposed to the plastic encapsulation, and if not exposed, the plastic encapsulation thickness at these portions is reduced. Thus, product yield and reliability are improved. In addition, the island area is increased to reduce the thermal resistance of the plastic encapsulated semiconductor device.

While the invention has been described above in connection with specific embodiments, such descriptions should not be construed in a limited sense. Those skilled in the art with respect to the description of the present invention will appreciate that various modifications may be made to the described embodiments. Accordingly, the appended claims are intended to cover any modifications or embodiments falling within the scope of the invention.

Claims (5)

A sus panda support TAB lead having a lead frame, an IC chip mounted on an island of the lead frame, and an inner lead portion connected to an electrode of the IC chip and an outer lead portion connected to an inner lead portion of the rad frame; And a plastic encapsulation semiconductor device all encapsulated by a plastic material for package formation, wherein a distance from an upper surface of the island to a lower surface of the sus panda is equal to a distance from an upper surface of the sus panda to an upper surface of the package. A plastic encapsulation semiconductor device, characterized by substantially the same. The plastic encapsulation semiconductor device of claim 1, wherein a distance from an upper surface of the island to a lower surface of the sus panda is substantially equal to a distance from a lower surface of the island to a lower surface of the package. The plastic encapsulation semiconductor device according to claim 1, wherein the width and depth of the sus Panda are substantially the same as the width and depth of the island, respectively. Islands having an upper surface and a lower surface, each of the plurality of leads of the lead frame radially arranged around the islands, the inner leads being on the side of the islands and the outer leads located on opposite sides of the islands; A semiconductor element mounted on an upper surface of the semiconductor element having a plurality of electrodes on its surface, each of which is connected to an internal lead portion connected to the other of the electrode of the semiconductor element and the other of the lead portion of the lead of the lead frame A plurality of TAB leads having an outer lead portion, an annular sus panda that surrounds the semiconductor element and supports the TAB leads so that the distance between adjacent leads of the TAB leads is constant, and the islands and the leads having upper and lower surfaces The inner lead portion of the lead of the frame, the semiconductor element, the TAB lead and A plastic encapsulation semiconductor device comprising a plastic encapsulation package encapsulating a gas panda, comprising: a distance between the bottom surface of the package and the bottom surface of the island, a distance between the top surface of the island and the bottom surface of the suspanda; And a distance between an upper surface of the sus panda and an upper surface of the package is substantially equal to each other. The method according to claim 4, wherein the sus panda and the island are each rectangular in shape, the width of the sus panda and the island is substantially the same, the depth of the sus panda and the island are substantially the same. Plastic encapsulation semiconductor device.