KR0156206B1 - Storage capacitor forming method and structure of liquid crystal display element - Google Patents
Storage capacitor forming method and structure of liquid crystal display elementInfo
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- KR0156206B1 KR0156206B1 KR1019950012103A KR19950012103A KR0156206B1 KR 0156206 B1 KR0156206 B1 KR 0156206B1 KR 1019950012103 A KR1019950012103 A KR 1019950012103A KR 19950012103 A KR19950012103 A KR 19950012103A KR 0156206 B1 KR0156206 B1 KR 0156206B1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Power Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 액정표시소자의 스토리지 커패시터 형성 방법 및 구조에 관한 것으로, 특히 단위셀마다 화소전극과 게이트라인에 의해 형성되는 스토리지 커패시터의 용량을 증대시키는데 적당하도록 한 액정표시소자의 스토리지 커패시터 형성방법 및 구조에 관한 것이다.The present invention relates to a method and a structure for forming a storage capacitor of a liquid crystal display device, and more particularly, to a method and a structure for forming a storage capacitor of a liquid crystal display device suitable for increasing the capacity of a storage capacitor formed by a pixel electrode and a gate line per unit cell. It is about.
이를 위한 본 발명의 액정표시소자의 스토리지 커패시터 형성방법은 절연기판위에 복수개의 게이트 배선과 이에 직교하는 복수개의 데이터 배선 및 각 화소영역에 화소전극을 가지는 액정표시소자의 제조공정에 있어서, 기판위에 게이트전극을 갖는 복수개의 게이트 라인을 형성하고 전면에 게이트절연막을 형성하는 공정, 박막트랜지스터를 형성할 상기 게이트전극 상측에 활성층과 오믹접촉층을 형성하는 공정, 박막트랜지스터 형성영역에 소오스/드레인전극을 형성함과 동시에 이웃하는 게이트절연막위에 선택적으로 제1금속층을 형성하는 공정과, 상기 드레인전극과 제1금속층상에 접촉홀을 갖는 보호막을 형성하는 공정, 접촉홀을 통해 드레인전극과 제1금속층에 연결되도록 화소영역에 화소전극을 형성하는 공정을 포함하여 이루어짐을 그 특징으로 하고, 본 발명의 액정표시소자의 스토리지 커패시터 구조는 기판위에 복수개의 게이트라인, 게이트 절연막 및 보호막위에 화소전극을 가지는 액정표시소자의 제조에 있어서, 상기 게이트 절연막위에 선택적으로 제1금속층이 형성되고, 상기 제1금속층위에 접촉홀을 갖는 보호막이 형성되고, 상기 제1금속층과 화소영역에 화소전극이 형성됨을 특징으로 한다.The storage capacitor forming method of the liquid crystal display device of the present invention for this purpose in the manufacturing process of the liquid crystal display device having a plurality of gate wirings on the insulating substrate, a plurality of data wirings orthogonal thereto and pixel electrodes in each pixel region, the gate on the substrate Forming a plurality of gate lines with electrodes and forming a gate insulating film on the entire surface; forming an active layer and an ohmic contact layer on the gate electrode to form a thin film transistor; forming a source / drain electrode in the thin film transistor formation region. Simultaneously forming a first metal layer on a neighboring gate insulating film, forming a protective film having contact holes on the drain electrode and the first metal layer, and connecting the drain electrode and the first metal layer through contact holes. And forming a pixel electrode in the pixel region if possible. The storage capacitor structure of the liquid crystal display device of the present invention is a liquid crystal display device having a plurality of gate lines, a gate insulating film and a pixel electrode on a protective film on a substrate, wherein a first metal layer is selectively formed on the gate insulating film. The passivation layer having contact holes is formed on the first metal layer, and a pixel electrode is formed on the first metal layer and the pixel region.
Description
제1도는 종래의 액정표시소자의 스토리지 커패시터 레이아웃도.1 is a layout diagram of a storage capacitor of a conventional liquid crystal display device.
제2도는 제1도의 A-A' 선상에 따른 공정 단면도.FIG. 2 is a cross sectional view of the process taken along line AA ′ of FIG. 1.
제3도는 본 발명의 제1실시예 액정표시소자의 스토리지 커패시터 레이아웃도.3 is a layout diagram of a storage capacitor of a liquid crystal display device according to a first embodiment of the present invention.
제4도는 제3도의 A-A' 선상에 따른 공정 단면도.4 is a cross-sectional view of the process taken along line AA ′ of FIG. 3.
제5도는 보너 발명의 제2실시예 액정표시소자의 스토리지 커패시터 레이아웃도.5 is a layout diagram of a storage capacitor of a liquid crystal display device according to a second embodiment of the Bonner invention.
제6도는 제5도의 A-A' 선상에 따른 공정단면도.6 is a cross-sectional view taken along line A-A 'of FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
41 : 기판 42 : 게이트 전극41 substrate 42 gate electrode
42a : 게이트 라인 42a' : 스토리지 라인42a: gate line 42a ': storage line
43 : 게이트 절연막 44 : 활성충43: gate insulating film 44: active charge
45 : 도핑층 46a, 46b : 소오스/드레인 전극45 doped layer 46a, 46b source / drain electrode
46c : 제1금속층 47 : 보호막46c: first metal layer 47: protective film
47a : 접촉홀 47b : 쓰루홀47a: contact hole 47b: through hole
48 : 화소전극48: pixel electrode
본 발명은 액정표시소자의 스토리지 커패시터 형성방법 및 구조에 관한 것으로, 특히 단위셀마다 선택적으로 화소전극 영역에 형성되는 스트리지 커패시터(storage capacitor)의 용량을 증대시키는데 적당하도록 한 액정표시소자의 스토리지 커패시터 형성방법 및 구조에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and a structure for forming a storage capacitor of a liquid crystal display device. In particular, the storage capacitor of the liquid crystal display device is adapted to increase the capacity of a storage capacitor selectively formed in the pixel electrode region for each unit cell. It relates to a formation method and a structure.
종래 액정표시소자의 스토리지 커패시터 형성방법 및 구조를 첨부된 도면을 참조하여 설명하면 다음과 같다.Hereinafter, a storage capacitor forming method and a structure of a conventional liquid crystal display device will be described with reference to the accompanying drawings.
제1도는 종래의 액정표시소자의 스토리지 커패시터 레이아웃도이고, 제2도는 제1도의 A-A' 선상에 따른 공정 단면도를 나타낸 것으로써, 제2도 (a)에서 와 같이 투명 절연기판(21)위에 게이트전극(22)으로 돌출부를 갖는 복수개 게이트라인(22a)을 증착 형성하고, 상기 전면에 게이트 절연막(23)막과 활성층인 비정질 실리콘층 및 오믹콘택을 위한 도핑층을 증착시킨 뒤 상기 게이트전극(22) 상측의 트랜지스터 형성영역에만 남도록 활성층(24)과 도핑층(25)을 패터닝한다.FIG. 1 is a layout diagram of a storage capacitor of a conventional liquid crystal display device, and FIG. 2 is a process cross-sectional view taken along line AA ′ of FIG. 1, and the gate is disposed on the transparent insulating substrate 21 as shown in FIG. A plurality of gate lines 22a having protrusions are formed on the electrode 22, a gate insulating film 23, an amorphous silicon layer as an active layer, and a doping layer for ohmic contact are deposited on the entire surface, and then the gate electrode 22. The active layer 24 and the doped layer 25 are patterned so as to remain only in the upper transistor formation region.
이어서 제2도(b)에서와 같이 상기 전면에 금속층을 증착하고, 패터닝하여 소오스전극(26a)으로 돌출부를 갖는 복수개의 데이터라인을 상기 게이트라인(22a)과 수직한 방향으로 형성한다.Subsequently, as shown in FIG. 2B, a metal layer is deposited on the entire surface and patterned to form a plurality of data lines having protrusions with the source electrode 26a in a direction perpendicular to the gate line 22a.
이때 드레인전극(26b)은 소오스전극과 대향되는 화소영역에 형성된다.In this case, the drain electrode 26b is formed in the pixel region opposite to the source electrode.
이어서, 트랜지스터의 채널을 만들기 위해 채널부의 도핑층은 소오스/드레인 전극(26a)(26b)을 이용하여 패터닝 해낸 다음 제2도(c)에서와 같이 트랜지스터를 보호하기 위한 보호막(27)을 형성한다.Subsequently, the doping layer of the channel portion is patterned using source / drain electrodes 26a and 26b to form a channel of the transistor, and then forms a protective film 27 to protect the transistor as shown in FIG. .
그 다음, 상기 보호막(27)위에 화소전극을 형성하기 전에 상기 드레인전극(26b)과 화소전극이 전기적으로 접촉되기 위해 드레인을 감싸는 보호막에 접촉홀(contact hole)(27a)을 형성한다.Next, before forming the pixel electrode on the passivation layer 27, a contact hole 27a is formed in the passivation layer surrounding the drain to electrically contact the drain electrode 26b and the pixel electrode.
이어서, 제2도(d)에서와 같이 화소를 형성하기 위한 투명금속을 증착 및 패터닝하여 화소영역내에 화소전극(28)을 형성한다.Subsequently, as illustrated in FIG. 2D, the transparent metal for forming the pixel is deposited and patterned to form the pixel electrode 28 in the pixel region.
이때, 상기 접촉홀(27a)을 통해 드레인 전극(26b)과 화소전극(28)이 접촉되며, 이웃한 게이트라인(22a)과 화소전극(28)이 오버랩(over lap)되도록 패터닝하여 스토리지 커패시터를 형성한다.In this case, the drain electrode 26b and the pixel electrode 28 contact with each other through the contact hole 27a, and the storage capacitor is patterned so that the neighboring gate line 22a and the pixel electrode 28 overlap with each other. Form.
즉, 화소전극(28)과 이웃한 게이트라인(22a)사이에 유전체가 형성된 커패시터를 형성한다.That is, a capacitor having a dielectric formed between the pixel electrode 28 and the adjacent gate line 22a is formed.
상기와 같이 형성된 종래의 액정표시소자의 스토리지 커패시터 동작은 다음과 같다.The storage capacitor operation of the conventional liquid crystal display device formed as described above is as follows.
게이트라인에 게이트 구동신호를 인가하면 박막트랜지스터가 턴온되어 데이터라인에 인가된 데이터신호가 화소전극에 인가되어 액정을 구동하게 된다.When the gate driving signal is applied to the gate line, the thin film transistor is turned on so that the data signal applied to the data line is applied to the pixel electrode to drive the liquid crystal.
이때, 화소전극에 인가된 데이터신호가 스토리지 커패시터에 유기되어 박막트랜지스터가 턴오프되더라도 일정시간 액정을 구동하게 된다.In this case, the data signal applied to the pixel electrode is induced in the storage capacitor to drive the liquid crystal for a predetermined time even when the thin film transistor is turned off.
그러나 상기와 같은 종래의 액정표시소자의 스토리지 커패시터에 있어서는 다음과 같은 문제점이 있었다.However, the storage capacitor of the conventional liquid crystal display device as described above has the following problems.
이웃하는 게이트 라인위에 화소전극이 오버랩되어 형성된 스토리지 커패시터는 이웃하는 게이트라인과 화소전극을 두전극으로 하고 그 사이에 게이트 절연막과 보호막으로 된 2중 구조의 절연막이 형성되므로써, 2중 구조의 절연막의 두께 때문에 스초리지 커패시터의 용량이 감소되어 게이트 전극에 신호인가시 드레인 전극을 통해 화소전극에 인가되는 신호가 액정을 구동시키는데 있어서 충분한 전하를 유기시키지 못하므로 액정 표시소자의 플릭커가 증가하여 화질이 저하된다.A storage capacitor formed by overlapping pixel electrodes on a neighboring gate line has a double structure insulating film consisting of a gate insulating film and a protective film formed between two adjacent gate lines and a pixel electrode, thereby forming an insulating film having a double structure insulating film. Due to the thickness, the capacity of the storage capacitor is reduced, and when the signal is applied to the gate electrode, the signal applied to the pixel electrode through the drain electrode does not induce sufficient charge to drive the liquid crystal. Therefore, the flicker of the liquid crystal display increases, resulting in deterioration in image quality. do.
본 발명은 상기 상술한 문제점을 해결하기 위해 안출된 것으로, 소오드/드레인 공정시 선택적으로 화소부분에 소오스/드레인과 동일한 전극을 형성함으로써, 스토리지 커패시터의 용량을 증대시키기에 적당한 액정표시소자의 스토리지 커패시터 형성방법 및 구조를 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and in the case of the source / drain process, by selectively forming the same electrode as the source / drain in the pixel portion, the storage of the liquid crystal display device suitable for increasing the capacity of the storage capacitor is provided. It is an object of the present invention to provide a method and a structure for forming a capacitor.
상기 목적을 달성하기 위한 본 발명 액정표시소자의 스토리지 커패시터 형성방법은 절연기판위에 복수개의 게이트배선과 이에 직교하는 복수개의 데이터 배선 및 각 화소영역에 화소전극을 가지는 액정표시소자의 제조공정에 있어서, 기판위에 게이트전극을 갖는 복수개의 게이트라인을 형성하고 전면에 게이트절연막을 형성하는 공정과, 박막트랜지스터를 형성할 상기 게이트전극 상측에 활성층과 오믹접촉층을 형성하는 공정과, 박막트랜지스터 형성영역에 소오스/드레인전극을 형성함과 동시에 이웃하는 게이트 절연막위에 선택적으로 제1금속층을 형성하는 공정, 상기 드레인전극과 제1금속충상에 접촉홀을 갖는 보호막을 형성하는 공정, 상기 접촉홀을 통해 드레인전극와 제1금속층에 연결되도록 화소영역에 화소전극을 형성하는 공정을 포함하여 이루어짐을 그 특징으로 하고, 본 발명의 액정표시소자의 스토리지 커패시터 구조는 기판위에 복수개의 게이트라인, 게이트절연막 및 보호막위에 화소전극을 가지는 액정표시소자에 있어서, 상기 게이트 절연막위에 선택적으로 제1금속층이 형성되고, 상기 제1금속층위에 접촉홀을 갖는 보호막이 형성되고, 상기 제1금속층과 화소영역에 화소전극이 형성됨을 특징으로 한다.The storage capacitor forming method of the liquid crystal display device of the present invention for achieving the above object in the manufacturing process of the liquid crystal display device having a plurality of gate wirings on the insulating substrate, a plurality of data wirings orthogonal thereto and pixel electrodes in each pixel region, Forming a plurality of gate lines having a gate electrode on the substrate and forming a gate insulating film on the front surface; forming an active layer and an ohmic contact layer on the gate electrode to form a thin film transistor; and source in the thin film transistor formation region. / Forming a drain electrode and selectively forming a first metal layer on a neighboring gate insulating film, forming a protective film having contact holes on the drain electrode and the first metal filling, drain electrode and the first through the contact hole 1 includes forming a pixel electrode in the pixel region so as to be connected to the metal layer In the liquid crystal display device having a plurality of gate lines, a gate insulating film, and a pixel electrode on the passivation layer, the storage capacitor structure of the liquid crystal display device of the present invention is characterized in that the first metal layer is selectively formed on the gate insulating film. And a protective film having contact holes on the first metal layer, and a pixel electrode formed on the first metal layer and the pixel region.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제3도 및 제5도는 본 발명의 제1, 제2실시예 액정표시소자의 스토리지 커패시터 레이아웃도이고, 제4도는 제3도의 A-A' 선상에 따른 공정 단면도이며, 제6도는 제5도의 A-A' 선상에 따른 공정단면도를 나타낸 것으로써, 제4도 (a) 및 제6도 (a)에서 같이 투명 절연기판(41) 위에 돌출된 게이트 전극(42)을 갖는 게이트 라인(42a) 및 스토리지 라인(42a')을 복수개 형성하고, 상기 전면에 게이트 절연막(43)과 활성층인 비정질 실리콘층 및 오믹콘택을 위한 도핑층을 증착시킨 뒤 각 화소의 트랜지스터 형성에만 남도록 비정질실리콘층과 오믹콘택층 패터닝하여 활성층(44)과 도핑층(45)을 형성한다.3 and 5 are layout diagrams of storage capacitors of the first and second exemplary embodiments of the present invention, and FIG. 4 is a cross-sectional view taken along line AA ′ of FIG. 3, and FIG. 6 is AA ′ of FIG. 5. The process cross-sectional view along the line shows a gate line 42a and a storage line having a gate electrode 42 protruding on the transparent insulating substrate 41 as shown in FIGS. 4A and 6A. 42a '), a plurality of gate insulating layers 43 and an active layer of amorphous silicon and a doping layer for ohmic contacts are deposited on the entire surface, and the active layer is patterned by patterning an amorphous silicon layer and an ohmic contact layer so that only the transistors of each pixel remain. 44 and the doped layer 45 are formed.
이어서 제4도(b)에서와 같이 소오스/드레인 전극을 형성하기 위해 금속을 증착하고 패터닝하여 소오스/드레인전극(46a)(46b)을 형성한다.Subsequently, as in FIG. 4 (b), metal is deposited and patterned to form source / drain electrodes to form source / drain electrodes 46a and 46b.
이때, 동시에 소오스/드레인 전극(46a)(46b)형성시, 이웃하는 게이트라인(42a) 상측의 게이트 절연막(43)위의 스토리지 커패시터가 형성될 영역에 남도록 제1금속층(46c)을 형성한다.At this time, when the source / drain electrodes 46a and 46b are simultaneously formed, the first metal layer 46c is formed to remain in the region where the storage capacitor is to be formed on the gate insulating layer 43 above the neighboring gate line 42a.
또한, 제6도 (b)에서와 같이 소오스/드레인전극(46a)(46b)형성시, 스토리지라인(storage line)(42a')측의 게이트 절연막위의 스토리지 커패시터가 형성될 영역에 제1금속층(46c)을 형성한다.In addition, when forming the source / drain electrodes 46a and 46b as shown in FIG. 6 (b), the first metal layer is formed in the region where the storage capacitor is formed on the gate insulating film on the storage line 42a 'side. It forms 46c.
이어서 트랜지스터의 채널을 만들기 위해 채널부의 도핑층(45)은 소으스/드레인 전극(46a)(46b)을 마스크로 사용하여 패터닝한다.The doped layer 45 of the channel portion is then patterned using source / drain electrodes 46a and 46b as a mask to make the channel of the transistor.
그 다음 제4도 (c) 및 제6도 (c)에서와 같이 상기 전면에 트랜지스터를 보호하기 위한 보호막(47)을 형성한다.Next, as shown in FIGS. 4C and 6C, a protective film 47 is formed on the entire surface of the transistor to protect the transistor.
이어서 상기 보호막(47)위에 화소전극을 형성하기 전에 상기 드레인 전극(46b) 및 제1금속층(46c)이 화소전극과 전기적으로 접촉되도록 상기 드레인전극(46b) 및 제1금속층(46c)상의 보호막(47)을 선택적으로 제거하여 접촉홀(47a,47b)을 형성한다.Subsequently, before forming the pixel electrode on the passivation layer 47, the passivation layer on the drain electrode 46b and the first metal layer 46c such that the drain electrode 46b and the first metal layer 46c are in electrical contact with the pixel electrode. 47) is selectively removed to form contact holes 47a and 47b.
이어서, 제4도 (d) 및 제6도 (d)에서와 같이 화소를 형성하기 위해 투명금속을 증착 및 패터닝하여 화소전극(48)을 형성한다.Subsequently, as illustrated in FIGS. 4D and 6D, a transparent metal is deposited and patterned to form a pixel to form the pixel electrode 48.
여기서, 크롬(Cr)이나 크롬/알루미늄(Cr/Al) 또는 크롬(Cr)과 알루미늄(Al)의 합금등으로 형성된 드레인 전극(46b)은 보호막의 접촉홀(47a)를 통해 화소전극(48)과 접촉하여 상부 리던던시(redundancy)로 사용되고, 또한 제1금속층(46c)은 보호막의 쓰루홀(47b)을 통해 화소전극(48)과 접촉하여 스토리지 커패시터를 형성한다.Here, the drain electrode 46b formed of chromium (Cr), chromium / aluminum (Cr / Al), or an alloy of chromium (Cr) and aluminum (Al), or the like, has a pixel electrode 48 through the contact hole 47a of the protective film. The first metal layer 46c contacts the pixel electrode 48 through the through hole 47b of the passivation layer to form a storage capacitor in contact with the upper redundancy.
상기와 같이 설명된 본 발명의 액정표시소자스토리지 커패시터 동작은 종래와 같다.The operation of the liquid crystal display device storage capacitor of the present invention described as described above is the same as before.
상기에서 상술한 바와 같이 본 발명의 액정표시소자의 스토리지 커패시터의 효과는 다음과 같다.As described above, the effect of the storage capacitor of the liquid crystal display device of the present invention is as follows.
게이트 라인 상측에 수직방향으로 스토리지 커패시터가 형성될 영역에 금속을 형성함으로써, 게이트 절연막과 보호막으로 이루어져 두께 증가로 인한 종래의 스토리지 커패시터의 용량저하를 보상하여, 화소에 연결되는 스토리지 커패시터의 용량을 증대 시킬수 있다.By forming a metal in the region where the storage capacitor is to be formed in the vertical direction above the gate line, the gate insulating film and the protective film are formed to compensate for the capacity decrease of the conventional storage capacitor due to the increase in thickness, thereby increasing the capacity of the storage capacitor connected to the pixel. You can.
따라서, 플릭커의 발생을 줄여 액정표시소자의 화질을 개선할 수 있다.Therefore, it is possible to improve the image quality of the liquid crystal display by reducing the occurrence of flicker.
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