KR0137666B1 - 트렌치 캐패시터로 이루어지는 다이나믹 반도체 메모리용 3차원 i-트랜지스터 셀 구조 및 그 제조방법 - Google Patents

트렌치 캐패시터로 이루어지는 다이나믹 반도체 메모리용 3차원 i-트랜지스터 셀 구조 및 그 제조방법

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Publication number
KR0137666B1
KR0137666B1 KR1019880015305A KR880015305A KR0137666B1 KR 0137666 B1 KR0137666 B1 KR 0137666B1 KR 1019880015305 A KR1019880015305 A KR 1019880015305A KR 880015305 A KR880015305 A KR 880015305A KR 0137666 B1 KR0137666 B1 KR 0137666B1
Authority
KR
South Korea
Prior art keywords
trench
layer
doped
substrate
depth
Prior art date
Application number
KR1019880015305A
Other languages
English (en)
Korean (ko)
Other versions
KR890008978A (ko
Inventor
키르허 로란트
궤츠리히 요셉
Original Assignee
네테부시, 피켄셔
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 네테부시, 피켄셔, 지멘스 악티엔게젤샤프트 filed Critical 네테부시, 피켄셔
Publication of KR890008978A publication Critical patent/KR890008978A/ko
Application granted granted Critical
Publication of KR0137666B1 publication Critical patent/KR0137666B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1019880015305A 1987-11-26 1988-11-21 트렌치 캐패시터로 이루어지는 다이나믹 반도체 메모리용 3차원 i-트랜지스터 셀 구조 및 그 제조방법 KR0137666B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3740171 1987-11-26
DEP3740171.8 1987-11-26

Publications (2)

Publication Number Publication Date
KR890008978A KR890008978A (ko) 1989-07-13
KR0137666B1 true KR0137666B1 (ko) 1998-04-28

Family

ID=6341371

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880015305A KR0137666B1 (ko) 1987-11-26 1988-11-21 트렌치 캐패시터로 이루어지는 다이나믹 반도체 메모리용 3차원 i-트랜지스터 셀 구조 및 그 제조방법

Country Status (8)

Country Link
US (1) US4942554A (ja)
EP (1) EP0317934B1 (ja)
JP (1) JP2581654B2 (ja)
KR (1) KR0137666B1 (ja)
AT (1) ATE81230T1 (ja)
CA (1) CA1294713C (ja)
DE (1) DE3875080D1 (ja)
HK (1) HK129094A (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4988637A (en) * 1990-06-29 1991-01-29 International Business Machines Corp. Method for fabricating a mesa transistor-trench capacitor memory cell structure
JPH06216338A (ja) * 1992-11-27 1994-08-05 Internatl Business Mach Corp <Ibm> 半導体メモリセル及びその製造方法
US5936271A (en) * 1994-11-15 1999-08-10 Siemens Aktiengesellschaft Unit cell layout and transfer gate design for high density DRAMs having a trench capacitor with signal electrode composed of three differently doped polysilicon layers
US5543348A (en) * 1995-03-29 1996-08-06 Kabushiki Kaisha Toshiba Controlled recrystallization of buried strap in a semiconductor memory device
US5905279A (en) * 1996-04-09 1999-05-18 Kabushiki Kaisha Toshiba Low resistant trench fill for a semiconductor device
US5914510A (en) * 1996-12-13 1999-06-22 Kabushiki Kaisha Toshiba Semiconductor memory device and method of manufacturing the same
US6100132A (en) * 1997-06-30 2000-08-08 Kabushiki Kaisha Toshiba Method of deforming a trench by a thermal treatment
US5990511A (en) * 1997-10-16 1999-11-23 International Business Machines Corporation Memory cell with transfer device node in selective polysilicon
US6236079B1 (en) 1997-12-02 2001-05-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device having a trench capacitor
US6074909A (en) * 1998-07-31 2000-06-13 Siemens Aktiengesellschaft Apparatus and method for forming controlled deep trench top isolation layers
US6376873B1 (en) 1999-04-07 2002-04-23 International Business Machines Corporation Vertical DRAM cell with robust gate-to-storage node isolation
US6372567B1 (en) 2000-04-20 2002-04-16 Infineon Technologies Ag Control of oxide thickness in vertical transistor structures
FR2819631B1 (fr) * 2001-01-12 2003-04-04 St Microelectronics Sa Procede de fabrication d'un substrat monocristallin, et circuit integre comportant un tel substrat
DE10128193C1 (de) * 2001-06-11 2003-01-30 Infineon Technologies Ag Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung
US7375027B2 (en) 2004-10-12 2008-05-20 Promos Technologies Inc. Method of providing contact via to a surface

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5982761A (ja) * 1982-11-04 1984-05-12 Hitachi Ltd 半導体メモリ
ATE41267T1 (de) * 1984-04-25 1989-03-15 Siemens Ag Ein-transistor-speicherzelle fuer hochintegrierte dynamische halbleiterspeicher und verfahren zu ihrer herstellung.
EP0167764B1 (en) * 1984-06-14 1989-08-16 International Business Machines Corporation Dynamic ram cell
US4649625A (en) * 1985-10-21 1987-03-17 International Business Machines Corporation Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor
JPS62193275A (ja) * 1986-02-12 1987-08-25 シ−メンス、アクチエンゲゼルシヤフト ３次元１トランジスタ・セル装置およびその製造方法
US4801989A (en) * 1986-02-20 1989-01-31 Fujitsu Limited Dynamic random access memory having trench capacitor with polysilicon lined lower electrode
US4728623A (en) * 1986-10-03 1988-03-01 International Business Machines Corporation Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method
US4830978A (en) * 1987-03-16 1989-05-16 Texas Instruments Incorporated Dram cell and method

Also Published As

Publication number Publication date
DE3875080D1 (de) 1992-11-05
HK129094A (en) 1994-11-25
JPH021968A (ja) 1990-01-08
EP0317934A1 (de) 1989-05-31
US4942554A (en) 1990-07-17
ATE81230T1 (de) 1992-10-15
CA1294713C (en) 1992-01-21
EP0317934B1 (de) 1992-09-30
KR890008978A (ko) 1989-07-13
JP2581654B2 (ja) 1997-02-12

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