JPWO2024057707A1 - - Google Patents

Info

Publication number
JPWO2024057707A1
JPWO2024057707A1 JP2024546733A JP2024546733A JPWO2024057707A1 JP WO2024057707 A1 JPWO2024057707 A1 JP WO2024057707A1 JP 2024546733 A JP2024546733 A JP 2024546733A JP 2024546733 A JP2024546733 A JP 2024546733A JP WO2024057707 A1 JPWO2024057707 A1 JP WO2024057707A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024546733A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024057707A1 publication Critical patent/JPWO2024057707A1/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/497—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/20—Inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/501—Inductive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B80/00—Assemblies of multiple devices comprising at least one memory device covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/26—Configurations of stacked chips the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/792—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips
JP2024546733A 2022-09-12 2023-07-19 Pending JPWO2024057707A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022144892 2022-09-12
PCT/JP2023/026387 WO2024057707A1 (ja) 2022-09-12 2023-07-19 半導体モジュール及びその製造方法

Publications (1)

Publication Number Publication Date
JPWO2024057707A1 true JPWO2024057707A1 (https=) 2024-03-21

Family

ID=90274623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024546733A Pending JPWO2024057707A1 (https=) 2022-09-12 2023-07-19

Country Status (4)

Country Link
US (1) US20250210514A1 (https=)
JP (1) JPWO2024057707A1 (https=)
TW (1) TWI863483B (https=)
WO (1) WO2024057707A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2024262221A1 (https=) * 2023-06-20 2024-12-26
WO2024262220A1 (ja) * 2023-06-20 2024-12-26 先端システム技術研究組合 半導体モジュール
WO2025258552A1 (ja) * 2024-06-10 2025-12-18 先端システム技術研究組合 半導体モジュール及び半導体モジュールの製造方法
JP2026001327A (ja) * 2024-06-19 2026-01-07 ヤマハロボティクス株式会社 チップ積層デバイス、半導体モジュール、及びそれらの製造方法
WO2026018508A1 (ja) * 2024-07-16 2026-01-22 先端システム技術研究組合 半導体モジュール

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994026083A1 (en) * 1993-04-23 1994-11-10 Irvine Sensors Corporation Electronic module comprising a stack of ic chips
JP3610661B2 (ja) * 1996-02-21 2005-01-19 株式会社日立製作所 三次元積層モジュール
US6240622B1 (en) * 1999-07-09 2001-06-05 Micron Technology, Inc. Integrated circuit inductors
JP2011108779A (ja) * 2009-11-16 2011-06-02 Panasonic Corp 半導体装置
WO2017126014A1 (ja) * 2016-01-18 2017-07-27 ウルトラメモリ株式会社 積層型半導体装置及びその製造方法
US20210018952A1 (en) * 2017-06-02 2021-01-21 Ultramemory Inc. Semiconductor module
US10614942B2 (en) * 2018-07-13 2020-04-07 Qualcomm Incorporated Inductors formed with through glass vias
US10714434B1 (en) * 2018-12-29 2020-07-14 Intel Corporation Integrated magnetic inductors for embedded-multi-die interconnect bridge substrates
TW202044500A (zh) * 2019-05-29 2020-12-01 佐臻股份有限公司 模組堆疊封裝結構
CN113056819B (zh) * 2019-11-11 2022-06-03 超极存储器股份有限公司 半导体模块、dimm模块以及它们的制造方法
US11616013B2 (en) * 2020-06-12 2023-03-28 Taiwan Semiconductor Manufacturing Co., Ltd. Extended via semiconductor structure and device

Also Published As

Publication number Publication date
TWI863483B (zh) 2024-11-21
US20250210514A1 (en) 2025-06-26
WO2024057707A1 (ja) 2024-03-21
TW202412218A (zh) 2024-03-16

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