JPWO2023209484A1 - - Google Patents

Info

Publication number
JPWO2023209484A1
JPWO2023209484A1 JP2024517597A JP2024517597A JPWO2023209484A1 JP WO2023209484 A1 JPWO2023209484 A1 JP WO2023209484A1 JP 2024517597 A JP2024517597 A JP 2024517597A JP 2024517597 A JP2024517597 A JP 2024517597A JP WO2023209484 A1 JPWO2023209484 A1 JP WO2023209484A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024517597A
Other languages
Japanese (ja)
Other versions
JPWO2023209484A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2023209484A1 publication Critical patent/JPWO2023209484A1/ja
Publication of JPWO2023209484A5 publication Critical patent/JPWO2023209484A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
JP2024517597A 2022-04-28 2023-04-14 Pending JPWO2023209484A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022075007 2022-04-28
PCT/IB2023/053816 WO2023209484A1 (ja) 2022-04-28 2023-04-14 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2023209484A1 true JPWO2023209484A1 (https=) 2023-11-02
JPWO2023209484A5 JPWO2023209484A5 (https=) 2026-04-15

Family

ID=88518030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024517597A Pending JPWO2023209484A1 (https=) 2022-04-28 2023-04-14

Country Status (6)

Country Link
US (1) US20250176155A1 (https=)
JP (1) JPWO2023209484A1 (https=)
KR (1) KR20250003661A (https=)
CN (1) CN119096713A (https=)
TW (1) TW202343807A (https=)
WO (1) WO2023209484A1 (https=)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9312257B2 (en) * 2012-02-29 2016-04-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10692869B2 (en) * 2016-11-17 2020-06-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
JP2018085357A (ja) * 2016-11-21 2018-05-31 株式会社半導体エネルギー研究所 記憶装置、及び電子機器
US20200342932A1 (en) * 2019-04-25 2020-10-29 John Bennett Nand connected gain cell memory
CN114424339A (zh) 2019-09-20 2022-04-29 株式会社半导体能源研究所 半导体装置及半导体装置的制造方法

Also Published As

Publication number Publication date
WO2023209484A1 (ja) 2023-11-02
US20250176155A1 (en) 2025-05-29
TW202343807A (zh) 2023-11-01
CN119096713A (zh) 2024-12-06
KR20250003661A (ko) 2025-01-07

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Legal Events

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Effective date: 20260407

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