JPWO2023119622A5 - - Google Patents
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- JPWO2023119622A5 JPWO2023119622A5 JP2023568989A JP2023568989A JPWO2023119622A5 JP WO2023119622 A5 JPWO2023119622 A5 JP WO2023119622A5 JP 2023568989 A JP2023568989 A JP 2023568989A JP 2023568989 A JP2023568989 A JP 2023568989A JP WO2023119622 A5 JPWO2023119622 A5 JP WO2023119622A5
- Authority
- JP
- Japan
- Prior art keywords
- data
- combination information
- recording
- storage instruction
- data storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2021/048185 WO2023119622A1 (ja) | 2021-12-24 | 2021-12-24 | メモリアクセス方法およびメモリアクセス制御装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2023119622A1 JPWO2023119622A1 (https=) | 2023-06-29 |
| JPWO2023119622A5 true JPWO2023119622A5 (https=) | 2024-09-04 |
| JP7754203B2 JP7754203B2 (ja) | 2025-10-15 |
Family
ID=86901828
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023568989A Active JP7754203B2 (ja) | 2021-12-24 | 2021-12-24 | メモリアクセス方法およびメモリアクセス制御装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US12443346B2 (https=) |
| JP (1) | JP7754203B2 (https=) |
| CN (1) | CN118414610A (https=) |
| WO (1) | WO2023119622A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20250101484A (ko) * | 2023-12-27 | 2025-07-04 | 삼성전자주식회사 | 컴퓨팅 장치 및 이의 동작 방법 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5377340A (en) | 1991-06-18 | 1994-12-27 | Hewlett-Packard Company | Method and apparatus for memory interleaving using an improved hashing scheme |
| JP2003323339A (ja) | 2002-03-01 | 2003-11-14 | Sony Computer Entertainment Inc | メモリアクセス装置、半導体デバイス、メモリアクセス制御方法、コンピュータプログラム及び記録媒体 |
| US6912616B2 (en) | 2002-11-12 | 2005-06-28 | Hewlett-Packard Development Company, L.P. | Mapping addresses to memory banks based on at least one mathematical relationship |
| US9304910B2 (en) | 2013-12-10 | 2016-04-05 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Slice formatting and interleaving for interleaved sectors |
-
2021
- 2021-12-24 JP JP2023568989A patent/JP7754203B2/ja active Active
- 2021-12-24 CN CN202180105050.4A patent/CN118414610A/zh active Pending
- 2021-12-24 WO PCT/JP2021/048185 patent/WO2023119622A1/ja not_active Ceased
-
2024
- 2024-06-11 US US18/740,243 patent/US12443346B2/en active Active
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