JPWO2022113661A1 - - Google Patents

Info

Publication number
JPWO2022113661A1
JPWO2022113661A1 JP2022565164A JP2022565164A JPWO2022113661A1 JP WO2022113661 A1 JPWO2022113661 A1 JP WO2022113661A1 JP 2022565164 A JP2022565164 A JP 2022565164A JP 2022565164 A JP2022565164 A JP 2022565164A JP WO2022113661 A1 JPWO2022113661 A1 JP WO2022113661A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022565164A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2022113661A1 publication Critical patent/JPWO2022113661A1/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/121Arrangements for protection of devices protecting against mechanical damage
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • H10W70/417Bonding materials between chips and die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
JP2022565164A 2020-11-30 2021-11-01 Pending JPWO2022113661A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2020198250 2020-11-30
PCT/JP2021/040269 WO2022113661A1 (ja) 2020-11-30 2021-11-01 半導体装置

Publications (1)

Publication Number Publication Date
JPWO2022113661A1 true JPWO2022113661A1 (https=) 2022-06-02

Family

ID=81754394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022565164A Pending JPWO2022113661A1 (https=) 2020-11-30 2021-11-01

Country Status (5)

Country Link
US (1) US20230411232A1 (https=)
JP (1) JPWO2022113661A1 (https=)
CN (1) CN116670820A (https=)
DE (1) DE112021005724T5 (https=)
WO (1) WO2022113661A1 (https=)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004022725A (ja) * 2002-06-14 2004-01-22 Renesas Technology Corp 半導体装置
JP2005311099A (ja) * 2004-04-22 2005-11-04 Toshiba Corp 半導体装置及びその製造方法
JP2008258411A (ja) * 2007-04-05 2008-10-23 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP3161823U (ja) * 2010-04-29 2010-08-12 坤遠科技股▲ふん▼有限公司 封止樹脂接合度を強化できるリードフレーム及びそのパッケージ構造
JP2015038917A (ja) * 2013-03-28 2015-02-26 大日本印刷株式会社 リードフレーム、樹脂付きリードフレーム、リードフレームの多面付け体、樹脂付きリードフレームの多面付け体、光半導体装置、光半導体装置の多面付け体
JP2016105432A (ja) * 2014-12-01 2016-06-09 Shマテリアル株式会社 リードフレームの製造方法
JP2017163086A (ja) * 2016-03-11 2017-09-14 Shマテリアル株式会社 光半導体素子搭載用のリードフレーム及びその製造方法
JP2018190882A (ja) * 2017-05-10 2018-11-29 ローム株式会社 半導体装置
JP2019047112A (ja) * 2017-09-04 2019-03-22 ローム株式会社 半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0895287A3 (en) * 1997-07-31 2006-04-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and lead frame for the same
US6927483B1 (en) * 2003-03-07 2005-08-09 Amkor Technology, Inc. Semiconductor package exhibiting efficient lead placement
US20050146057A1 (en) * 2003-12-31 2005-07-07 Khor Ah L. Micro lead frame package having transparent encapsulant
US20060071351A1 (en) * 2004-09-28 2006-04-06 Texas Instruments Incorporated Mold compound interlocking feature to improve semiconductor package strength
US8492883B2 (en) * 2008-03-14 2013-07-23 Advanced Semiconductor Engineering, Inc. Semiconductor package having a cavity structure
US8124447B2 (en) * 2009-04-10 2012-02-28 Advanced Semiconductor Engineering, Inc. Manufacturing method of advanced quad flat non-leaded package
US8203201B2 (en) * 2010-03-26 2012-06-19 Stats Chippac Ltd. Integrated circuit packaging system with leads and method of manufacture thereof
US9570381B2 (en) * 2015-04-02 2017-02-14 Advanced Semiconductor Engineering, Inc. Semiconductor packages and related manufacturing methods
US10529672B2 (en) * 2017-08-31 2020-01-07 Stmicroelectronics, Inc. Package with interlocking leads and manufacturing the same
US11569179B2 (en) * 2020-11-19 2023-01-31 Advanced Semiconductor Engineering, Inc. Package structure including an outer lead portion and an inner lead portion and method for manufacturing package structure

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004022725A (ja) * 2002-06-14 2004-01-22 Renesas Technology Corp 半導体装置
JP2005311099A (ja) * 2004-04-22 2005-11-04 Toshiba Corp 半導体装置及びその製造方法
JP2008258411A (ja) * 2007-04-05 2008-10-23 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP3161823U (ja) * 2010-04-29 2010-08-12 坤遠科技股▲ふん▼有限公司 封止樹脂接合度を強化できるリードフレーム及びそのパッケージ構造
JP2015038917A (ja) * 2013-03-28 2015-02-26 大日本印刷株式会社 リードフレーム、樹脂付きリードフレーム、リードフレームの多面付け体、樹脂付きリードフレームの多面付け体、光半導体装置、光半導体装置の多面付け体
JP2016105432A (ja) * 2014-12-01 2016-06-09 Shマテリアル株式会社 リードフレームの製造方法
JP2017163086A (ja) * 2016-03-11 2017-09-14 Shマテリアル株式会社 光半導体素子搭載用のリードフレーム及びその製造方法
JP2018190882A (ja) * 2017-05-10 2018-11-29 ローム株式会社 半導体装置
JP2019047112A (ja) * 2017-09-04 2019-03-22 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
CN116670820A (zh) 2023-08-29
WO2022113661A1 (ja) 2022-06-02
DE112021005724T5 (de) 2023-08-10
US20230411232A1 (en) 2023-12-21

Similar Documents

Publication Publication Date Title
BR112023012656A2 (https=)
BR112023009656A2 (https=)
BR112023011738A2 (https=)
BR102021015500A2 (https=)
BR102021007058A2 (https=)
BR102020022030A2 (https=)
BR112023016292A2 (https=)
BR112023011610A2 (https=)
BR112023011539A2 (https=)
JPWO2022113661A1 (https=)
BR102021015566A2 (https=)
BR102021015450A8 (https=)
BR102021015220A2 (https=)
BR102021015247A2 (https=)
BR102021014056A2 (https=)
BR102021014044A2 (https=)
BR102021013929A2 (https=)
BR102021012571A2 (https=)
BR102021012230A2 (https=)
BR102021012003A2 (https=)
BR102021012107A2 (https=)
BR102021010467A2 (https=)
BR102021009555A2 (https=)
BR102021009475A2 (https=)
BR102021007978A2 (https=)

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20240925

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20250610

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20251104