JPWO2021084717A5 - - Google Patents

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JPWO2021084717A5
JPWO2021084717A5 JP2021554008A JP2021554008A JPWO2021084717A5 JP WO2021084717 A5 JPWO2021084717 A5 JP WO2021084717A5 JP 2021554008 A JP2021554008 A JP 2021554008A JP 2021554008 A JP2021554008 A JP 2021554008A JP WO2021084717 A5 JPWO2021084717 A5 JP WO2021084717A5
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circuit
information processing
processing circuit
parameter values
product
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JP2021554008A
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JPWO2021084717A1 (https=
JP7310910B2 (ja
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JP2021554008A 2019-10-31 2019-10-31 情報処理回路および情報処理回路の設計方法 Active JP7310910B2 (ja)

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Application Number Priority Date Filing Date Title
PCT/JP2019/042927 WO2021084717A1 (ja) 2019-10-31 2019-10-31 情報処理回路および情報処理回路の設計方法

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JPWO2021084717A1 JPWO2021084717A1 (https=) 2021-05-06
JPWO2021084717A5 true JPWO2021084717A5 (https=) 2022-06-27
JP7310910B2 JP7310910B2 (ja) 2023-07-19

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US (1) US20220413806A1 (https=)
JP (1) JP7310910B2 (https=)
TW (1) TWI830940B (https=)
WO (1) WO2021084717A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7456501B2 (ja) * 2020-05-26 2024-03-27 日本電気株式会社 情報処理回路および情報処理回路の設計方法

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* Cited by examiner, † Cited by third party
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JP2004086374A (ja) * 2002-08-23 2004-03-18 Ricoh Co Ltd 半導体装置
US10552732B2 (en) * 2016-08-22 2020-02-04 Kneron Inc. Multi-layer neural network
JP6623184B2 (ja) * 2017-01-31 2019-12-18 日本電信電話株式会社 多層ニューラルネットの大局構造抽出装置、方法、及びプログラム
JP2018132830A (ja) * 2017-02-13 2018-08-23 LeapMind株式会社 ニューラルネットワーク構築方法、ニューラルネットワーク装置及びニューラルネットワーク装置更新方法
US11586907B2 (en) * 2018-02-27 2023-02-21 Stmicroelectronics S.R.L. Arithmetic unit for deep learning acceleration
JP2019168851A (ja) * 2018-03-22 2019-10-03 東芝メモリ株式会社 演算装置及び演算方法
CN108764467B (zh) * 2018-04-04 2021-08-17 北京大学深圳研究生院 用于卷积神经网络卷积运算和全连接运算电路
WO2020095140A1 (ja) * 2018-11-08 2020-05-14 株式会社半導体エネルギー研究所 半導体装置、及び電子機器

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