JPWO2020203220A1 - - Google Patents

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Publication number
JPWO2020203220A1
JPWO2020203220A1 JP2021511377A JP2021511377A JPWO2020203220A1 JP WO2020203220 A1 JPWO2020203220 A1 JP WO2020203220A1 JP 2021511377 A JP2021511377 A JP 2021511377A JP 2021511377 A JP2021511377 A JP 2021511377A JP WO2020203220 A1 JPWO2020203220 A1 JP WO2020203220A1
Authority
JP
Japan
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Application number
JP2021511377A
Other versions
JP7417293B2 (ja
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Publication of JPWO2020203220A1 publication Critical patent/JPWO2020203220A1/ja
Application granted granted Critical
Publication of JP7417293B2 publication Critical patent/JP7417293B2/ja
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Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2021511377A 2019-03-29 2020-03-16 論理集積回路及び論理集積回路による制御方法 Active JP7417293B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019068910 2019-03-29
JP2019068910 2019-03-29
PCT/JP2020/011433 WO2020203220A1 (ja) 2019-03-29 2020-03-16 論理集積回路及び論理集積回路による制御方法

Publications (2)

Publication Number Publication Date
JPWO2020203220A1 true JPWO2020203220A1 (ja) 2020-10-08
JP7417293B2 JP7417293B2 (ja) 2024-01-18

Family

ID=72668812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021511377A Active JP7417293B2 (ja) 2019-03-29 2020-03-16 論理集積回路及び論理集積回路による制御方法

Country Status (2)

Country Link
JP (1) JP7417293B2 (ja)
WO (1) WO2020203220A1 (ja)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188649A (ja) * 1990-11-19 1992-07-07 Kawasaki Steel Corp プログラマブル論理素子
JP2002076883A (ja) * 2000-06-15 2002-03-15 Nec Corp データパスに適したプログラマブル相互接続網を有する再構成可能デバイス
JP2004326415A (ja) * 2003-04-24 2004-11-18 Toshiba Corp リセット機能付きｉｃカード用ｌｓｉ
JP2009017010A (ja) * 2007-07-02 2009-01-22 Nec Electronics Corp 再構成可能デバイス
JPWO2016194332A1 (ja) * 2015-05-29 2018-05-24 日本電気株式会社 プログラマブル論理集積回路、設計支援システム及びコンフィグレーション方法
JPWO2017126544A1 (ja) * 2016-01-20 2018-11-22 日本電気株式会社 再構成可能回路、再構成可能回路システム、および再構成可能回路の動作方法
JPWO2017126451A1 (ja) * 2016-01-18 2018-11-22 日本電気株式会社 論理集積回路および半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9294096B2 (en) * 2014-02-28 2016-03-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP6477168B2 (ja) 2015-03-31 2019-03-06 アイシン・エィ・ダブリュ株式会社 蓄圧装置
JP6713660B2 (ja) 2016-01-11 2020-06-24 嶋田　隆一 無アーク電流開閉装置
JP2017126451A (ja) 2016-01-13 2017-07-20 株式会社デンソー 二次電池

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188649A (ja) * 1990-11-19 1992-07-07 Kawasaki Steel Corp プログラマブル論理素子
JP2002076883A (ja) * 2000-06-15 2002-03-15 Nec Corp データパスに適したプログラマブル相互接続網を有する再構成可能デバイス
JP2004326415A (ja) * 2003-04-24 2004-11-18 Toshiba Corp リセット機能付きｉｃカード用ｌｓｉ
JP2009017010A (ja) * 2007-07-02 2009-01-22 Nec Electronics Corp 再構成可能デバイス
JPWO2016194332A1 (ja) * 2015-05-29 2018-05-24 日本電気株式会社 プログラマブル論理集積回路、設計支援システム及びコンフィグレーション方法
JPWO2017126451A1 (ja) * 2016-01-18 2018-11-22 日本電気株式会社 論理集積回路および半導体装置
JPWO2017126544A1 (ja) * 2016-01-20 2018-11-22 日本電気株式会社 再構成可能回路、再構成可能回路システム、および再構成可能回路の動作方法

Also Published As

Publication number Publication date
WO2020203220A1 (ja) 2020-10-08
JP7417293B2 (ja) 2024-01-18

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