JPWO2020183263A1 - - Google Patents

Info

Publication number
JPWO2020183263A1
JPWO2020183263A1 JP2021504594A JP2021504594A JPWO2020183263A1 JP WO2020183263 A1 JPWO2020183263 A1 JP WO2020183263A1 JP 2021504594 A JP2021504594 A JP 2021504594A JP 2021504594 A JP2021504594 A JP 2021504594A JP WO2020183263 A1 JPWO2020183263 A1 JP WO2020183263A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021504594A
Other versions
JP7462609B2 (ja
JPWO2020183263A5 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2020183263A1 publication Critical patent/JPWO2020183263A1/ja
Publication of JPWO2020183263A5 publication Critical patent/JPWO2020183263A5/ja
Priority to JP2024050193A priority Critical patent/JP2024079789A/ja
Application granted granted Critical
Publication of JP7462609B2 publication Critical patent/JP7462609B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • G06F30/27—Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/93—Document management systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/12—Geometric CAD characterised by design entry means specially adapted for CAD, e.g. graphical user interfaces [GUI] specially adapted for CAD
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/31—Design entry, e.g. editors specifically adapted for circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/12—Symbolic schematics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Biomedical Technology (AREA)
  • Databases & Information Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Biophysics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Computational Linguistics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Business, Economics & Management (AREA)
  • General Business, Economics & Management (AREA)
  • Molecular Biology (AREA)
  • General Health & Medical Sciences (AREA)
  • Neurology (AREA)
  • Architecture (AREA)
  • Human Computer Interaction (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Thin Film Transistor (AREA)
JP2021504594A 2019-03-08 2020-02-24 Ａｉシステム、及びａｉシステムの動作方法 Active JP7462609B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2024050193A JP2024079789A (ja) 2019-03-08 2024-03-26 Ａｉシステム

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP2019042594 2019-03-08
JP2019042594 2019-03-08
JP2019088049 2019-05-08
JP2019088049 2019-05-08
JP2019194669 2019-10-25
JP2019194669 2019-10-25
PCT/IB2020/051516 WO2020183263A1 (ja) 2019-03-08 2020-02-24 Ａｉシステム、及びａｉシステムの動作方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2024050193A Division JP2024079789A (ja) 2019-03-08 2024-03-26 Ａｉシステム

Publications (3)

Publication Number Publication Date
JPWO2020183263A1 true JPWO2020183263A1 (ja) 2020-09-17
JPWO2020183263A5 JPWO2020183263A5 (ja) 2023-03-03
JP7462609B2 JP7462609B2 (ja) 2024-04-05

Family

ID=72425955

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021504594A Active JP7462609B2 (ja) 2019-03-08 2020-02-24 Ａｉシステム、及びａｉシステムの動作方法
JP2024050193A Pending JP2024079789A (ja) 2019-03-08 2024-03-26 Ａｉシステム

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2024050193A Pending JP2024079789A (ja) 2019-03-08 2024-03-26 Ａｉシステム

Country Status (6)

Country Link
US (1) US20220180159A1 (ja)
JP (2) JP7462609B2 (ja)
KR (1) KR20210135541A (ja)
CN (1) CN113614727A (ja)
DE (1) DE112020001142T5 (ja)
WO (1) WO2020183263A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112021003900T5 (de) 2020-07-17 2023-07-13 Semiconductor Energy Laboratory Co., Ltd. Halbleitervorrichtung und elektronisches Gerät
US20240257751A1 (en) * 2021-05-27 2024-08-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display apparatus, and electronic device
CN114818024B (zh) * 2022-06-28 2022-10-14 电子科技大学 一种磁谐振三相无线充电线圈自动化仿真方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07200643A (ja) * 1993-12-28 1995-08-04 Fujitsu Ltd 半導体集積回路のレイアウトデータ抽出方法及び抽出装置
US20070256037A1 (en) * 2006-04-26 2007-11-01 Zavadsky Vyacheslav L Net-list organization tools
JP6445242B2 (ja) * 2014-03-13 2018-12-26 Ｎｅｃプラットフォームズ株式会社 設計支援装置および設計支援方法
US10102320B2 (en) * 2015-02-26 2018-10-16 Autodesk, Inc. Predictive multi-user client-server electronic circuit design system utilizing machine learning techniques
JP6668182B2 (ja) * 2016-06-30 2020-03-18 株式会社日立製作所 回路設計装置及びそれを用いた回路設計方法
JP7012298B2 (ja) 2016-09-21 2022-01-28 ジャパンモード株式会社 文献データ解析プログラム及びシステム
WO2019021095A1 (ja) 2017-07-26 2019-01-31 株式会社半導体エネルギー研究所 二次電池の充電制御システム及び二次電池の異常検出方法

Also Published As

Publication number Publication date
JP2024079789A (ja) 2024-06-11
JP7462609B2 (ja) 2024-04-05
CN113614727A (zh) 2021-11-05
US20220180159A1 (en) 2022-06-09
DE112020001142T5 (de) 2021-11-18
KR20210135541A (ko) 2021-11-15
WO2020183263A1 (ja) 2020-09-17

Similar Documents

Publication Publication Date Title
BR112021017339A2 (ja)
BR112021018450A2 (ja)
BR112021017939A2 (ja)
BR112021017738A2 (ja)
BR112021017892A2 (ja)
BR112021017782A2 (ja)
BR112021017637A2 (ja)
BR112021017728A2 (ja)
BR112021018452A2 (ja)
BR112021017355A2 (ja)
BR112021017703A2 (ja)
BR112021017173A2 (ja)
BR112021018584A2 (ja)
JPWO2020183263A1 (ja)
BR112021017083A2 (ja)
BR112021018250A2 (ja)
BR112021017234A2 (ja)
BR112021018084A2 (ja)
BR112021018484A2 (ja)
BR112021016821A2 (ja)
BR112021017732A2 (ja)
BR112021017949A2 (ja)
BR112021017983A2 (ja)
BR112021017310A2 (ja)
BR112021016996A2 (ja)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230222

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230222

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20240227

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20240326

R150 Certificate of patent or registration of utility model

Ref document number: 7462609

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150