JPWO2020096304A5

JPWO2020096304A5 -

Info

Publication number: JPWO2020096304A5
Application number: JP2021522966A
Authority: JP
Publication date: 2022-11-11
Anticipated expiration: 2039-11-04

Description

発光素子は、第３発光部ＬＥ３、第２接着部ＡＤ２、第２カラーフィルタＣＦ２、第２発光部ＬＥ２、第１接着部ＡＤ１、及び第１カラーフィルタＣＦ１を貫通し、第１オーミック層１０８と共通延長パターンＣＥＬとを接続する第４ビアパターンＶＡ４と、第３発光部ＬＥ３、第２接着部ＡＤ２、及び第２カラーフィルタＣＦ２を貫通し、第２オーミック層２０８と共通延長パターンＣＥＬとを接続する第５ビアパターンＶＡ５と、第３ｎ型半導体層３０２、第３活性層３０４、及び第３ｐ型半導体層３０６を貫通し、第３オーミック層３０８を共通延長パターンＣＥＬに接続する第６ビアパターンＶＡ６をさらに含むことができる。
The light emitting element passes through the third light emitting part LE3, the second adhesive part AD2, the second color filter CF2, the second light emitting part LE2, the first adhesive part AD1, and the first color filter CF1, and is connected to the first ohmic layer 108. A fourth via pattern VA4 connecting the common extension pattern CEL, a third light emitting part LE3, a second adhesive part AD2, and a second color filter CF2 are penetrated to connect the second ohmic layer 208 and the common extension pattern CEL. and a sixth via pattern VA6 that penetrates the third n-type semiconductor layer 302, the third active layer 304, and the third p-type semiconductor layer 306 and connects the third ohmic layer 308 to the common extension pattern CEL . can further include

第１パッシベーション膜ＰＶＴ１をエッチングして、第１ビアホールＶＨ１の底面に第１ｎ型半導体層１０２を露出させ、第２ビアホールＶＨ２の底面に第２ｎ型半導体層２０２を露出させ、第３ビアホールＶＨ３の底面に第３ｎ型半導体層３０２を露出させ、第４ビアホールＶＨ４の底面に第１オーミック層１０８を露出させ、第５ビアホールＶＨ５の底面に第２オーミック層２０８を露出させ、第６ビアホールＶＨ６の底面に第３オーミック層３０８を露出することができる。 The first passivation film PVT1 is etched to expose the first n-type semiconductor layer 102 on the bottom surface of the first via hole VH1, to expose the second n-type semiconductor layer 202 on the bottom surface of the second via hole VH2, and to expose the bottom surface of the third via hole VH3. , the first ohmic layer 108 is exposed on the bottom surface of the fourth via hole VH4, the second ohmic layer 208 is exposed on the bottom surface of the fifth via hole VH5, and the bottom surface of the sixth via hole VH6 is exposed. The third ohmic layer 308 can be exposed.

Claims

a first light emitting unit;
a second light emitting unit disposed on the first light emitting unit;
a third light emitting unit disposed on the second light emitting unit;
a passivation film surrounding outer sidewalls of each of the first light emitting unit, the second light emitting unit, and the third light emitting unit ;
a via pattern electrically connected to at least one of the first light emitting unit, the second light emitting unit, and the third light emitting unit;
a pad electrically connected to the via pattern and extending to the passivation film on one surface of the third light emitting unit;
A light-emitting element comprising

an extension pattern electrically connected to the via pattern and extending from one surface of the third light emitting unit to the side surface of the first light emitting unit along side surfaces of the first to third light emitting units;
The light emitting device of claim 1, further comprising a pillar pattern electrically connecting the extension pattern and the pad.

3. The light emitting device of claim 2, further comprising a conductive pattern between the via pattern and the extension pattern for electrically connecting the via pattern and the extension pattern.

The light emitting device according to claim 1, further comprising a light shielding film covering a portion of one surface of the first light emitting unit to define a light extraction surface.

5. The light emitting device according to claim 4, further comprising a transparent adhesive portion disposed on the light extraction surface defined by said light shielding film.

The first light emitting unit includes a 1-1 type semiconductor layer, a first active layer, and a 1-2 type semiconductor layer,
The second light emitting unit includes a 2-1 type semiconductor layer, a second active layer, and a 2-2 type semiconductor layer,
The light emitting device of claim 1, wherein the third light emitting unit includes a 3-1 type semiconductor layer, a third active layer, and a 3-2 type semiconductor layer.

The via pattern is
a first via pattern electrically connected to the 1-1 type semiconductor layer through the second and third light emitting parts;
a second via pattern electrically connected to the 2-1 type semiconductor layer through the third light emitting portion;
a third via pattern electrically connected to the 3-1 type semiconductor layer;
a fourth via pattern electrically connected to the 1-2 type semiconductor layer through the second and third light emitting parts;
a fifth via pattern electrically connected to the 2-2 type semiconductor layer through the third light emitting portion;
The light emitting device of claim 6, further comprising a sixth via pattern electrically connected to the 3-2 type semiconductor layer.

The pad is
a first pad electrically connected to the first via pattern;
a second pad electrically connected to the second via pattern;
a third pad electrically connected to the third via pattern;
8. The light emitting device of claim 7, further comprising a common pad electrically connected in common with the fourth to sixth via patterns.

2. The light emitting device according to claim 1, wherein said passivation film fills spaces between adjacent light emitting devices.

The light emitting device according to claim 1, wherein the passivation layer comprises epoxy resin, EMC (Epoxy Molding Compound), or silicon.