JPWO2019087707A1 - 積層基板の製造方法、製造装置、およびプログラム - Google Patents
積層基板の製造方法、製造装置、およびプログラム Download PDFInfo
- Publication number
- JPWO2019087707A1 JPWO2019087707A1 JP2019550958A JP2019550958A JPWO2019087707A1 JP WO2019087707 A1 JPWO2019087707 A1 JP WO2019087707A1 JP 2019550958 A JP2019550958 A JP 2019550958A JP 2019550958 A JP2019550958 A JP 2019550958A JP WO2019087707 A1 JPWO2019087707 A1 JP WO2019087707A1
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- substrates
- bonding
- manufacturing
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 1115
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 78
- 239000013078 crystal Substances 0.000 claims abstract description 154
- 238000005304 joining Methods 0.000 claims abstract description 90
- 238000000034 method Methods 0.000 claims description 76
- 238000006073 displacement reaction Methods 0.000 claims description 69
- 238000009826 distribution Methods 0.000 claims description 55
- 239000004065 semiconductor Substances 0.000 claims description 13
- 238000003860 storage Methods 0.000 description 43
- 230000008569 process Effects 0.000 description 39
- 238000012545 processing Methods 0.000 description 30
- 239000010410 layer Substances 0.000 description 27
- 238000010586 diagram Methods 0.000 description 24
- 238000013461 design Methods 0.000 description 18
- 238000004364 calculation method Methods 0.000 description 16
- 230000032258 transport Effects 0.000 description 14
- 230000004913 activation Effects 0.000 description 10
- 238000003384 imaging method Methods 0.000 description 9
- 230000008859 change Effects 0.000 description 6
- 239000010408 film Substances 0.000 description 5
- 230000001965 increasing effect Effects 0.000 description 5
- 238000005452 bending Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000003213 activating effect Effects 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000005484 gravity Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- -1 exposure Substances 0.000 description 1
- 238000005755 formation reaction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02233—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area
- H01L2224/0224—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08135—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/08145—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7501—Means for cleaning, e.g. brushes, for hydro blasting, for ultrasonic cleaning, for dry ice blasting, using gas-flow, by etching, by applying flux or plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75743—Suction holding means
- H01L2224/75744—Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75743—Suction holding means
- H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75753—Means for optical alignment, e.g. sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/758—Means for moving parts
- H01L2224/75801—Lower part of the bonding apparatus, e.g. XY table
- H01L2224/75804—Translational mechanism
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/75981—Apparatus chuck
- H01L2224/75982—Shape
- H01L2224/75983—Shape of the mounting surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80009—Pre-treatment of the bonding area
- H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
- H01L2224/80013—Plasma cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/8013—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/80132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Shaping Of Tube Ends By Bending Or Straightening (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
特許文献1 特開2013−098186号公報
Claims (17)
- 2つの基板を接合して積層基板を製造する製造方法であって、
複数の基板の結晶構造に関する情報を取得する取得段階と、
前記結晶構造に関する情報に基づいて、互いに接合する2つの基板の組み合わせを決定する決定段階と、
を含む製造方法。 - 前記結晶構造に関する情報は、基板の接合面の面方位および前記接合面と平行な方向の結晶方位の少なくとも一方を含む請求項1に記載の製造方法。
- 前記決定段階において、2つの基板の接合後の位置ずれ量が予め定められた閾値以下となる組み合わせを決定する請求項1または2に記載の製造方法。
- 前記決定段階において、前記2つの基板の接合面の面方位が予め定められた組み合せとなる組み合わせを決定する請求項1から3のいずれか一項に記載の製造方法。
- 前記結晶構造に関する情報と、前記2つの基板のそれぞれにおける接合面の剛性分布に関する情報とを対応付けて格納する段階をさらに含み、
前記決定段階において、前記2つの基板のそれぞれにおける前記接合面の剛性分布が予め定められた剛性分布となる組み合わせを決定する請求項1から4のいずれか1項に記載の製造方法。 - 前記決定段階において、前記2つの基板の一方に対する他方の接合面内での回転の量を決定する段階をさらに含む請求項1から5のいずれか1項に記載の製造方法。
- 前記回転の量に基づいて露光をする露光条件を露光装置に出力する段階をさらに含む請求項6に記載の製造方法。
- 前記回転の量に基づいて、前記2つの基板の少なくとも一方を接合時に保持する保持条件を接合装置に出力する段階をさらに含む請求項6または7に記載の製造方法。
- 2つの基板を接合して積層基板を製造する製造方法であって、
複数の基板の剛性分布に関する情報を取得する取得段階と、
前記剛性分布に関する情報に基づいて、互いに接合する2つの基板の組み合わせを決定する決定段階と、
を含む製造方法。 - 2つの基板を接合して積層基板を製造する製造方法であって、
前記2つの基板の接合面の面方位、前記接合面と平行な方向の結晶方位、および、剛性分布の少なくとも一つが異なる前記2つの基板を位置合わせする段階と、
位置合わせした前記2つの基板を接合する段階と、
を含む製造方法。 - 2つの基板を接合して積層基板を製造する製造装置であって、
複数の基板の結晶構造に関する情報を取得する取得部と、
前記結晶構造に関する情報に基づいて、互いに接合する前記2つの基板の組み合わせを決定する決定部と、
を備える製造装置。 - 2つの基板を接合して積層基板を製造する製造装置であって、
複数の基板の剛性分布に関する情報を取得する取得部と、
前記剛性分布に関する情報に基づいて、互いに接合する前記2つの基板の組み合わせを決定する決定部と、
を備える製造装置。 - 2つの基板を接合して積層基板を製造する製造装置であって、
前記2つの基板の接合面の面方位、前記接合面と平行な方向の結晶方位、および、剛性分布の少なくとも一つが異なる前記2つの基板を位置合わせする位置合わせ部と、
位置合わせした前記2つの基板を接合する接合部と、
を備える製造装置。 - 基板にパターンを形成する露光装置であって、
前記基板に接合される他の基板に対する前記基板の接合面内での回転角度に基づいて前記基板にパターンを露光し、前記回転角度は、前記基板および前記他の基板の結晶構造および剛性分布の少なくとも一方に関する情報に基づいて設定される露光装置。 - 2つの基板を接合して積層基板を製造する場合に、複数の基板の結晶構造に関する情報を取得するステップと、前記結晶構造に関する情報に基づいて、互いに接合する前記2つの基板の組み合わせを決定する決定ステップとを、電子計算機に実行させるプログラム。
- 2つの基板を接合して積層基板を製造する場合に、複数の基板の剛性分布に関する情報を取得するステップと、前記剛性分布に関する情報に基づいて、互いに接合する前記2つの基板の組み合わせを決定する決定ステップとを、電子計算機に実行させるプログラム。
- 互いに積層された2つの基板を有する積層半導体装置であって、
前記2つの基板の接合面の面方位、前記接合面と平行な方向の結晶方位、および、剛性分布の少なくとも一つが互いに異なる積層半導体装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017213066 | 2017-11-02 | ||
JP2017213066 | 2017-11-02 | ||
PCT/JP2018/037624 WO2019087707A1 (ja) | 2017-11-02 | 2018-10-09 | 積層基板の製造方法、製造装置、およびプログラム |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2019087707A1 true JPWO2019087707A1 (ja) | 2020-04-09 |
JP7147778B2 JP7147778B2 (ja) | 2022-10-05 |
Family
ID=66333510
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019550958A Active JP7147778B2 (ja) | 2017-11-02 | 2018-10-09 | 積層基板の製造方法、および製造装置 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11362059B2 (ja) |
JP (1) | JP7147778B2 (ja) |
KR (2) | KR102523425B1 (ja) |
CN (1) | CN111133556B (ja) |
TW (1) | TWI801437B (ja) |
WO (1) | WO2019087707A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110416078A (zh) * | 2019-08-02 | 2019-11-05 | 武汉新芯集成电路制造有限公司 | 光刻工艺的扩张补偿的确定方法、装置及器件的制造方法 |
JP7221413B2 (ja) * | 2019-10-10 | 2023-02-13 | 東京エレクトロン株式会社 | 接合システムおよび重合基板の検査方法 |
CN113990790B (zh) * | 2021-12-24 | 2022-03-18 | 湖北三维半导体集成创新中心有限责任公司 | 键合系统和键合方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012038860A (ja) * | 2010-08-05 | 2012-02-23 | Nikon Corp | 半導体基板の積層方法、半導体基板の積層装置およびデバイスの製造方法 |
WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120231218A1 (en) * | 2009-09-18 | 2012-09-13 | Sumitomo Electric Industries, Ltd. | Substrate, manufacturing method of substrate, saw device and device |
JP5681937B2 (ja) | 2010-11-25 | 2015-03-11 | 株式会社パウデック | 半導体素子およびその製造方法 |
JP2013098186A (ja) | 2011-10-27 | 2013-05-20 | Mitsubishi Heavy Ind Ltd | 常温接合装置 |
FR2985370A1 (fr) * | 2011-12-29 | 2013-07-05 | Commissariat Energie Atomique | Procede de fabrication d'une structure multicouche sur un support |
EP2913841B1 (en) * | 2012-10-26 | 2020-05-06 | Nikon Corporation | Substrate bonding apparatus, aligning apparatus, substrate bonding method, aligning method, and laminated semiconductor device manufacturing method |
JP6640546B2 (ja) * | 2015-12-18 | 2020-02-05 | 東京エレクトロン株式会社 | 接合装置、接合システムおよび接合方法 |
-
2018
- 2018-10-09 KR KR1020227012453A patent/KR102523425B1/ko active IP Right Grant
- 2018-10-09 WO PCT/JP2018/037624 patent/WO2019087707A1/ja active Application Filing
- 2018-10-09 CN CN201880062261.2A patent/CN111133556B/zh active Active
- 2018-10-09 JP JP2019550958A patent/JP7147778B2/ja active Active
- 2018-10-09 KR KR1020207011083A patent/KR102388201B1/ko active IP Right Grant
- 2018-10-17 TW TW107136438A patent/TWI801437B/zh active
-
2020
- 2020-04-30 US US16/862,982 patent/US11362059B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012038860A (ja) * | 2010-08-05 | 2012-02-23 | Nikon Corp | 半導体基板の積層方法、半導体基板の積層装置およびデバイスの製造方法 |
WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
Also Published As
Publication number | Publication date |
---|---|
US20200273836A1 (en) | 2020-08-27 |
KR102523425B1 (ko) | 2023-04-19 |
CN111133556B (zh) | 2024-02-02 |
KR20200052958A (ko) | 2020-05-15 |
US11362059B2 (en) | 2022-06-14 |
WO2019087707A1 (ja) | 2019-05-09 |
JP7147778B2 (ja) | 2022-10-05 |
TW201931431A (zh) | 2019-08-01 |
KR102388201B1 (ko) | 2022-04-19 |
KR20220051421A (ko) | 2022-04-26 |
CN111133556A (zh) | 2020-05-08 |
TWI801437B (zh) | 2023-05-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7494875B2 (ja) | 基板重ね合わせ装置および基板処理方法 | |
JP5354382B2 (ja) | 基板貼り合わせ装置及び基板貼り合わせ方法、並びに積層半導体装置の製造方法 | |
TWI430390B (zh) | 減少疊對未對準之直接接合方法 | |
JP7416119B2 (ja) | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 | |
JP7147778B2 (ja) | 積層基板の製造方法、および製造装置 | |
WO2017217431A1 (ja) | 積層装置および積層方法 | |
WO2018221391A1 (ja) | 基板貼り合わせ方法、積層基板製造装置及び積層基板製造システム | |
JP2014138041A (ja) | 処理装置及びデバイスの製造方法 | |
TWI828760B (zh) | 基板貼合裝置、參數計算裝置、基板貼合方法及參數計算方法 | |
TW200837805A (en) | Exposure apparatus and device manufacturing method | |
JP2011066090A (ja) | 基板移載装置、基板位置合わせ装置、基板移載方法およびデバイスの製造方法 | |
JP2024045175A (ja) | 積層基板の製造方法および製造装置 | |
KR102478503B1 (ko) | 접합 방법 및 접합 장치 | |
KR102370325B1 (ko) | 위치 맞춤 방법 및 위치 맞춤 장치 | |
WO2023153317A1 (ja) | 基板補正装置、基板積層装置、基板処理システム、基板補正方法、基板処理方法、および半導体装置の製造方法 | |
JP2004325217A (ja) | 搬送装置 | |
JP5798721B2 (ja) | 基板位置合せ装置、基板貼り合せ装置、基板位置合せ方法および積層半導体の製造方法 | |
JP2019071329A (ja) | 基板接合方法および基板接合装置 | |
JP2024017814A (ja) | 接合装置、接合方法、および物品の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20191210 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20201104 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20201218 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210218 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210706 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210817 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20220111 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20220309 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220412 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20220823 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20220905 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7147778 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |