JPWO2014049885A1 - Iii族窒化物半導体素子およびその製造方法 - Google Patents
Iii族窒化物半導体素子およびその製造方法 Download PDFInfo
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- JPWO2014049885A1 JPWO2014049885A1 JP2014538076A JP2014538076A JPWO2014049885A1 JP WO2014049885 A1 JPWO2014049885 A1 JP WO2014049885A1 JP 2014538076 A JP2014538076 A JP 2014538076A JP 2014538076 A JP2014538076 A JP 2014538076A JP WO2014049885 A1 JPWO2014049885 A1 JP WO2014049885A1
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- Prior art keywords
- layer
- group iii
- iii nitride
- nitride semiconductor
- support
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Abstract
Description
(1)成長用基板の上にリフトオフ層を介して、第1導電型III族窒化物半導体層、活性層および第2導電型III族窒化物半導体層を順次積層してなる半導体積層体を形成する工程と、
該半導体積層体の一部を除去して、前記成長用基板の一部が底部で露出する複数の溝を格子状に形成することで、横断面の形状が略四角形の半導体構造部を複数個形成する工程と、
前記複数の溝を、一方向に一列おきに充填材で塞ぐ工程と、
メッキ法により、複数個の前記半導体構造部を一体支持する支持体を形成する工程と、
該支持体に、前記充填材に連通する貫通孔を形成する工程と、
前記充填材を除去して空隙を形成する工程と、
前記貫通孔から前記空隙へとエッチング液を供給して、それぞれの前記半導体構造部の1つの側面のみから前記リフトオフ層のエッチングを進行させ、前記リフトオフ層を除去する工程と、
前記第1および第2導電型III族窒化物半導体層とそれぞれ電気的に接続する第1および第2電極を形成する工程と、
前記複数の溝に沿って前記支持体を切断する個片化工程と、
を有し、該個片化工程では、前記充填材を設けた溝以外の少なくとも一部の溝に沿って前記支持体を切断することにより、切断後の前記支持体のそれぞれにm×n列の半導体構造部(ここでmは自然数、nは2以上の偶数である)が支持されたIII族窒化物半導体素子を作製することを特徴とするIII族窒化物半導体素子の製造方法。
前記第1または第2電極の他方の電極の、片方の前記半導体構造部と接続する第1の部分と、他方の前記半導体構造部と接続する第2の部分とを、隣接して位置させる上記(2)に記載のIII族窒化物半導体素子の製造方法。
該支持体上に設けられ、第2導電型III族窒化物半導体層、活性層および第1導電型III族窒化物半導体層をこの順に有し、横断面の形状が略四角形の2つの半導体構造部と、
前記第1および第2導電型III族窒化物半導体層とそれぞれ電気的に接続する第1および第2電極と、
を有するIII族窒化物半導体素子であって、
前記2つの半導体構造部は、それぞれの1つの側面同士が向かい合って位置し、
前記支持体が、前記半導体構造部における4つの側面のうち残りの3つの側面、または、対向する他の2つの側面を覆うことを特徴とするIII族窒化物半導体素子。
前記第1または第2電極の他方の電極の、片方の前記半導体構造部と接続する第1の部分と、他方の前記半導体構造部と接続する第2の部分とが、隣接して位置する上記(4)に記載のIII族窒化物半導体素子。
他方の電極は前記支持体と前記半導体構造部との間から引き出され、前記2つの半導体構造部の間で露出している上記(5)に記載のIII族窒化物半導体素子。
本発明の一実施形態にかかるIII族窒化物半導体素子100の製造方法を、図1〜3および図4,5により説明する。まず、図1〜3と図4,5との対応関係を先に説明する。図4(A)は、図1(B)に示した状態の活性層110における横断面図であり、図4(A)のI−I断面が図1(B)に相当する。なお、図1(B)以外の断面図も同様の位置でのものであるが、樹脂134は図4(B)の樹脂134の位置に在るものを投影して描写している。また、図4(A)以外の横断面図も、同様に活性層110の位置でのものである。図4(B)は、図2(A)に示した状態の横断面図であるが、樹脂134の位置も追記している。図5(A)は、図3(A)に示した状態の横断面図である。図5(B)は、図3(B)に示した状態の横断面図である。
次に、図8〜図16を参照して、本発明の他の実施形態にかかるIII族窒化物半導体素子300の製造方法について説明する。まず、図8〜図14の断面図と図15,16の上面図との対応関係を先に説明する。図15(A)は図8(B)に対応する上面図であり、図15(A)のII−II断面が図8(B)に対応する。なお、図8(B)以外の断面図も同様の位置でのものであるが、第2樹脂334と第3樹脂341については図16(B)の第2樹脂334の位置に在るものを投影して描写している。図15(B)は図9(A)に対応する上面図である。図16(A)は図9(B)に対応する上面図である。図16(B)は図10(B)に対応する上面図である。
次に、図17,18を参照して、本発明の他の実施形態にかかるIII族窒化物半導体素子400を説明する。本実施形態については、第1および第2の実施形態と異なる点を重点的に説明する。図17(A)は、III族窒化物半導体素子400の一部の断面図であり、第2の実施形態における図14と同じ段階で、右側の素子のみを描いたものである。図17(B)は、図17(A)と直交する断面図である。図18(A)は、III族窒化物半導体素子400の模式斜視図であり、図18(B)は、III族窒化物半導体素子400の上面図である。図18(C)は、図18(B)のIII−III断面図である。
図1〜5に示す製造方法で、図6に示すLEDチップを作製した。具体的には、まず、サファイア基板上に、スパッタ法によりCr層を形成しアンモニアを含む雰囲気中で熱処理することによりリフトオフ層(CrN層、厚さ:18nm)を形成後、n型GaN層(厚さ:7μm)、発光層(InGaN系MQW層、厚さ:0.1μm)、p型GaN層(厚さ:0.2μm)をMOCVD法により順次エピタキシャル成長させて半導体積層体を形成した。その後、サファイア基板の一部が露出するよう、半導体積層体の一部をドライエッチングにより除去して格子状の溝を形成することで、横断面の形状が正方形の島状に独立した複数個の半導体構造部を形成した。半導体構造部の幅Wは1200μmであり、個々の素子の配置は碁盤の目状とした。素子間のピッチは1300μm、すなわち溝幅は100μmである。
図19および図20に示す従来の製造方法でLEDチップを作製した。具体的には、まず、サファイア基板上に、実施例と同じ半導体積層体を形成し、その後、サファイア基板の一部が露出するよう、半導体積層体の一部をドライエッチングにより除去して溝を形成することで、横断面の形状が直径1000μmの円形の島状に独立した複数個の半導体構造部を形成した。半導体構造部の素子間のピッチは1250μmである。
図8(A)から図10(B)までを行い、その後2段階メッキを行なうことなく、ケミカルリフトオフ法によりLEDチップを作製した。具体的には、まず、図8(A)に示すように、サファイア基板上に、スパッタ法によりCr層を形成しアンモニアを含む雰囲気中で熱処理することによりリフトオフ層(CrN層、厚さ:18nm)を形成後、i型GaN層(厚さ:4μm)、n型GaN層(厚さ:6μm)、発光層(AlInGaN系MQW層、厚さ:0.1μm)、p型GaN層(厚さ:0.2μm)をMOCVD法により順次エピタキシャル成長させた。
図8(A)〜図14に示す2段階メッキの製造方法で、図14に示すLEDチップを作製した。図10(B)および図16(B)の工程までは実施例2と同様なので、説明を省略する。
102 成長用基板
104 リフトオフ層
108 n型III族窒化物半導体層
110 活性層
112 p型III族窒化物半導体層
113 半導体積層体
114 半導体構造部
116 溝
124 第1樹脂(充填材)
126 メッキシード層
134 樹脂の柱(ピラー)
146 支持体
146A 切断後の支持体
142 埋め込み部
143 貫通孔
144 空隙
148 n側電極
150A 側面(エッチング液を供給する側面)
150B 対向する2つの側面
150C 側面(エッチング終了時にエッチング液が到達する側面)
122 絶縁層
Claims (8)
- 成長用基板の上にリフトオフ層を介して、第1導電型III族窒化物半導体層、活性層および第2導電型III族窒化物半導体層を順次積層してなる半導体積層体を形成する工程と、
該半導体積層体の一部を除去して、前記成長用基板の一部が底部で露出する複数の溝を格子状に形成することで、横断面の形状が略四角形の半導体構造部を複数個形成する工程と、
前記複数の溝を、一方向に一列おきに充填材で塞ぐ工程と、
メッキ法により、複数個の前記半導体構造部を一体支持する支持体を形成する工程と、
該支持体に、前記充填材に連通する貫通孔を形成する工程と、
前記充填材を除去して空隙を形成する工程と、
前記貫通孔から前記空隙へとエッチング液を供給して、それぞれの前記半導体構造部の1つの側面のみから前記リフトオフ層のエッチングを進行させ、前記リフトオフ層を除去する工程と、
前記第1および第2導電型III族窒化物半導体層とそれぞれ電気的に接続する第1および第2電極を形成する工程と、
前記複数の溝に沿って前記支持体を切断する個片化工程と、
を有し、該個片化工程では、前記充填材を設けた溝以外の少なくとも一部の溝に沿って前記支持体を切断することにより、切断後の前記支持体のそれぞれにm×n列の半導体構造部(ここでmは自然数、nは2以上の偶数である)が支持されたIII族窒化物半導体素子を作製することを特徴とするIII族窒化物半導体素子の製造方法。 - 前記個片化工程では、前記充填材を設けた溝以外の全ての溝に沿って前記支持体を切断することにより、切断後の前記支持体のそれぞれに2つの半導体構造部が支持されたIII族窒化物半導体素子を作製することを特徴とする請求項1に記載のIII族窒化物半導体素子の製造方法。
- 前記第1または第2電極の少なくとも一方の電極は、前記支持体を兼ねており、
前記第1または第2電極の他方の電極の、片方の前記半導体構造部と接続する第1の部分と、他方の前記半導体構造部と接続する第2の部分とを、隣接して位置させる請求項2に記載のIII族窒化物半導体素子の製造方法。 - 支持体と、
該支持体上に設けられ、第2導電型III族窒化物半導体層、活性層および第1導電型III族窒化物半導体層をこの順に有し、横断面の形状が略四角形の2つの半導体構造部と、
前記第1および第2導電型III族窒化物半導体層とそれぞれ電気的に接続する第1および第2電極と、
を有するIII族窒化物半導体素子であって、
前記2つの半導体構造部は、それぞれの1つの側面同士が向かい合って位置し、
前記支持体が、前記半導体構造部における4つの側面のうち残りの3つの側面、または、対向する他の2つの側面を覆うことを特徴とするIII族窒化物半導体素子。 - 前記第1または第2電極の少なくとも一方の電極は、前記支持体を兼ねており、
前記第1または第2電極の他方の電極の、片方の前記半導体構造部と接続する第1の部分と、他方の前記半導体構造部と接続する第2の部分とが、隣接して位置する請求項4に記載のIII族窒化物半導体素子。 - 前記第1または第2電極の両方が前記支持体を兼ねる請求項5に記載のIII族窒化物半導体素子。
- 前記第1または第2の電極の一方のみが前記支持体を兼ね、
他方の電極は前記支持体と前記半導体構造部との間から引き出され、前記2つの半導体構造部の間で露出している請求項5に記載のIII族窒化物半導体素子。 - 複数個の請求項4〜7のいずれか1項に記載のIII族窒化物半導体素子が、前記支持体において一体となり、m×n列の半導体構造部(ここでmは自然数、nは2以上の偶数である)を有するIII族窒化物半導体素子。
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