JPWO2012029526A1 - Semiconductor package and semiconductor device - Google Patents

Abstract

An object of the present invention is to provide a semiconductor package and a semiconductor device capable of preventing the occurrence of defects due to heat. The present invention provides a substrate and a first conductor provided on one surface side of the substrate. A wiring board provided with a pattern and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern; and joined to the one surface of the substrate; A semiconductor element electrically connected to one conductor pattern; and a first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller thermal expansion coefficient than the substrate. A semiconductor package comprising a second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate is provided as a first semiconductor package.

Description

  The present invention relates to a semiconductor package and a semiconductor device.

  In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and further high-density mounting of electronic components have progressed. Semiconductor packages used in these electronic devices have been In addition, the size and number of pins are increasing.

  With the miniaturization of semiconductor packages, the conventional package using a lead frame has a limit on miniaturization. Therefore, recently, it is assumed that a chip is mounted on a circuit board, and BGA (Ball Grid) is used. Array) and a new area mounting type packaging method such as CSP (Chip Scale Package) have been proposed (for example, see Patent Document 1).

  In general, an interposer used for a new package such as BGA or CSP is formed by forming a conductor pattern or a conductor post on a substrate obtained by impregnating a fiber base material with a resin composition.

Such an interposer has a large difference in thermal expansion coefficient from the chip. Further, since the interposer usually has a larger area than the chip, the area of the portion not in contact with the chip is large. Such a portion that is not in contact with the chip has a very low rigidity, and thus tends to warp due to the difference in thermal expansion between the chip and the interposer as described above, resulting in a problem that reliability of electrical connection is lowered.
Moreover, since the chip generates heat, the interposer is required to have excellent heat dissipation. In addition, when such a semiconductor package is manufactured, excellent workability is required.

JP 2002-270716 A

  An object of the present invention is to provide a semiconductor package and a semiconductor device that can prevent the occurrence of defects due to heat.

Such an object is achieved by the following (1) to (7) as the first semiconductor package.
(1) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package comprising: a second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate.

  (2) The semiconductor package according to (1), wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element.

  (3) The semiconductor package according to (1) or (2), wherein each of the first reinforcing member and the second reinforcing member has a plate shape.

(4) A plurality of metal bumps are bonded to the surface of the second conductor pattern opposite to the substrate,
The semiconductor package according to any one of (1) to (3), wherein the second reinforcing member has a plurality of openings formed so as to surround the metal bumps without contacting the metal bumps.

  (5) The semiconductor package according to any one of (1) to (4), wherein each of the first reinforcing member and the second reinforcing member has a difference in thermal expansion coefficient from the semiconductor element of 7 ppm / ° C. or less. .

  (6) The semiconductor package according to any one of (1) to (5), wherein each of the first reinforcing member and the second reinforcing member is made of a metal material.

  (7) The semiconductor package according to (6), wherein the metal material is an Fe—Ni alloy.

Further, the above object is achieved by the following (8) to (18) as the second semiconductor package.
(8) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A part of said 1st reinforcement member is contacting the said semiconductor element, The semiconductor package characterized by the above-mentioned.

(9) The first reinforcing member has a main body portion and a convex portion formed so as to protrude from the main body portion toward the semiconductor element,
The semiconductor package according to (8), wherein the convex portion is in contact with the semiconductor element.

  (10) The semiconductor package according to (9), wherein a surface of the convex portion opposite to the substrate is in contact with a surface of the semiconductor element on the substrate side.

(11) The first reinforcing member has a plate shape,
The semiconductor package according to (9) or (10), wherein the substrate-side surface of the main body portion and the substrate-side surface of the convex portion are located on the same surface.

  (12) The main body according to any one of (9) to (11), wherein the main body is provided so as to surround the periphery of the semiconductor element with a gap between the side end of the semiconductor element. Semiconductor package.

  (13) The semiconductor package according to (12), wherein the convex portion is formed on an inner peripheral portion of the main body portion over the entire circumference of the main body portion.

  (14) The semiconductor package according to (13), wherein the convex portion is in contact with the semiconductor element over the entire circumference of the semiconductor element.

  (15) The semiconductor package according to any one of (9) to (14), wherein the convex portion is in contact with a corner portion of the semiconductor element.

  (16) The semiconductor package according to any one of (8) to (15), wherein the first reinforcing member has a plate shape.

  (17) The semiconductor package according to (16), wherein the surface of the first reinforcing member opposite to the substrate and the surface of the semiconductor element opposite to the substrate are located on the same surface.

  (18) The semiconductor package according to any one of (8) to (17), further including a second reinforcing member that is bonded to the other surface of the substrate and has a smaller thermal expansion coefficient than the substrate.

  In the second semiconductor package of the present invention, it is preferable that the first reinforcing member and the second reinforcing member are connected to each other and has a heat conducting portion having higher heat conductivity than the substrate.

  In the second semiconductor package of the present invention, it is preferable that the heat conducting portion penetrates the substrate in the thickness direction.

  In the second semiconductor package of the present invention, it is preferable that the heat conducting portion does not contribute to transmission of an electric signal.

Further, the above object is achieved by the following (19) to (27) as the third semiconductor package.
(19) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package comprising a gap between the first reinforcing member and the semiconductor element, wherein all or a part of the gap is filled with a thermally conductive material having a higher thermal conductivity than the substrate. .

  (20) The semiconductor package according to (19), wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element.

(21) The first reinforcing member is provided so as to surround the semiconductor element and to form a gap with the semiconductor element over the entire circumference of the semiconductor element.
The semiconductor package according to (19), wherein the thermally conductive material is filled in the entire gap.

  (22) The semiconductor package according to any one of (19) to (21), wherein the thermal conductivity of the thermal conductive material is 0.5 to 100 W / (m · K).

  (23) The semiconductor package according to any one of (19) to (22), wherein the thermally conductive material has an insulating property.

  (24) The semiconductor package according to any one of (19) to (23), wherein the thermally conductive material is formed of a resin composition.

  (25) The semiconductor package according to any one of (19) to (24), wherein the first reinforcing member has a plate shape.

  (26) The semiconductor package according to (25), wherein the surface of the first reinforcing member opposite to the substrate and the surface of the semiconductor element opposite to the substrate are located on the same surface.

  (27) The semiconductor package according to any one of (19) to (26), further including a second reinforcing member that is bonded to the other surface of the substrate and has a smaller coefficient of thermal expansion than the substrate.

  In the third semiconductor package of the present invention, it is preferable that the first reinforcing member and the second reinforcing member are connected to each other and have a heat conducting portion having higher heat conductivity than the substrate.

  In the third semiconductor package of the present invention, it is preferable that the heat conducting portion penetrates the substrate in the thickness direction.

  In the third semiconductor package of the present invention, it is preferable that the heat conducting portion does not contribute to transmission of an electric signal.

Further, the above object is achieved by the following (28) to (38) as the fourth semiconductor package.
(28) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
The first reinforcing member and the semiconductor element are disposed on a surface opposite to the substrate so as to straddle between the first reinforcing member and the semiconductor element, and have a first thermal conductivity higher than that of the substrate. A semiconductor package comprising a heat conducting portion.

  (29) The semiconductor package according to (28), wherein the first heat conducting unit is a heat sink having a heat dissipation property.

  (30) The semiconductor package according to (28) or (29), wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element.

  (31) The semiconductor according to (28) or (29), wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element through a gap between a side end portion of the semiconductor element. package.

  (32) The semiconductor package according to (31), wherein the first heat conducting unit has a heat radiation fin in a portion crossing the gap.

  (33) The semiconductor package according to any one of (28) to (32), wherein the thermal conductivity of the first thermal conduction unit is 10 to 1000 W / (m · K).

  (34) The semiconductor package according to any one of (28) to (33), wherein the first heat conducting unit is made of a metal material.

  (35) The semiconductor package according to any one of (28) to (34), wherein a coefficient of thermal expansion of the first heat conducting unit is smaller than a coefficient of thermal expansion of the substrate.

  (36) The semiconductor package according to any one of (28) to (35), wherein the first reinforcing member has a plate shape.

  (37) The semiconductor package according to (36), wherein the surface of the first reinforcing member opposite to the substrate and the surface of the semiconductor element opposite to the substrate are located on the same surface.

  (38) The semiconductor package according to any one of (28) to (37), further including a second reinforcing member that is bonded to the other surface of the substrate and has a smaller coefficient of thermal expansion than the substrate.

  In the fourth semiconductor package of the present invention, it is preferable that the first reinforcing member and the second reinforcing member are connected to each other and have a heat conductive portion having higher heat conductivity than the substrate.

  In the fourth semiconductor package of the present invention, it is preferable that the heat conducting portion penetrates the substrate in the thickness direction.

  In the fourth semiconductor package of the present invention, it is preferable that the heat conducting portion does not contribute to transmission of an electric signal.

Such an object is achieved by the following (39) to (46) as the fifth semiconductor package.
(39) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A plate-like semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A plate-like reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
The semiconductor package, wherein the surface of the reinforcing member opposite to the substrate is located on the same surface as the surface of the semiconductor element opposite to the substrate or closer to the substrate.

(40) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package, wherein a surface of the first reinforcing member opposite to the substrate is located on the same surface as the surface of the semiconductor element opposite to the substrate or closer to the substrate.

  (41) The semiconductor package according to (40), wherein a thickness of the first reinforcing member is equal to or less than a thickness of the semiconductor element.

  (42) The semiconductor package according to (40) or (41), wherein the first reinforcing member has a frame shape so as to surround the periphery of the semiconductor element.

  (43) The semiconductor package according to (42), wherein an inner side surface of the first reinforcing member is inclined so that a width of a gap between the first reinforcing member and the side surface of the semiconductor element gradually decreases toward the substrate side. .

  (44) The semiconductor package according to (42) or (43), wherein the thickness of the first reinforcing member gradually decreases from the outside toward the inside.

  (45) The semiconductor package according to any one of (40) to (44), wherein each of the first reinforcing member and the second reinforcing member has a thermal expansion coefficient of 0.5 ppm / ° C. or more and 10 ppm / ° C. or less. .

  (46) The semiconductor package according to any one of (40) to (45), wherein each of the first reinforcing member and the second reinforcing member has a difference in thermal expansion coefficient from the semiconductor element of 7 ppm / ° C. or less. .

The above object is achieved by the sixth semiconductor package of the present invention as described below in (47) to (54).
(47) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package, wherein a thermal expansion coefficient of the first reinforcing member and a thermal expansion coefficient of the second reinforcing member are different from each other.

  (48) The difference between the thermal expansion coefficient of the first reinforcing member and the thermal expansion coefficient of the second reinforcing member is set so as to prevent or suppress warpage associated with thermal expansion or thermal contraction of the substrate. (47) The semiconductor package according to (47).

  (49) The semiconductor package according to (47) or (48), wherein a thermal expansion coefficient of the first reinforcing member is larger than a thermal expansion coefficient of the second reinforcing member.

  (50) The semiconductor package according to any one of (47) to (49), wherein the thermal expansion coefficients of the first reinforcing member and the second reinforcing member are 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, respectively. .

  (51) The semiconductor package according to any one of (47) to (50), wherein each of the first reinforcing member and the second reinforcing member has a difference in thermal expansion coefficient from the semiconductor element of 7 ppm / ° C. or less. .

  (52) The semiconductor package according to any one of (47) to (51), wherein at least one of the first reinforcing member and the second reinforcing member is made of an Fe—Ni-based alloy.

  (53) The semiconductor package according to any one of (48) to (52), wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element.

  (54) The semiconductor package according to any one of (48) to (53), wherein each of the first reinforcing member and the second reinforcing member has a plate shape.

The above object is achieved by the seventh semiconductor package of the present invention as described in (55) to (64) below.
(55) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
The semiconductor package according to claim 1, wherein an average thickness of the first reinforcing member is different from an average thickness of the second reinforcing member.

  (56) The semiconductor package according to (55), wherein an average thickness of the first reinforcing member is thicker than an average thickness of the second reinforcing member.

  (57) The semiconductor according to (56), wherein t1 / t2 is 1.1 to 40, where t1 is an average thickness of the first reinforcing member and t2 is an average thickness of the second reinforcing member. package.

  (58) The semiconductor package according to (55), wherein an average thickness of the second reinforcing member is thicker than an average thickness of the first reinforcing member.

  (59) In the above (58), when the average thickness of the first reinforcing member is t1, and the average thickness of the second reinforcing member is t2, t1 / t2 is 0.02 to 0.98. Semiconductor package.

  (60) The semiconductor package according to any one of (55) to (56), wherein an average thickness of each of the first reinforcing member and the second reinforcing member is 0.02 mm to 0.8 mm.

  (61) The semiconductor package according to any one of (55) to (60), wherein the constituent material of the first reinforcing member and the constituent material of the second reinforcing member are the same.

  (62) The semiconductor package according to any one of (55) to (61), wherein at least one of the first reinforcing member and the second reinforcing member is made of an Fe—Ni alloy.

  (63) The semiconductor package according to any one of (55) to (62), wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element.

  (64) The semiconductor package according to any one of (55) to (63), wherein each of the first reinforcing member and the second reinforcing member has a plate shape.

  In the seventh semiconductor package of the present invention, it is preferable that the first reinforcing member and the second reinforcing member are connected to each other and has a heat conducting portion having higher heat conductivity than the substrate.

  In the seventh semiconductor package of the present invention, it is preferable that the heat conducting portion penetrates the substrate in the thickness direction.

  In the seventh semiconductor package of the present invention, it is preferable that the heat conducting part does not contribute to transmission of an electric signal.

  In order to achieve the above object, the present invention provides a semiconductor device comprising the first to seventh semiconductor packages.

  According to the first semiconductor package of the present invention, since both surfaces of the wiring board (interposer) are reinforced by the first reinforcing member and the second reinforcing member even in a portion other than the portion bonded to the semiconductor element, the entire semiconductor package is provided. Increased rigidity. In particular, since the thermal expansion coefficients of the first reinforcing member and the second reinforcing member are smaller than those of the substrate, the heat generated between the wiring substrate and the semiconductor element is the same as when the semiconductor element is provided over the entire surface of the wiring substrate. It is possible to suppress or prevent the warping of the wiring board due to the difference in expansion coefficient. As a result, the connection reliability of the metal bump connecting the semiconductor element and the board, the connection reliability of the conductor pattern / conductor post inside the board, and Improve the connection reliability of metal bumps that connect the board and motherboard.

  Further, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. Therefore, the semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation. Further, since the temperature rise of the semiconductor element and the wiring board can be suppressed, the warping of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element can also be suppressed or prevented.

  According to the second semiconductor package of the present invention, since one surface of the wiring board (interposer) is reinforced by the first reinforcing member even in a portion other than the portion joined to the semiconductor element, the rigidity of the entire semiconductor package is increased. Increase. In particular, since the thermal expansion coefficient of the first reinforcing member is smaller than that of the substrate, the semiconductor element is caused by the difference in thermal expansion coefficient between the wiring substrate and the semiconductor element, similarly to the case where the semiconductor element is provided over the entire surface of the wiring substrate. The warping of the wiring board can be suppressed or prevented.

  Further, in the second semiconductor package of the present invention, since a part of the first reinforcing member is in contact with the semiconductor element, the heat from the semiconductor element is efficiently transferred to the first reinforcing member, and the first reinforcing member It is possible to escape through the air and has excellent heat dissipation. Further, by providing the first reinforcing member, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. it can. Therefore, the semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation. Further, since the temperature rise of the semiconductor element and the wiring board can be suppressed, the warping of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element can also be suppressed or prevented.

  According to the third semiconductor package of the present invention, since one surface of the wiring board (interposer) is reinforced by the first reinforcing member even in a portion other than the portion joined to the semiconductor element, the rigidity of the entire semiconductor package is increased. Increase. In particular, since the thermal expansion coefficient of the first reinforcing member is smaller than that of the substrate, the semiconductor element is caused by the difference in thermal expansion coefficient between the wiring substrate and the semiconductor element, similarly to the case where the semiconductor element is provided over the entire surface of the wiring substrate. The warping of the wiring board can be suppressed or prevented.

  In addition, since the gap between the first reinforcing member and the semiconductor element is filled with the heat conductive material having higher heat conductivity than the substrate, the heat from the semiconductor element is transferred to the first through the heat conductive material. The heat can be efficiently transmitted to the reinforcing member and can be released through the first reinforcing member, and the heat dissipation is excellent. Further, by providing the first reinforcing member, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. it can. Therefore, the third semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation. Further, since the temperature rise of the semiconductor element and the wiring board can be suppressed, the warping of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element can also be suppressed or prevented.

  According to the fourth semiconductor package of the present invention, since one surface of the wiring board (interposer) is reinforced by the first reinforcing member even in a portion other than the portion joined to the semiconductor element, the rigidity of the entire semiconductor package is increased. Increase. In particular, since the thermal expansion coefficient of the first reinforcing member is smaller than that of the substrate, the semiconductor element is caused by the difference in thermal expansion coefficient between the wiring substrate and the semiconductor element, similarly to the case where the semiconductor element is provided over the entire surface of the wiring substrate. The warping of the wiring board can be suppressed or prevented.

  Moreover, since it has the 1st heat conduction part which is installed so that it may straddle between a 1st reinforcement member and a semiconductor element, and has heat conductivity higher than a board | substrate, the heat | fever from a semiconductor element is 1st heat The heat can be efficiently transmitted to the first reinforcing member via the conductive portion and can be released via the first reinforcing member, and the heat dissipation is excellent. Further, by providing the first reinforcing member, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. it can. Therefore, the fourth semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation. Further, since the temperature rise of the semiconductor element and the wiring board can be suppressed, the warping of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element can also be suppressed or prevented.

  According to the fifth semiconductor package of the present invention, since the wiring board (interposer) is reinforced by the reinforcing member also in the portion other than the portion joined to the semiconductor element, the rigidity of the entire semiconductor package is increased. Thereby, the curvature of the wiring board resulting from the thermal expansion coefficient difference of a wiring board and a semiconductor element can be suppressed or prevented.

  Further, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. Therefore, the fifth semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation.

  Further, since the thickness of the reinforcing member (first reinforcing member) is equal to or less than the thickness of the semiconductor element, the semiconductor element is installed in a state where the reinforcing member is bonded onto the wiring board when manufacturing the semiconductor package. In this case, the workability of installation (mounting operation) of the semiconductor element is excellent.

  For this reason, the fifth semiconductor package of the present invention has excellent workability at the time of manufacture and can prevent the occurrence of defects due to heat of the semiconductor element.

  According to the sixth semiconductor package of the present invention, the force acting on the wiring board due to the difference in thermal expansion coefficient between the first reinforcing member and the second reinforcing member causes the difference in thermal expansion coefficient between the wiring board and the semiconductor element. Due to this, the force acting on the wiring board can be offset or alleviated. Therefore, it is possible to suppress or prevent the warpage of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element.

  According to the seventh semiconductor package of the present invention, one surface of the wiring board (interposer) is reinforced by the first reinforcing member and the other surface is the second reinforcing member also in a portion other than the portion bonded to the semiconductor element. Therefore, the rigidity of the entire semiconductor package is increased. In particular, since the thermal expansion coefficients of the first reinforcing member and the second reinforcing member are smaller than those of the substrate, the heat generated between the wiring substrate and the semiconductor element is the same as when the semiconductor element is provided over the entire surface of the wiring substrate. It is possible to suppress or prevent the warping of the wiring board due to the difference in expansion coefficient. Then, by making the average thickness of the first reinforcing member different from the average thickness of the second reinforcing member, the influence of the thermal expansion that the first reinforcing member gives to the wiring board and the thermal expansion that the second reinforcing member gives to the wiring board. By causing a difference in influence, it is possible to further suppress or prevent the warpage of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element.

  Further, it is not necessary to increase the rigidity of the wiring board itself, and the thickness of the wiring board can be reduced, so that the thermal conductivity in the thickness direction of the wiring board can be increased. Therefore, the seventh semiconductor package of the present invention can release heat from the semiconductor element through the wiring board, and is excellent in heat dissipation. Further, since the temperature rise of the semiconductor element and the wiring board can be suppressed, the warping of the wiring board due to the difference in thermal expansion coefficient between the wiring board and the semiconductor element can also be suppressed or prevented.

  Moreover, according to the semiconductor device of the present invention, since the semiconductor package as described above is provided, the reliability is excellent.

It is sectional drawing which shows typically the semiconductor package which concerns on 1st Embodiment of the 1st semiconductor package of this invention, and the 3rd and 6th semiconductor package. It is a top view which shows the 1st, 3rd, and 5th-7th semiconductor package of this invention. It is a bottom view which shows the 1st-7th semiconductor package of this invention. It is a figure which shows an example of the manufacturing method of a 1st, 3rd, 6th, and 7th semiconductor package. It is sectional drawing which shows typically the semiconductor device provided with 1st Embodiment of the 1st semiconductor package of this invention, and the 3rd and 6th semiconductor package. It is sectional drawing which shows typically the semiconductor package which concerns on 2nd Embodiment of the 1st semiconductor package of this invention. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically the semiconductor package which concerns on 1st Embodiment of the 2nd semiconductor package of this invention. It is a top view which shows the semiconductor package shown in FIG. It is sectional drawing which shows the vicinity of the site | part where the 1st reinforcement member and semiconductor element are contacting in the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically the semiconductor device which concerns on embodiment of the 2nd semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 2nd Embodiment of the 2nd semiconductor package of this invention. It is a top view which shows typically the semiconductor package which concerns on 3rd Embodiment of the 2nd semiconductor package of this invention. It is a top view which shows the other structural example of the 3rd semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 1st Embodiment of the 4th semiconductor package of this invention. It is a top view which shows the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically the semiconductor device which concerns on 1st Embodiment of the 4th semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 2nd Embodiment of the 4th semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 3rd Embodiment of the 4th semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 1st Embodiment in the 5th semiconductor package of this invention. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically the semiconductor package which concerns on 2nd Embodiment in the 5th semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 3rd Embodiment in the 5th semiconductor package of this invention. It is sectional drawing which shows typically an example of embodiment of the 5th semiconductor device of this invention. It is sectional drawing which shows typically the semiconductor package which concerns on 1st Embodiment in the 7th semiconductor package of this invention. It is sectional drawing which shows typically the semiconductor device provided with the semiconductor package which concerns on 1st Embodiment in the 7th semiconductor package of this invention. It is sectional drawing which shows typically 2nd Embodiment in the 7th semiconductor package of this invention.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of a semiconductor package and a semiconductor device of the invention will be described with reference to the accompanying drawings.
First, the first semiconductor package will be described.

<First Embodiment>
(Semiconductor package)
First, the semiconductor package of the present invention will be described.

1 is a cross-sectional view schematically showing a semiconductor package according to a first embodiment of the present invention, FIG. 2 is a top view showing the semiconductor package shown in FIG. 1, and FIG. 3 shows the semiconductor package shown in FIG. FIG. 4 is a bottom view and FIG. 4 is a view showing an example of a method for manufacturing the semiconductor package shown in FIG.
In the following description, for convenience of description, the upper side in FIG. 1 is referred to as “upper” and the lower side is referred to as “lower”. Further, in FIGS. 1 to 4, each part of the semiconductor package is exaggerated for convenience of explanation.

  As shown in FIG. 1, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member 4, and a second reinforcing member 5.

  According to such a semiconductor package 1, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Increases overall rigidity. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. In the same manner, warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  Further, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced, so that the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
The wiring board 2 is a board that supports the semiconductor element 3, and is, for example, a relay board (interposer) that relays electrical connection between the mounted semiconductor element 3 and a mother board 200 as will be described later. In addition, the wiring substrate 2 is usually a quadrangle such as a square or a rectangle in plan view.

  The wiring board 2 includes a substrate 21, conductor patterns 221, 222, 223, 224, conductor posts 231, 232, 233, 234, and heat transfer posts 24.

  In this embodiment, the conductor pattern 221 constitutes a first conductor pattern provided on one surface side of the substrate 21, and the conductor pattern 224 is provided on the other surface side of the substrate 21. A second conductor pattern electrically connected to the conductor pattern is formed.

  The substrate 21 includes a plurality (five layers in this embodiment) of insulating layers 211, 212, 213, 214, and 215. More specifically, the substrate 21 is configured by laminating an insulating layer 211, an insulating layer 212, an insulating layer 213, an insulating layer 214, and an insulating layer 215 in this order. In addition, the number of the insulating layers which comprise the board | substrate 21 is not limited to this, 1-4 may be sufficient, and six or more layers may be sufficient.

  Each of the insulating layers 211, 212, 213, 214, and 215 is made of an insulating material.

  Specifically, each insulating layer 211, 212, 213, 214, 215 is composed of a base material (fiber base material) and a resin composition impregnated in the base material.

  A base material is used as a core material of each insulating layer 211,212,213,214,215. By having such a base material, the rigidity of the substrate 21 can be increased.

  Examples of the base material include glass fiber base materials composed of glass fibers such as glass woven fabrics and glass nonwoven fabrics, polyamide resin fibers such as polyamide resin fibers, aromatic polyamide resin fibers, wholly aromatic polyamide resin fibers, and polyesters. Synthetic fiber base material, kraft paper composed of woven fabric or non-woven fabric mainly composed of resin fiber, aromatic polyester resin fiber, polyester resin fiber such as wholly aromatic polyester resin fiber, polyimide resin fiber, fluororesin fiber, etc. And paper base materials mainly composed of cotton linter paper, mixed paper of linter and kraft pulp, and the like. Among these, as such a base material, a glass fiber base material is preferable. Thereby, the rigidity of the substrate 21 can be increased and the substrate 21 can be thinned. Furthermore, the thermal expansion coefficient of the substrate 21 can be reduced.

  As glass which comprises such a glass fiber base material, E glass, C glass, A glass, S glass, D glass, NE glass, T glass, H glass etc. are mentioned, for example. Among these, T glass is preferable. Thereby, the thermal expansion coefficient of a glass fiber base material can be made small, and, thereby, the thermal expansion coefficient of the board | substrate 21 can be made small.

  When the insulating layers 211, 212, 213, 214, and 215 include a base material, the base material content in the insulating layers 211, 212, 213, 214, and 215 is preferably 30 to 70 wt%, respectively. 40 to 60 wt% is more preferable. Thereby, the electric insulation and thermal expansion coefficient of each insulating layer can be made sufficiently low while reliably preventing damage such as cracks of these insulating layers. Note that at least one of the insulating layers 211, 212, 213, 214, and 215 may be composed of only the resin composition without including the base material.

  The resin composition impregnated in such a base material contains a resin material. As such a resin material, a thermosetting resin is preferably used.

  Examples of the thermosetting resin include an oil-modified resole modified with a novolak-type phenol resin such as a phenol novolak resin, a cresol novolak resin, a bisphenol A novolak resin, an unmodified resole phenol resin, tung oil, linseed oil, walnut oil, and the like. Phenol resin such as phenolic resin, bisphenol type epoxy resin such as bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, novolac epoxy resin such as cresol novolac epoxy resin, biphenyl type epoxy resin, etc. Epoxy resin, cyanate resin, urea (urea) resin, resin having triazine ring such as melamine resin, unsaturated polyester resin, bismaleimide resin, polyurethane resin, diallyl phthalate DOO resins, silicone resins, resins having a benzoxazine ring, cyanate ester resins.

  Among these, a cyanate resin is particularly preferable. Thereby, the thermal expansion coefficient of the board | substrate 21 can be made small enough. Furthermore, the electrical characteristics (low dielectric constant, low dielectric loss tangent, etc.) of the substrate 21 can be made excellent.

  Moreover, it is preferable that the said resin composition contains a filler. That is, each of the insulating layers 211, 212, 213, 214, and 215 preferably contains a filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, 213, 214, and 215 can be lowered.

Examples of the filler include various inorganic fillers or organic fillers.
Examples of the inorganic filler (inorganic filler) include oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide and metal ferrite, and hydroxide such as aluminum hydroxide and magnesium hydroxide. , Calcium carbonate (light, heavy), carbonates such as magnesium carbonate, dolomite, and dawsonite, sulfates or sulfites such as calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber, silica Silicates such as calcium oxide, montmorillonite, bentonite, borate such as zinc borate, barium metaborate, aluminum borate, calcium borate, sodium borate, carbon black, graphite, carbon fiber and other iron Powder, copper powder, aluminum powder, zinc white, sulfide Ribuden, boron fiber, potassium titanate, and a lead zirconate titanate.

  Moreover, synthetic resin powder is mentioned as an organic filler. Examples of the synthetic resin powder include alkyd resin, epoxy resin, silicone resin, phenol resin, polyester, acrylic resin, acetal resin, polyethylene, polyether, polycarbonate, polyamide, polysulfone, polystyrene, polyvinyl chloride, fluororesin, and polypropylene. And various thermosetting resins such as ethylene-vinyl acetate copolymers or powders of thermoplastic resins, or powders of copolymers of these resins. Other examples of organic fillers include aromatic or aliphatic polyamide fibers, polypropylene fibers, polyester fibers, and aramid fibers.

  Among the fillers as described above, it is preferable to use an inorganic filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, 213, 214, and 215 can be effectively reduced. In addition, the heat transfer properties of the insulating layers 211, 212, 213, 214, and 215 can be increased.

  In particular, among inorganic fillers, silica is preferable, and fused silica (particularly spherical fused silica) is preferable in terms of excellent low thermal expansion.

  Although the average particle diameter of an inorganic filler is not specifically limited, 0.05-2.0 micrometers is preferable and especially 0.1-1.0 micrometer is preferable. As a result, the inorganic filler can be more uniformly dispersed in the insulating layers 211, 212, 213, 214, and 215, and the physical strength and insulating properties of the insulating layers 211, 212, 213, 214, and 215 are particularly improved. It can be excellent.

  In addition, the average particle diameter of the said inorganic filler can be measured with a particle size distribution meter (product made from HORIBA, LA-500), for example. Moreover, in this specification, an average particle diameter refers to the average particle diameter on a volume basis.

  The content of the inorganic filler in the insulating layers 211, 212, 213, 214, and 215 is not particularly limited, but is preferably 30 to 80 wt% when the resin composition excluding the base material is 100 wt%, particularly 45-75 wt% is preferable. When the content is within the above range, the insulating layers 211, 212, 213, 214, and 215 have sufficiently low thermal expansion coefficients and particularly low hygroscopicity.

  In addition to the thermosetting resin described above, the resin composition may contain a thermoplastic resin such as a phenoxy resin, a polyimide resin, a polyamideimide resin, a polyphenylene oxide resin, or a polyethersulfone resin.

  Moreover, the said resin composition may contain additives other than the said components, such as a pigment and antioxidant, as needed.

  The insulating layers 211, 212, 213, 214, and 215 may be made of the same material as each other, or may be made of different materials.

  The average thickness of the substrate 21 composed of a plurality of layers as described above is not particularly limited, but is preferably 30 μm or more and 800 μm or less, and more preferably 30 μm or more and 400 μm or less.

  A conductor pattern 221 is interposed between the insulating layer 211 and the insulating layer 212 of the substrate 21. In addition, a conductive pattern 222 is interposed between the insulating layer 212 and the insulating layer 213. A conductor pattern 223 is interposed between the insulating layer 213 and the insulating layer 214. A conductor pattern 224 is interposed between the insulating layer 214 and the insulating layer 215.

  Each of the conductor patterns 221, 222, 223, and 224 functions as a circuit having a plurality of wirings.

  The constituent material of the conductor patterns 221, 222, 223, and 224 is not particularly limited as long as it has conductivity, and examples thereof include various metals and various alloys such as copper, a copper-based alloy, aluminum, and an aluminum-based alloy. Can be mentioned. Among these, it is preferable to use copper and a copper-based alloy as the constituent material. Copper and copper-based alloys have relatively high electrical conductivity. Therefore, the electrical characteristics of the wiring board 2 can be improved. Moreover, since copper and a copper-type alloy are excellent also in heat conductivity, the heat dissipation of the wiring board 2 can also be improved.

  In addition, the average thickness of the conductor patterns 221, 222, 223, and 224 is not particularly limited, but is preferably 5 μm or more and 30 μm or less.

  The insulating layer 211 has a via hole penetrating in the thickness direction, and a conductor post (via post) 231 is provided in the via hole. The conductor post 231 passes through the insulating layer 211 in the thickness direction, and has an upper end connected to the semiconductor element 3 via the metal bump 31 and a lower end connected to the conductor pattern 221. Thereby, the conductor pattern 221 and the semiconductor element 3 are electrically connected.

  Similarly, the insulating layer 212 is provided with a conductor post (via post) 232 that penetrates in the thickness direction. The conductor post 232 has an upper end connected to the conductor pattern 221 and a lower end connected to the conductor pattern 222. Thereby, the conductor pattern 221 and the conductor pattern 222 are electrically connected.

  The insulating layer 213 is provided with a conductor post (via post) 233 penetrating in the thickness direction. The conductor post 233 has an upper end connected to the conductor pattern 222 and a lower end connected to the conductor pattern 223. Thereby, the conductor pattern 222 and the conductor pattern 223 are electrically connected.

  The insulating layer 214 is provided with a conductor post (via post) 234 that penetrates in the thickness direction. The conductor post 234 has an upper end connected to the conductor pattern 223 and a lower end connected to the conductor pattern 224. Thereby, the conductor pattern 223 and the conductor pattern 224 are electrically connected.

  The insulating layer 215 is provided with a plurality of openings penetrating in the thickness direction, and a part (terminal) of the conductor pattern 224 is exposed from each opening. A metal bump 71 is bonded onto each exposed portion (terminal) of the conductor pattern 224. That is, a plurality of metal bumps 71 are bonded to the surface of the conductor pattern 224 that is the second conductor pattern on the side opposite to the substrate 21.

  The metal bump 71 is for electrically connecting the semiconductor package 1 to, for example, a mother board as will be described later.

  In the present embodiment, the metal bump 71 has a substantially spherical shape. The shape of the metal bump 71 is not limited to this.

  The constituent material of the metal bump 71 is not particularly limited. For example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin-silver-bismuth, tin- Various brazing materials (solder) such as copper and tin-silver-copper can be used.

  The substrate 21 is formed with a plurality of via holes penetrating in the thickness direction, and a heat transfer post 24 is provided in each via hole.

  Each heat transfer post 24 penetrates the entire substrate 21 in the thickness direction, and its upper end is exposed from the upper surface of the substrate 21 and its lower end is exposed from the lower surface of the substrate 21. The heat transfer post 24 has an upper end in contact with the first reinforcing member 4 and a lower end in contact with the second reinforcing member 5. Thus, each heat transfer post 24 connects the first reinforcing member 4 and the second reinforcing member 5.

  Each of the heat transfer posts (heat conduction portions) 24 has higher heat transfer (heat conductivity) than the substrate 21 (insulating layer) described above. Thereby, heat can be efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 via the heat transfer post 24. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Further, since each heat transfer post 24 penetrates the substrate 21 in the thickness direction, it can be formed easily and with high accuracy, similarly to a known conductor post.

  Each heat transfer post 24 may be hollow or solid. Moreover, it does not specifically limit as a cross-sectional shape of each heat-transfer post | mailbox 24, For example, circular, an ellipse, a polygon etc. are mentioned. Further, the number of heat transfer posts 24 is not particularly limited and is arbitrary, but is preferably as large as possible so as not to impair the mechanical strength of the wiring board 2.

Each heat transfer post 24 does not contribute to transmission of an electrical signal. Thereby, heat can be more efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 via the heat transfer post 24. In addition, you may use the heat-transfer post | mailbox 24, the 1st reinforcement member 4, the 2nd reinforcement member 5, etc. as a ground.

  In the present embodiment, the plurality of heat transfer posts 24 are arranged side by side along the outer peripheral portion of the wiring board 2 at intervals when the wiring board 2 is viewed in plan. In particular, the plurality of heat transfer posts 24 are preferably arranged side by side at equal intervals in the circumferential direction along the outer peripheral portion of the wiring board 2 when the wiring board 2 is viewed in plan. Thereby, the temperature distribution of the wiring board 2 can be made uniform.

  The plurality of heat transfer posts 24 are provided so as not to overlap the conductor patterns 221, 222, 223, and 224 described above when the wiring board 2 is viewed in plan. Thereby, formation of the heat transfer post 24 is simplified, and a short circuit between the heat transfer post 24 and the conductor patterns 221, 222, 223, and 224 can be prevented.

  The constituent material of each heat transfer post 24 is not particularly limited as long as it has a higher heat transfer property than the substrate 21 (insulating layer) described above, but a metal material is preferably used.

  Examples of the metal material include various metals and various alloys such as copper, a copper-based alloy, aluminum, and an aluminum-based alloy. Among these, as such a metal material, it is preferable to use copper, a copper-based alloy, aluminum, or an aluminum-based alloy because of excellent heat conductivity. Since copper and a copper-based alloy are excellent in thermal conductivity, the heat dissipation of the wiring board 2 can also be improved.

  Further, the constituent material of the heat transfer post 24 may be different from the constituent material of the conductor posts 231 to 234 described above, but is the same as the constituent material of the conductor posts 231 to 234 (particularly, the constituent material of the conductor posts 234). Is preferred. As a result, the heat transfer posts 24 can be formed simultaneously with the formation of the conductor posts 234. Therefore, the manufacturing of the semiconductor package 1 is simplified, and the semiconductor package 1 can be made inexpensive.

[Semiconductor element]
The semiconductor element 3 is, for example, an integrated circuit element (IC), and more specifically, for example, a logic IC, a memory, and a light receiving / emitting element.

  The semiconductor element 3 is bonded to the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above, and is electrically connected to the conductor pattern 221 that is the first conductor pattern.

  Specifically, the semiconductor element 3 is provided with a plurality of terminals (not shown) on its lower surface, and each terminal is electrically connected to the conductor post 231 of the wiring board 2 described above via the metal bump 31. Has been. Thereby, the semiconductor element 3 and the conductor pattern 221 of the wiring board 2 are electrically connected.

  The constituent material of the metal bump 31 is not particularly limited. For example, as in the metal bump 71 described above, for example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin -Various brazing materials (solder) such as silver-bismuth, tin-copper, and tin-silver-copper can be used.

  Further, the semiconductor element 3 is bonded (bonded) to the upper surface of the wiring board 2 through the adhesive layer 32.

  The adhesive layer 32 is made of a material having adhesiveness and insulation, and is made of, for example, a cured product of an underfill material.

  The underfill material is not particularly limited, and a known underfill material can be used, but the same solder bonding resist as that for forming an insulating material 81 described later can also be used.

[First reinforcing member]
The first reinforcing member (stiffener) 4 is bonded to a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above where the semiconductor element 3 is not bonded.

  The first reinforcing member 4 has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed.

  Moreover, the 1st reinforcement member 4 has comprised plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  The surface of the first reinforcing member 4 opposite to the substrate 21 (that is, the upper surface) is the same surface as the surface of the semiconductor element 3 opposite to the substrate 21 (that is, the upper surface) or the substrate 21 side (that is, more than that). It is preferably located on the lower side. Thereby, when the semiconductor element 3 is installed after the first reinforcing member 4 is installed in manufacturing the semiconductor package 1, the installation of the semiconductor element 3 is facilitated.

In the present embodiment, the surface of the first reinforcing member 4 opposite to the substrate 21 (ie, the upper surface) and the surface of the semiconductor element 3 opposite to the substrate 21 (ie, the upper surface) are located on the same surface. Thereby, the curvature of the wiring board 2 can be effectively suppressed or prevented while the semiconductor package 1 is thinned. Moreover, when providing another structure (for example, a board | substrate, a semiconductor element, a heat sink, etc.) on the upper surface of the 1st reinforcement member 4, the installation of the structure can be performed stably.
The first reinforcing member 4 and the semiconductor element 3 may be molded with a sealing resin.

  The first reinforcing member 4 is provided so as to surround the periphery of the semiconductor element 3. In the present embodiment, the first reinforcing member 4 has an annular shape (more specifically, a rectangular annular shape) so as to surround the semiconductor element 3. Thereby, the effect which raises the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent.

  Further, the distance between the first reinforcing member 4 and the semiconductor element 3 (the distance between the inner peripheral surface 411 of the first reinforcing member 4 and the outer peripheral surface 33 of the semiconductor element 3) is on the entire circumference of the semiconductor element 3. It is formed so as to be constant throughout. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably. In addition, heat transfer from the semiconductor element 3 to the first reinforcing member via the heat conductive material 6 described later can be generated efficiently and uniformly.

  The first reinforcing member 4 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the semiconductor element 3 and the 1st reinforcement member 4 can reinforce the wiring board 2 integrally, and can suppress the thermal expansion of the semiconductor package 1 whole.

  In addition, the constituent material of the first reinforcing member 4 is not particularly limited as long as it has a thermal expansion coefficient as described above. For example, a metal material, a ceramic material, or the like can be used. It is preferable to use it. When the 1st reinforcement member 4 is comprised with the metal material, the heat dissipation of the 1st reinforcement member 4 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Such a metal material is not particularly limited as long as it has a thermal expansion coefficient as described above, and various metal materials can be used. From the viewpoint of realizing heat dissipation and low thermal expansion, an alloy containing Fe is used. Is preferably used.

  Examples of such Fe-containing alloys include Fe-Ni alloys, Fe-Co-Cr alloys, Fe-Co alloys, Fe-Pt alloys, Fe-Pd alloys, and the like. It is preferable to use a base alloy.

  Such a metal material not only has excellent heat dissipation, but also has a low thermal expansion coefficient and a thermal expansion coefficient close to that of a general semiconductor element 3. Therefore, the semiconductor element 3 and the first reinforcing member 4 can integrally reinforce the wiring board 2.

  The Fe—Ni alloy is not particularly limited as long as it contains Fe and Ni. In addition to Fe and Ni, the balance (M) is a metal such as Co, Ti, Mo, Cr, Pd, and Pt. Of these, one or more metals may be included.

  More specifically, examples of Fe-Ni alloys include Fe-Ni alloys such as Fe-36Ni alloy (Invar), Fe-32Ni-5Co alloy (Super Invar), and Fe-29Ni-17Co alloy (Kovar). Fe-Ni-Co alloys such as Fe-36Ni-12Co alloy (Erin bar), Ni-Mo-Fe alloys such as Fe-Ni-Cr-Ti alloy and Ni-28Mo-2Fe alloy. In addition, Fe-Ni-Co alloys are commercially available under trade names such as KV series (manufactured by NEOMAX Materials) such as KV-2, KV-4, KV-6, KV-15, and KV-25, and Nivarox. ing. Moreover, the Fe-Ni alloy is marketed with brand names, such as NS-5 and D-1 (made by NEOMAX material company), for example. Fe-Ni-Cr-Ti alloys are commercially available under trade names such as Ni-Span C-902 (manufactured by Daido Special Metal), EL-3 (manufactured by NEOMAX Material).

  The Fe—Co—Cr alloy is not particularly limited as long as it contains Fe, Co, and Cr. For example, an Fe—Co—Cr alloy such as Fe-54Co-9.5Cr (stainless invar) is used. Is mentioned. Note that the Fe—Co—Cr-based alloy may contain one or more metals of metals such as Ni, Ti, Mo, Pd, and Pt in addition to Fe, Co, and Cr.

  The Fe—Co alloy is not particularly limited as long as it contains Fe and Co. In addition to Fe and Co, one of metals such as Ni, Ti, Mo, Cr, Pd, and Pt is used. It may contain seeds or two or more metals.

  The Fe—Pt alloy is not particularly limited as long as it contains Fe and Pt. In addition to Fe and Pt, one of metals such as Co, Ni, Ti, Mo, Cr, and Pd is used. It may contain seeds or two or more metals.

  Further, the Fe—Pd alloy is not particularly limited as long as it contains Fe and Pd, and in addition to Fe and Pd, one of metals such as Co, Ni, Ti, Mo, Cr, and Pt. It may contain seeds or two or more metals.

  In particular, the thermal expansion coefficient of the first reinforcing member 4 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably, it is not higher than ° C. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the first reinforcing member 4 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the first reinforcing member 4 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and 2 ppm / ° C. or less. Is more preferable. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the first reinforcing member 4 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  From the viewpoint of the thermal expansion coefficient as described above, when the metal material constituting the first reinforcing member 4 is an Fe—Ni alloy, the Fe—Ni alloy has a Ni content of 30 wt% or more and 50 wt% or less. It is preferable that the Ni content is 35 wt% or more and 45 wt% or less. Thereby, the thermal expansion coefficient of the first reinforcing member 4 can be brought close to the thermal expansion coefficient of the semiconductor element 3. In this case, the Fe—Ni-based alloy preferably has an Fe content of 50 wt% or more and 70 wt% or less, and more preferably an Fe content of 55 wt% or more and 65 wt% or less.

  Further, when the metal material constituting the first reinforcing member 4 is an Fe—Ni alloy, the Fe—Ni alloy preferably has a total content of Fe and Ni of 85 wt% or more and 100 wt% or less, The total content of Fe and Ni is more preferably 90 wt% or more and 100 wt% or less. That is, the content of the balance (M) is preferably 0 wt% or more and 15 wt% or less, and the content of the balance (M) is more preferably 0 wt% or more and 10 wt% or less. . Thereby, the thermal expansion coefficient of the first reinforcing member 4 can be brought close to the thermal expansion coefficient of the semiconductor element 3.

  The average thickness of the first reinforcing member 4 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and is not specifically limited, For example, it is about 0.02 mm or more and 0.8 mm or less.

  In the present embodiment, as shown in FIGS. 1 and 2, a thermally conductive material 6 is filled between the first reinforcing member 4 and the semiconductor element 3. Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4 through the heat conductive material 6. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Such a heat conductive material 6 is not particularly limited, and examples thereof include a resin composition including an inorganic filler and a resin material.

  Examples of the inorganic filler (inorganic filler) used in the heat conductive material 6 (resin composition) include metals such as Au, Ag, and Pt, silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, Oxides such as magnesium oxide and metal ferrite, nitrides such as boron nitride, silicon nitride, gallium nitride, and titanium nitride, hydroxides such as aluminum hydroxide and magnesium hydroxide, calcium carbonate (light and heavy), magnesium carbonate Carbonates such as dolomite and dosonite, sulfates or sulfites such as calcium sulfate, barium sulfate, ammonium sulfate and calcium sulfite, talc, mica, clay, glass fiber, silicates such as calcium silicate, montmorillonite and bentonite, boron Zinc oxide, barium metaborate, aluminum borate, calcium borate, borate Borates such as sodium, carbon black, graphite, carbon, such as carbon fibers, other iron powder, copper powder, aluminum powder, zinc oxide, molybdenum sulfide, boron fiber, potassium titanate, and a lead zirconate titanate. In addition, when what has electroconductivity as an inorganic filler is used, the insulation process is performed to the site | part which the heat conductive material 6 contacts as needed.

  Among these, as the inorganic filler, from the viewpoint of excellent insulation and thermal conductivity, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite, boron nitride, Nitride such as silicon nitride, gallium nitride and titanium nitride is preferable.

  Examples of the resin material used for the heat conductive material 6 (resin composition) include various thermoplastic resins and various thermosetting resins.

  Examples of the thermoplastic resin used for the heat conductive material 6 (resin composition) include polyolefins such as polyethylene, polypropylene, and ethylene-vinyl acetate copolymer, modified polyolefins, polyamides (eg, nylon 6, nylon 46, nylon 66). , Nylon 610, Nylon 612, Nylon 11, Nylon 12, Nylon 6-12, Nylon 6-66), liquid crystalline polymers such as thermoplastic polyimide, aromatic polyester, polyphenylene oxide, polyphenylene sulfide, polycarbonate, polymethyl methacrylate, polyether , Polyether ether ketone, polyether imide, polyacetal, styrene, polyolefin, polyvinyl chloride, polyurethane, polyester, polyamide, polybutadiene, Various thermoplastic elastomers such as polyisoprene-based, fluororubber-based, chlorinated polyethylene, etc., or copolymers, blends, polymer alloys, etc. mainly composed of these are included, one or more of these Can be mixed and used.

  Moreover, as a thermosetting resin used for the heat conductive material 6 (resin composition), for example, epoxy resin, phenol resin, urea resin, melamine resin, polyester (unsaturated polyester) resin, polyimide resin, silicone resin, polyurethane Resins etc. are mentioned, 1 type or 2 types or more of these can be mixed and used.

  Among these, as the resin material used for the heat conductive material 6 (resin composition), it is preferable to use a thermosetting resin (particularly, a liquid that forms a liquid before curing), more preferably a phenol resin or an epoxy resin. It is particularly preferable to use a phenol resin. Thereby, the thermal conductive material 6 can be filled between the first reinforcing member 4 and the semiconductor element 3 without a gap, and the thermal expansion coefficient of the thermal conductive material 6 can be effectively suppressed.

  Such phenolic resins include phenolic novolac resins, cresol novolac resins, bisphenol A novolac resins and other novolac type phenol resins, unmodified resole phenolic resins, oil-modified resole phenolic resins modified with tung oil, linseed oil, walnut oil, etc. Examples thereof include phenolic resins such as resol type phenolic resins.

  In addition, the heat conductive material 6 may be the same as the adhesive layer 32 (underfill material) described above, and the heat conductive material 6 and the adhesive layer 32 may be formed in a lump. .

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  The second reinforcing member 5 has a smaller coefficient of thermal expansion than the substrate 21, similar to the first reinforcing member 4 described above.

  The second reinforcing member 5 has a plate shape. Thereby, the structure of the 2nd reinforcement member 5 can be made simple and small.

  The second reinforcing member 5 is provided between a portion (frame portion) 52 provided along the outer peripheral portion (outside the conductor pattern 224) of the wiring substrate 2 (substrate 21) and the metal bumps 71. Part 53. By joining the portion 52 of the second reinforcing member 5 and the wiring substrate 2 (substrate 21), the second reinforcing member 5 can effectively reinforce the wiring substrate 2. Further, the rigidity of the second reinforcing member 5 is increased by joining the portion 53 of the second reinforcing member 5 and the wiring board 2.

  More specifically, the second reinforcing member 5 has a plurality of openings 51 formed so as to surround the metal bumps 71 without contacting the metal bumps 71 described above. Thereby, the ratio of the area which the 2nd reinforcement member 5 occupies for the lower surface of the wiring board 2 can be enlarged. As a result, the effect of increasing the rigidity of the wiring board 2 by the second reinforcing member 5 can be made excellent.

  In the present embodiment, each opening 51 is circular in plan view. In addition, the planar view shape of each opening part 51 is not limited to this, For example, an ellipse, a polygon, etc. may be sufficient.

  Each opening 51 is provided corresponding to each metal bump 71 (one-to-one correspondence). Thereby, the rigidity of the second reinforcing member 5 can be made uniform. Moreover, the heat dissipation of the 2nd reinforcement member 5 can also be improved.

  In addition, the distance between the second reinforcing member 5 and each metal bump 71 (distance between the wall surface of the opening 51 and the outer peripheral surface of the metal bump 71 in plan view) extends over the entire circumference of the metal bump 71. It is formed to be constant. Thereby, the integrity of the 2nd reinforcement member 5 and each metal bump 71 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably.

In the present embodiment, the heat transfer bumps 91 are provided on the lower surface of the second reinforcing member 5.
The heat transfer bump 91 has higher thermal conductivity than the substrate 21 of the wiring board 2 and is bonded to the mother board 200 in the semiconductor device 100 described later, for example. Thereby, the heat of the 2nd reinforcement member 5 can be escaped outside (for example, motherboard 200).

  The constituent material of the heat transfer bump 91 is not particularly limited as long as it has the heat transfer property as described above, and a metal material or a resin material can be used. It is preferable to use a heat conductive adhesive containing a constituent material, an inorganic filler, and a resin material.

  Similarly to the first reinforcing member 4 described above, the second reinforcing member 5 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the 2nd reinforcement member 5 can reinforce the wiring board 2 effectively, and can suppress the thermal expansion of the semiconductor package 1 whole.

  The constituent material of the second reinforcing member 5 is not particularly limited as long as it has a thermal expansion coefficient as described above, and the same constituent material as that of the first reinforcing member 4 described above may be used. For example, although a metal material, a ceramic material, etc. can be used, it is preferable to use a metal material. When the 2nd reinforcement member 5 is comprised with the metal material, the heat dissipation of the 2nd reinforcement member 5 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Although it does not specifically limit as this metal material, From a viewpoint of implement | achieving heat dissipation and low thermal expansion, it is preferable to use a Fe-Ni type alloy.

  As the Fe—Ni alloy, the same material as the first reinforcing member 4 described above can be used.

  In particular, the thermal expansion coefficient of the second reinforcing member 5 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably, it is not higher than ° C. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the second reinforcing member 5 can be reduced, and the second reinforcing member 5 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the second reinforcing member 5 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and 2 ppm / ° C. or less. Is more preferable. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the second reinforcing member 5 can be reduced, and the second reinforcing member 5 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the second reinforcing member 5 and the first reinforcing member 4 is preferably 2 ppm / ° C. or less, more preferably 1 ppm / ° C. or less, and 0 ppm / ° C. Is more preferable. Thereby, the thermal expansion coefficient difference of the 1st reinforcement member 4 and the 2nd reinforcement member 5 can be made small, and the curvature of the wiring board 2 resulting from these thermal expansion differences can be prevented.

  From this point of view, the constituent material of the second reinforcing member 5 is preferably the same or the same as the constituent material of the first reinforcing member 4.

  The average thickness of the second reinforcing member 5 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and is not specifically limited, For example, it is about 0.02 mm or more and 0.8 mm or less.

  An insulating material 81 is provided (filled) between the second reinforcing member 5 and each metal bump 71. Thereby, the contact with the 2nd reinforcement member 5 and each metal bump 71 can be prevented. Therefore, the rigidity and heat dissipation of the second reinforcing member 5 can be enhanced while improving the reliability of the semiconductor package 1.

  The insulating material 81 is formed so as to surround the metal bump 71 and is bonded to each solder bump. Thereby, the insulating material 81 reinforces the metal bump 71.

Such an insulating material 81 has an insulating property and includes a resin material.
Such an insulating material 81 is not particularly limited, but is preferably formed of, for example, a solder bonding resin having thermosetting properties.

  Such a solder bonding resin (hereinafter also referred to as “curing flux”) acts as a flux at the time of solder bonding, and then is cured by heating to act as a reinforcing material for the solder bonding portion. Solder bonding resin removes harmful substances such as solder joint surfaces and oxides of solder materials during solder joining, protects the solder joint surfaces, and refines the solder materials to provide good strength and good strength. In addition, the solder bonding resin does not need to be removed by washing after solder bonding, and is heated as it is to become a three-dimensionally crosslinked resin, which acts as a reinforcing material for the solder bonding portion.

  Such a solder bonding resin can be configured to include, for example, a resin (A) having a phenolic hydroxyl group and a curing agent (B) of the resin.

  Although there is no restriction | limiting in particular as resin (A) which has a phenolic hydroxyl group, For example, a phenol novolak resin, an alkylphenol novolak resin, a polyhydric phenol novolak resin, a resole resin, a polyvinyl phenol resin etc. can be mentioned.

  In the curable flux, the content of the resin (A) having a phenolic hydroxyl group is preferably 20 to 80% by weight, and more preferably 25 to 60% by weight of the entire curable flux. If the content of the resin (A) is less than 20% by weight, the effect of removing dirt such as solder and oxides on the metal surface may be reduced, and solder jointability may be deteriorated. When content of resin (A) exceeds 80 weight%, the hardened | cured material which has sufficient physical property cannot be obtained, and there exists a possibility that joining strength and reliability may fall.

  Further, the phenolic hydroxyl group of the resin (A) having a phenolic hydroxyl group effectively removes dirt such as oxides on the solder and the metal surface by its reducing action, and therefore effectively acts as a solder joint flux.

  Moreover, as a hardening | curing agent (B) of resin (A) which has a phenolic hydroxyl group, an epoxy compound, an isocyanate compound, etc. can be mentioned, for example. Examples of the epoxy compound and isocyanate compound include phenol-based epoxy compounds such as bisphenol, phenol novolak, alkylphenol novolak, biphenol, naphthol, and resorcinol, isocyanate compounds, saturated aliphatic, cycloaliphatic, Examples thereof include an epoxy compound and an isocyanate compound modified based on a skeleton such as a saturated aliphatic group.

  The compounding amount of the curing agent (B) is such that the reactive functional group such as epoxy group and isocyanate group of the curing agent is 0.5 to 1.5 equivalent times the phenolic hydroxyl group of the resin (A). It is preferably 0.8 to 1.2 equivalent times. When the reactive functional group of the curing agent is less than 0.5 equivalents of the hydroxyl group, a cured product having sufficient physical properties cannot be obtained, and the reinforcing effect may be reduced, thereby reducing the bonding strength and reliability. There is. When the reactive functional group of the curing agent exceeds 1.5 equivalents of the hydroxyl group, the action of removing dirt such as oxides on the solder and the metal surface is lowered, and there is a possibility that the solderability is deteriorated.

  Such a solder bonding resin (curable flux) is formed because a cured product having good physical properties is formed by the reaction of the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin. It is not necessary to remove the flux by washing after soldering, the soldered part is protected by the cured product, and electrical insulation is maintained even in a high temperature and high humidity atmosphere, and soldering with high joining strength and reliability is possible. .

  In addition to the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin, the solder bonding resin as described above is dispersed in a microcrystalline state as a curable antioxidant (C). Compound (D) having phenolic hydroxyl group, curing agent (E), solvent (F), curing catalyst, silane coupling agent for improving adhesion and moisture resistance, and elimination for preventing voids It may contain a foaming agent or a liquid or powder flame retardant.

  According to the semiconductor package 1 configured as described above, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Therefore, the rigidity of the entire semiconductor package 1 is increased. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring board 2, the semiconductor package 1 is provided in the same manner as the semiconductor element 3 is provided over the entire surface of the wiring board 2. Increases overall rigidity. Therefore, it is possible to suppress or prevent warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.

  Moreover, since the thickness of the wiring board 2 can be reduced, the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured as follows, for example.

Hereinafter, an example of a method for manufacturing the semiconductor package 1 will be briefly described with reference to FIG.
[Step 1]
First, as shown to Fig.4 (a), the laminated body of the metal layer 221A and the prepreg 211A is prepared, and the 1st reinforcement member 4 is affixed on the surface at the side of the prepreg 211A of the laminated body.

  Here, the prepreg 211A is for forming the insulating layer 211 of the wiring board 2 described above, and the base material is impregnated with an uncured product (semi-cured product) of the resin composition of the insulating layer 211 described above. It will be.

  The metal layer 221 </ b> A is for forming the conductor pattern 221 of the wiring board 2 described above, and is made of the same material as the constituent material of the conductor pattern 221.

[Step 2]
Next, as shown in FIG. 4B, a through hole 2111 (via hole) is formed in the prepreg 211A.

  A method for forming the through-hole 2111 is not particularly limited, but can be formed by, for example, laser irradiation.

Here, for example, a CO ₂ laser, a UV-YAG laser, or the like can be used as the laser.

  The through hole 2111 can also be formed by machining such as a drill.

[Step 3]
Next, as shown in FIG. 4C, a conductor post 231 is formed in the through hole 2111.

  The method for forming the conductor post 231 is not particularly limited. For example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used.

[Step 4]
Next, as shown in FIG. 4D, the conductor layer 221 is formed by patterning the metal layer 221A.

  The patterning method is not particularly limited, but etching is preferably used.

  As described above, the insulating layer 211, the conductor pattern 221 and the conductor post 231 are formed.

[Step 5]
Next, in the same manner as in the above steps [1] to [4], prepregs for forming the insulating layers 212, 213, 214, and 215 and the conductor patterns 222, 223, and 224 and laminates made of metal layers are respectively prepared. Then, conductor patterns 222, 223, 224 and conductor posts 232, 233, 234, 235 are formed. In addition, after the prepregs for the insulating layers 211, 212, 213, 214, and 215 are stacked, the heat transfer post 24 is formed using the same method as the conductor posts 231, 232, 233, 234, and 235. Thereafter, the prepregs for the insulating layers 211, 212, 213, 214, and 215 are cured (completely cured) to obtain the wiring board 2 as shown in FIG.

  Examples of the method for laminating the prepreg for the insulating layers 211, 212, 213, 214, and 215 include a vacuum press and a laminate. Among these, the joining method by a vacuum press is preferable. Thereby, the adhesion strength of the prepreg for the insulating layers 211, 212, 213, 214, and 215 can be improved.

  A method for curing the prepreg for the insulating layers 211, 212, 213, 214, and 215 is not particularly limited, and for example, heat treatment is preferably used.

  The heat transfer post 24 is formed at the same time as the conductor posts 231, 232, 233, 234, and 235, and the heat transfer post is formed on the prepreg for the insulating layers 211, 212, 213, 214, and 215. These heat transfer posts may be connected and formed by laminating these prepregs.

[Step 6]
Next, after applying an insulating material 81A to the lower surface of the wiring board 2, a metal ball (solder ball) 71A is soldered by solder reflow. Thereby, the metal bump 71 and the insulating material 81 are formed.

  Such solder bonding is not particularly limited, but can be performed by placing each metal bump 71 in contact with the lower surface of the wiring board 2 and heating in that state, for example, 200 to 280 ° C. for 10 to 60 seconds. .

  The insulating material 81A is for forming the insulating material 81 described above, and is cured by heating, for example. For example, the fluidity is reduced by irradiation with active energy rays and is cured by overheating. Is.

  When forming the insulating material 81, for example, as shown in FIG. 4F, the insulating material 81A is applied to the lower surface of the wiring board 2, and after the solder bonding as described above, the insulating material 81A is cured by heating. By doing so, the insulating material 81 is obtained.

  The insulating material 81 thus obtained is formed so as to surround the periphery of the metal bump 71 as described above.

  At this time, the insulating material 81A functions as a flux at the time of solder joining, and is cured in a shape that reinforces the periphery of the solder joint portion in a ring shape by the interfacial tension with the metal bump 71A.

[Step 7]
Next, as shown in FIG. 4G, the second reinforcing member 5 is joined to the lower surface of the wiring board 2. In addition, after applying an underfill material to the upper surface of the wiring board 2, the semiconductor element 3 is joined by solder reflow through the metal bumps 31. In this case, a resin having flux activity similar to that of the insulating material 81 described above is used as the underfill material. Further, after mounting the semiconductor element 3 and bonding the semiconductor element 3 to the wiring board 2 by reflow using a flux or solder paste, a normal capillary underfill material is placed between the wiring board 2 and the semiconductor element 3. It can also be filled and cured.

Thereafter, a thermally conductive material 6 is filled between the semiconductor element 3 and the first reinforcing member 4.
The semiconductor package 1 is obtained as described above.

(Semiconductor device)
Next, a method for manufacturing a semiconductor device and a semiconductor device will be described based on preferred embodiments.

  FIG. 5 is a cross-sectional view schematically showing a semiconductor device including the semiconductor package shown in FIG.

  As shown in FIG. 5, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  Further, the heat transfer bumps 91 of the semiconductor package 1 are joined to the heat radiation terminals (not shown) of the mother board 200. The heat of the semiconductor package 1 can be efficiently released to the mother board 200 through this joint. When such a heat transfer bump 91 is made of the same material as that of the metal bump 71 described above, the heat transfer bump 91 can be bonded to the mother board 200 at the same time as the metal bump 71 is bonded.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Second Embodiment
(Semiconductor package)
First, the semiconductor package of the present invention will be described.

  FIG. 6 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the present invention, and FIGS. 7 to 9 are views showing an example of a method for manufacturing the semiconductor package shown in FIG. In the following description, for convenience of description, the upper side in FIG. 6 is referred to as “upper” and the lower side is referred to as “lower”. 6 to 9, each part of the semiconductor package is exaggerated for convenience of explanation. 6 to 9, the number of metal bumps is different from that shown in the respective drawings in the first embodiment described above, but may be the same as that shown in the respective drawings in the first embodiment.

  Hereinafter, the semiconductor package of the second embodiment will be described with a focus on differences from the above-described embodiments, and description of similar matters will be omitted.

  The semiconductor package of the second embodiment is substantially the same as that of the first embodiment except that the configuration of the wiring board and the bonding method between the first reinforcing member and the second reinforcing member and the wiring board are different.

  As shown in FIG. 6, the semiconductor package 1A includes a wiring board 2A, a semiconductor element 3A mounted on the wiring board 2A, a first reinforcing member 4A, and a second reinforcing member 5A.

Hereinafter, each part of the semiconductor package 1A will be sequentially described in detail.
[Wiring board]
The wiring board 2A is a board that supports the semiconductor element 3A. For example, the wiring board 2A is a relay board (interposer) that relays electrical connection between the mounted semiconductor element 3A and the motherboard.

  The wiring board 2 </ b> A includes a substrate 25, conductor patterns 261, 262, 263, 264, conductor posts 271, 272, and 273, and heat transfer posts 281, 282, and 283.

  In the present embodiment, the conductor pattern 263 constitutes a first conductor pattern provided on one surface side of the substrate 25, and the conductor pattern 264 is provided on the other surface side of the substrate 25, and the first pattern A second conductor pattern electrically connected to the conductor pattern is formed.

  The substrate 25 is composed of a plurality (three layers in this embodiment) of insulating layers 251, 252 and 253. More specifically, the substrate 25 is configured by laminating an insulating layer 251, an insulating layer 252, and an insulating layer 253 in this order.

  Each of the insulating layers 251, 252, and 253 is made of an insulating material, like the insulating layers 211, 212, 213, 214, and 215 of the first embodiment described above.

  A conductor pattern 261 is provided on the surface of the substrate 25 opposite to the insulating layer 252 of the insulating layer 251. A conductive pattern 262 is interposed between the insulating layer 251 and the insulating layer 252. A conductor pattern 263 is interposed between the insulating layer 252 and the insulating layer 253. A conductor pattern 264 is provided on the surface of the insulating layer 253 opposite to the insulating layer 252.

  Each of the conductor patterns 261, 262, 263, and 264 includes a portion that functions as a circuit having a plurality of wirings (hereinafter also referred to as “circuit portion”). In addition, each of the conductor patterns 261, 262, 263, and 264 has a portion (hereinafter also referred to as “heat transfer portion”) that is not used for transmission of an electrical signal but is used for heat transfer as described later.

  As the constituent material of the conductor patterns 261, 262, 263, 264, the same materials as the conductor patterns 221, 222, 223, 224 of the first embodiment described above can be used.

  The insulating layer 251 has a via hole penetrating in the thickness direction, and a conductor post (via post) 271 and a heat transfer post 281 are provided in the via hole. The conductor post 271 passes through the insulating layer 251 in the thickness direction, and has an upper end connected to the circuit portion of the conductor pattern 261 and a lower end connected to the circuit portion of the conductor pattern 262. Thereby, the conductor pattern 261 and the conductor pattern 262 are electrically connected. The heat transfer post 281 passes through the insulating layer 251 in the thickness direction, and has an upper end connected to the heat transfer portion of the conductor pattern 261 and a lower end connected to the heat transfer portion of the conductor pattern 262. Has been. Thereby, the heat transfer between the conductor pattern 261 and the conductor pattern 262 can be efficiently performed via the heat transfer post 281.

  Similarly, the insulating layer 252 is provided with conductor posts (via posts) 272 and heat transfer posts 282 that penetrate in the thickness direction. The conductor post 272 has an upper end connected to the circuit portion of the conductor pattern 262 and a lower end connected to the circuit portion of the conductor pattern 263. Thereby, the conductor pattern 262 and the conductor pattern 263 are electrically connected. The heat transfer post 282 passes through the insulating layer 252 in the thickness direction, and the upper end portion is connected to the heat transfer portion of the conductor pattern 262 and the lower end portion is connected to the heat transfer portion of the conductor pattern 263. Has been. Thereby, heat transfer between the conductor pattern 262 and the conductor pattern 263 can be efficiently performed via the heat transfer post 282.

  The insulating layer 253 is provided with conductor posts (via posts) 273 and heat transfer posts 283 that penetrate in the thickness direction. The conductor post 273 has an upper end connected to the circuit portion of the conductor pattern 263 and a lower end connected to the circuit portion of the conductor pattern 264. Thereby, the conductor pattern 263 and the conductor pattern 264 are electrically connected. The heat transfer post 283 passes through the insulating layer 253 in the thickness direction, and the upper end portion is connected to the heat transfer portion of the conductor pattern 263 and the lower end portion is connected to the heat transfer portion of the conductor pattern 264. Has been. Thereby, heat transfer between the conductor pattern 263 and the conductor pattern 264 can be efficiently performed via the heat transfer post 283.

  The circuit portions of the conductor patterns 261, 262, 263, and 264 and the conductor posts 271, 272, and 273 thus provided are used for transmission of electrical signals.

  Here, the surface of the conductor pattern 261 opposite to the insulating layer 251 is connected to the semiconductor element 3A via a metal bump 31A as will be described later. Thereby, the conductive pattern 261 and the semiconductor element 3A are electrically connected.

  A plurality of metal bumps 72 are bonded to the surface of the conductor pattern 264 opposite to the insulating layer 253.

  The metal bumps 72 are for electrically connecting the semiconductor package 1 to, for example, a motherboard, like the metal bumps 71 of the first embodiment described above.

  On the other hand, the heat transfer portions and the heat transfer posts 281, 282, and 283 of the conductor patterns 261, 262, 263, and 264 are used for heat transfer in the thickness direction of the wiring board 2. That is, the heat transfer portions and the heat transfer posts 281, 282, and 283 of the conductor patterns 261, 262, 263, 264 connect the first reinforcing member 4 A and the second reinforcing member 5 A, and are more thermally conductive than the substrate 25. Constitutes a high heat conduction part. Thereby, heat can be efficiently transferred from the first reinforcing member 4A to the second reinforcing member 5A via the heat transfer portions of the conductor patterns 261, 262, 263, 264 and the heat transfer posts 281, 282, 283. . As a result, the heat dissipation of the semiconductor package 1A can be improved.

[Semiconductor element]
The semiconductor element 3A is, for example, an integrated circuit element (IC), and more specifically, for example, a logic IC, a memory, and a light receiving / emitting element, as with the semiconductor element 3 of the first embodiment described above.

  The semiconductor element 3A is electrically connected to the conductor pattern 261 that is the first conductor pattern via the metal bump 31A.

  The metal bump 31A is configured similarly to the metal bump 31 of the first embodiment described above.

Further, the semiconductor element 3A is bonded (bonded) to the upper surface of the wiring board 2A via the adhesive layer 32A.
This adhesive layer 32A is configured similarly to the adhesive layer 32 of the first embodiment described above.

[First reinforcing member]
The first reinforcing member (stiffener) 4A is bonded to a portion of the upper surface (one surface) of the substrate 25 of the wiring substrate 2A described above where the semiconductor element 3A is not bonded.

The first reinforcing member 4A has a smaller thermal expansion coefficient than the substrate 25, and can be configured similarly to the first reinforcing member 4 of the first embodiment described above.
The first reinforcing member 4A is provided so as to surround the periphery of the semiconductor element 3A.

  The space between the first reinforcing member 4A and the semiconductor element 3A is filled with a heat conductive material 6A. Thereby, heat can be efficiently transmitted from the semiconductor element 3A to the first reinforcing member 4A via the heat conductive material 6A. As a result, the heat dissipation of the semiconductor package 1A can be improved.

  Such a heat conductive material 6A is not particularly limited, but can be configured similarly to the heat conductive material 6 of the first embodiment described above.

  In the present embodiment, the first reinforcing member 4 </ b> A is bonded to the upper surface of the substrate 25 through the adhesive 11. Thereby, installation of the 1st reinforcement member 4A becomes easy.

  The adhesive 11 is not particularly limited as long as it has an adhesive function, and various adhesives can be used, but those having excellent thermal conductivity are preferable, and the thermal conductivity of the first embodiment described above. The same material 6 can be used.

  In particular, in this embodiment, an insulating layer 291 such as a solder resist is provided on the conductor pattern 261, and the adhesive 11 is provided on the insulating layer 291. Therefore, when a resin composition comprising an inorganic filler and a resin material is used as the adhesive 11, a conductive filler can be used as the inorganic filler, and in particular, a metal filler having excellent heat conductivity. (For example, Ag filler) can be used.

[Second reinforcing member]
The second reinforcing member (stiffener) 5A is joined to the lower surface (the other surface) of the substrate 25 of the wiring substrate 2A.

  Like the first reinforcing member 4A described above, the second reinforcing member 5A has a smaller coefficient of thermal expansion than the substrate 25, and can be configured similarly to the second reinforcing member 5 of the first embodiment described above.

  In addition, the second reinforcing member 5A, like the second reinforcing member 5 of the first embodiment described above, has a plurality of openings 51A formed so as to surround the metal bumps 72 without contacting the metal bumps 72 described above. Have Thereby, the ratio of the area which the 2nd reinforcement member 5A occupies for the lower surface of 2 A of wiring boards can be enlarged. As a result, the effect of increasing the rigidity of the wiring board 2A by the second reinforcing member 5A can be made excellent.

  Further, an insulating material 82 is provided (filled) between the second reinforcing member 5 </ b> A and each metal bump 72. Thereby, contact with 5 A of 2nd reinforcement members and each metal bump 72 can be prevented. Therefore, the rigidity and heat dissipation of the second reinforcing member 5A can be enhanced while improving the reliability of the semiconductor package 1A.

  The insulating material 82 is formed so as to surround the periphery of each metal bump 72, and is joined to each metal bump 72. Thereby, the insulating material 82 reinforces the metal bump 72.

  Such an insulating material 82 can be configured similarly to the insulating material 81 of the first embodiment described above.

In the present embodiment, the second reinforcing member 5 </ b> A is bonded to the lower surface of the substrate 25 via the adhesive 12. Thereby, installation of the 2nd reinforcement member 5A becomes easy.
As the adhesive 12, the thing similar to the adhesive 11 mentioned above can be used.

  In particular, in this embodiment, an insulating layer 292 such as a solder resist is provided on the conductor pattern 264, and the adhesive 12 is provided on the insulating layer 292. Therefore, when a resin composition comprising an inorganic filler and a resin material is used as the adhesive 12, it is possible to use a conductive material as the inorganic filler, and in particular, a metal filler having excellent heat conductivity. (For example, Ag filler) can be used.

  Also with the semiconductor package 1A configured as described above, the same effects as those of the semiconductor package 1 of the first embodiment described above can be obtained. In other words, the semiconductor package 1A can prevent the occurrence of defects due to heat.

(Semiconductor package manufacturing method)
The semiconductor package 1A as described above can be manufactured, for example, as follows.

  Hereinafter, an example of a method of manufacturing the semiconductor package 1A will be briefly described with reference to FIGS.

[Step 1A]
First, as shown in FIG. 7A, a laminate (for example, a copper-clad laminate) in which metal layers 262A and 263A are provided on both surfaces of an insulating layer 252A is prepared.

  Here, the insulating layer 252A is for forming the insulating layer 252 of the wiring board 2A described above. The metal layer 262A is for forming the conductor pattern 262 of the wiring board 2 described above. The metal layer 263A is for forming the conductor pattern 263 of the wiring board 2 described above.

[Step 2A]
Next, as shown in FIG. 7B, through holes 2521 and 2522 (via holes and through holes) are formed in the stacked body including the insulating layer 252A and the metal layers 262A and 263A. Thereby, the insulating layer 252 is obtained.

  As a method for forming the through holes 2521 and 2522, the same method as the method for forming the through hole 2111 of the first embodiment described above can be used, and it is not particularly limited. Can do.

[Step 3A]
Next, as shown in FIG. 7C, conductor posts 272 are formed in the through holes 2521. Further, a heat transfer post 282 is formed in the through hole 2522.

  The method for forming the conductor post 272 and the heat transfer post 282 is not particularly limited, and for example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used. In particular, when the conductor post 272 and the heat transfer post 282 are each formed in a hollow shape, electrolytic plating is preferably used.

[Step 4A]
Next, as shown in FIG. 7D, the metal layers 262A and 263A are patterned to form conductor patterns 262 and 263, respectively.

  As the patterning method, a method similar to the method of forming the conductor pattern 221 of the first embodiment described above can be used, and is not particularly limited, but etching is preferably used.

  As described above, the insulating layer 252, the conductor patterns 262, 263, the conductor posts 272, and the heat transfer posts 282 are formed.

[Step 5A]
Next, as illustrated in FIG. 7E, a stacked body including the insulating layer 251 </ b> A and the metal layer 261 </ b> A is attached onto the conductor pattern 262 so that the insulating layer 251 </ b> A side is in contact therewith. Similarly, a stacked body including the insulating layer 253A and the metal layer 264A is attached over the conductor pattern 263 so that the insulating layer 253A side is in contact therewith.

  Here, the insulating layer 251A is, for example, a prepreg for forming the insulating layer 251 of the wiring board 2A described above, and an uncured product (semi-cured material) of the resin composition of the insulating layer 251 described above. ) Is impregnated into the base material. Similarly, the insulating layer 253A is, for example, a prepreg for forming the insulating layer 253 of the wiring board 2A described above. The uncured product (semi-cured product) of the resin composition of the insulating layer 253 described above. ) Is impregnated into the base material.

[Step 6A]
Next, as shown in FIG. 7F, through-holes 2511 and 2512 (via holes) are formed in the stacked body including the insulating layer 251A and the metal layer 261A. Thereby, the insulating layer 251 is obtained. Similarly, through holes 2531 and 2532 (via holes) are formed in the stacked body including the insulating layer 253A and the metal layer 264A. Thereby, the insulating layer 253 is obtained.

  A method for forming the through holes 2511, 2512, 2531, and 2532 is not particularly limited, but the same method as in the above-described step [2A] can be used.

[Step 7A]
Next, conductor posts 271 and 273 are formed in the through holes 2511 and 2531 as shown in FIG. In addition, heat transfer posts 281 and 283 are formed in the through holes 2512 and 2532.

  The method for forming the conductor posts 271 and 273 and the heat transfer posts 281 and 283 is not particularly limited. For example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like is used. be able to.

[Step 8A]
Next, as shown in FIG. 8B, the conductive layers 261 and 264 are formed by patterning the metal layers 261A and 264A, respectively.

  As the patterning method, the same method as in the above-described step [4A] can be used.

[Step 9A]
Next, as shown in FIG. 8C, insulating layers 291 and 292 having openings 2912 and 2922 are formed.

  The insulating layers 291 and 292 are not particularly limited. For example, the insulating layers 291 and 292 can be formed by applying a resist material, exposing, and developing.

[Step 10A]
Next, as illustrated in FIG. 8D, the first reinforcing member 4 </ b> A is bonded onto the insulating layer 291 via the adhesive 11. Similarly, the second reinforcing member 5 </ b> A is bonded onto the insulating layer 292 through the adhesive 12. The adhesives 11 and 12 having high thermal conductivity are formed so as to fill the openings 2912 and 2922 formed on the heat transfer posts 281 and 283, and heat the first reinforcing member 4A and the second reinforcing member 5A. Connect.

  Here, as the adhesive 11, for example, a metal paste including metal particles such as silver and a resin such as a polyimide resin and an epoxy resin can be used. Such a metal paste can be used as the adhesive 11 by being solidified or cured while being interposed between the insulating layer 291 and the first reinforcing member 4A. Similarly, the adhesive 12 can also use a metal paste.

[Step 11A]
Next, as illustrated in FIG. 9A, the semiconductor element 3 </ b> A is bonded onto the conductor pattern 261 via the metal bump 31 </ b> A.
Such joining can be performed in the same manner as in step [7] of the first embodiment described above.

[Step 12A]
Next, an underfill material is supplied to the gap formed between the semiconductor element 3A and the conductor pattern 261 to form an adhesive layer 32A as shown in FIG. 9B. Thereafter, the heat conductive material 6 is filled in the gap between the semiconductor element 3A and the first reinforcing member 4A.
A known underfill material can be used to form the adhesive layer 32A.

[Step 13A]
Next, as shown in FIG. 9C, an insulating material 82 </ b> A is applied on the conductor pattern 264.
As the insulating material 82A, the same material as the insulating material 81A of the first embodiment described above can be used.

[Step 14A]
Next, as shown in FIG. 9D, metal bumps 72 are formed on the conductor pattern 264. The metal bump 72 can be formed in the same manner as the metal bump 71 of the first embodiment described above. As the metal bumps 72 are formed, the insulating material 82 is formed.
The semiconductor package 1A is obtained as described above.

  Hereinafter, preferred embodiments of the second semiconductor package and the semiconductor device of the present invention will be described with reference to the accompanying drawings.

<First Embodiment>
(Semiconductor package)
First, the semiconductor package of the present invention will be described.

  FIG. 10 is a cross-sectional view schematically showing the semiconductor package according to the first embodiment of the second semiconductor package of the present invention, FIG. 11 is a top view showing the semiconductor package shown in FIG. 10, and the semiconductor package shown in FIG. 3 is a cross-sectional view showing the vicinity of a portion where the first reinforcing member and the semiconductor element are in contact with each other in the semiconductor package shown in FIG. 10, and FIG. 13 is the semiconductor shown in FIG. It is a figure which shows an example of the manufacturing method of a package. In the following description, for convenience of description, the upper side in FIGS. 10 and 12 is referred to as “upper” and the lower side is referred to as “lower”. In each figure, each part of the semiconductor package is exaggerated for convenience of explanation.

  As shown in FIG. 10, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member 4, and a second reinforcing member 5.

  According to such a semiconductor package 1, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Increases overall rigidity. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. In the same manner, warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  Further, by providing the first reinforcing member 4 and the second reinforcing member 5, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced. Thermal conductivity in the direction can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

Hereinafter, each part of the first embodiment of the second semiconductor package 1 will be sequentially described in detail.
[Wiring board]
A wiring board similar to the wiring board 2 used in the first embodiment of the first semiconductor package can be used.

[Semiconductor element]
A semiconductor element similar to the semiconductor element used in the first embodiment of the first semiconductor package can be used.

[First reinforcing member]
As shown in FIGS. 10, 11, and 12, the first reinforcing member (stiffener) 4 is provided on a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 that is not joined to the semiconductor element 3. It is joined.

  This 1st reinforcement member 4 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 1st reinforcement member 4 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

  The first reinforcing member 4 has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed.

  The first reinforcing member 4 has a main body portion 41 and ribs 42 that are convex portions formed so as to protrude from the main body portion 41 toward the semiconductor element 3 and have a plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  The main body 41 is provided so as to surround the periphery of the semiconductor element 3 with a gap between the outer periphery (side end) of the semiconductor element 3. In the present embodiment, the main body 41 has an annular shape (more specifically, a rectangular annular shape) so as to surround the semiconductor element 3. Thereby, the effect which raises the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent. The main body 41 is provided so that a gap is formed between the semiconductor element 3 and the side end of the semiconductor element 3 over the entire circumference.

  Further, the rib 42 is formed on the inner peripheral portion (side end portion on the inner peripheral side) of the main body portion 41 so as to protrude inward, that is, toward the semiconductor element 3. In the present embodiment, the rib 42 has an annular shape (more specifically, a rectangular annular shape). That is, the rib 42 is formed over the entire circumference of the main body 41.

  Further, the substrate 21 side surface (that is, the lower surface) of the main body 41 and the substrate 21 side surface (that is, the lower surface) of the rib 42 are located on the same surface. Thereby, the 1st reinforcement member 4 can be joined to the board | substrate 21 stably.

  Further, the surface of the first reinforcing member 4 opposite to the substrate 21 (namely, the upper surface), that is, the surface of the main body 41 opposite to the substrate 21 (namely, the upper surface) is the surface opposite to the substrate 21 of the semiconductor element 3. It is preferably located on the same plane as (that is, the upper surface) or on the substrate 21 side (that is, lower side). Thereby, when the semiconductor element 3 is installed after the first reinforcing member 4 is installed in manufacturing the semiconductor package 1, the installation of the semiconductor element 3 is facilitated.

In the present embodiment, the surface of the first reinforcing member 4 opposite to the substrate 21 (that is, the upper surface), that is, the surface of the main body 41 opposite to the substrate 21 (that is, the upper surface), and the substrate 21 of the semiconductor element 3 are opposite. The side surface (that is, the upper surface) is located on the same surface. Thereby, the curvature of the wiring board 2 can be effectively suppressed or prevented while the semiconductor package 1 is thinned. Moreover, when providing another structure (for example, a board | substrate, a semiconductor element, a heat sink, etc.) on the upper surface of the 1st reinforcement member 4, the installation of the structure can be performed stably.
The first reinforcing member 4 and the semiconductor element 3 may be molded with a sealing resin.

  In this semiconductor package 1, a part of the first reinforcing member 4, that is, the surface (that is, the upper surface) opposite to the substrate 21 of the rib 42 is in contact with the surface (that is, the lower surface) of the semiconductor element 3. doing. Thereby, the heat from the semiconductor element 3 can be efficiently transmitted to the first reinforcing member 4. Moreover, compared with the case where the 1st reinforcement member 4 and the side surfaces of the semiconductor element 3 are made to contact, damage to the semiconductor element 3 at the time of manufacture can be prevented more reliably.

  Further, the rib 42 is in contact with the semiconductor element 3 over the entire circumference of the semiconductor element 3. Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4, and as a result, the heat dissipation of the semiconductor package 1 can be improved.

  Further, the distance between the inner peripheral surface 411 of the main body 41 of the first reinforcing member 4 and the outer peripheral surface (side end surface) 33 of the semiconductor element 3 (distance between the main body 41 and the semiconductor element 3), that is, The width of the gap between the main body portion 41 of the first reinforcing member 4 and the semiconductor element 3 is constant over the entire circumference of the semiconductor element 3. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably. In addition, heat transfer from the semiconductor element 3 to the first reinforcing member can be generated efficiently and uniformly.

  Further, the distance between the inner peripheral surface 411 of the main body 41 and the outer peripheral surface 33 of the semiconductor element 3 is not particularly limited, but is preferably about 0.1 to 5 mm, and is about 0.1 to 2 mm. It is more preferable. Thereby, the reinforcement effect of the wiring board 2 is exhibited suitably.

  Note that the distance between the inner peripheral surface 411 of the main body 41 and the outer peripheral surface 33 of the semiconductor element 3 may not be constant.

  The first reinforcing member 4 can be formed of the same material as the first reinforcing member 4 used in the first embodiment of the first semiconductor package.

  The average thickness of the first reinforcing member 4 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and is not specifically limited, For example, it is about 0.02 mm or more and 0.8 mm or less.

  Moreover, the surface of the 1st reinforcement member 4 may be roughened from a heat-dissipating viewpoint. If the surface of the first reinforcing member 4 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 1st reinforcement member 4 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the first reinforcing member 4 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the first reinforcing member 4, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the first reinforcing member 4 from the viewpoint of improving adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

  The second reinforcing member 5 has the same configuration as the second reinforcing member 5 in the first semiconductor package and can be formed of the same material.

  Further, the surface of the second reinforcing member 5 may be roughened from the viewpoint of heat dissipation. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 2nd reinforcement member 5 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the second reinforcing member 5, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the second reinforcing member 5 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately selected according to the shape and size of the reinforcing member, the type of the resin material, etc. Can be implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

  An insulating material 81 is provided (filled) between the second reinforcing member 5 and each metal bump 71. Thereby, the contact with the 2nd reinforcement member 5 and each metal bump 71 can be prevented. Therefore, the rigidity and heat dissipation of the second reinforcing member 5 can be enhanced while improving the reliability of the semiconductor package 1.

  The insulating material 81 is formed so as to surround the metal bump 71 and is bonded to each solder bump. Thereby, the insulating material 81 reinforces the metal bump 71.

  Such an insulating material 81 can be the same as the insulating material 81 in the first semiconductor package.

  According to the second semiconductor package 1 configured as described above, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 in portions other than the portion joined to the semiconductor element 3. Therefore, the rigidity of the entire semiconductor package 1 is increased. In particular, since the coefficient of thermal expansion of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2, the semiconductor device 3 is provided over the entire surface of the wiring substrate 2 in the same manner as the wiring substrate 2. It is possible to suppress or prevent warping of the wiring board 2 due to a difference in thermal expansion coefficient between the semiconductor element 3 and the semiconductor element 3.

  Further, since the ribs 42 of the first reinforcing member 4 are in contact with the semiconductor element 3, the heat from the semiconductor element 3 is efficiently transferred to the first reinforcing member 4 and escaped through the first reinforcing member. And has excellent heat dissipation. That is, the heat from the semiconductor element 3 is released to the outside through the first reinforcing member 4, the heat transfer post 24, the second reinforcing member 5, and the heat transfer bump 91, thereby improving the heat dissipation of the semiconductor package 1. Can be made.

  Moreover, since the thickness of the wiring board 2 can be reduced, the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation.

  Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured as follows, for example.

Hereinafter, an example of a method for manufacturing the semiconductor package 1 will be briefly described with reference to FIG.
[Step 1B]
First, as shown to Fig.13 (a), the laminated body of the metal layer 221A and the prepreg 211A is prepared, and the 1st reinforcement member 4 is affixed on the surface at the side of the prepreg 211A of the laminated body.

  Here, the prepreg 211A is for forming the insulating layer 211 of the wiring board 2 described above, and the base material is impregnated with an uncured product (semi-cured product) of the resin composition of the insulating layer 211 described above. It will be.

  The metal layer 221 </ b> A is for forming the conductor pattern 221 of the wiring board 2 described above, and is made of the same material as the constituent material of the conductor pattern 221.

[Step 2B]
Next, as shown in FIG. 13B, a through hole 2111 (via hole) is formed in the prepreg 211A.

  A method for forming the through-hole 2111 is not particularly limited, but can be formed by, for example, laser irradiation.

Here, for example, a CO ₂ laser, a UV-YAG laser, or the like can be used as the laser.

  The through hole 2111 can also be formed by machining such as a drill.

[Step 3B]
Next, as shown in FIG. 13C, a conductor post 231 is formed in the through hole 2111.

  The method for forming the conductor post 231 is not particularly limited. For example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used.

[Step 4B]
Next, as shown in FIG. 13D, the conductor layer 221 is formed by patterning the metal layer 221A.

  The patterning method is not particularly limited, but etching is preferably used.

  As described above, the insulating layer 211, the conductor pattern 221 and the conductor post 231 are formed.

[Step 5B]
Next, in the same manner as in the above-mentioned steps [Step 1B] to [Step 4B], a laminate composed of a prepreg and a metal layer for forming the insulating layers 212, 213, 214, 215 and the conductor patterns 222, 223, 224 Conductor patterns 222, 223, and 224 and conductor posts 232, 233, and 234 are formed respectively. Further, after the prepregs for the insulating layers 211, 212, 213, 214, and 215 are laminated, the heat transfer post 24 is formed using the same method as that for the conductor posts 231, 232, 233, and 234. Thereafter, the prepreg for the insulating layers 211, 212, 213, 214, and 215 is cured (completely cured) to obtain the wiring board 2 as shown in FIG.

  Examples of the method for laminating the prepreg for the insulating layers 211, 212, 213, 214, and 215 include a vacuum press and a laminate. Among these, the joining method by a vacuum press is preferable. Thereby, the adhesion strength of the prepreg for the insulating layers 211, 212, 213, 214, and 215 can be improved.

  A method for curing the prepreg for the insulating layers 211, 212, 213, 214, and 215 is not particularly limited, and for example, heat treatment is preferably used.

  The heat transfer posts 24 are formed at the same time as the conductor posts 231, 232, 233, 234, and the heat transfer posts are formed on the prepregs for the insulating layers 211, 212, 213, 214, 215. These heat transfer posts may be connected and formed by laminating prepregs.

[Step 6B]
Next, after applying an insulating material 81A to the lower surface of the wiring board 2, a metal ball (solder ball) 71A is soldered by solder reflow. Thereby, the metal bump 71 and the insulating material 81 are formed.

  Such solder bonding is not particularly limited, but can be performed by placing each metal bump 71 in contact with the lower surface of the wiring board 2 and heating in that state, for example, 200 to 280 ° C. for 10 to 60 seconds. .

  The insulating material 81A is for forming the insulating material 81 described above. For example, the insulating material 81A is hardened by heating while its fluidity is lowered by irradiation with active energy rays.

  When forming the insulating material 81, for example, as shown in FIG. 13F, the insulating material 81A is applied to the lower surface of the wiring board 2, and after the solder bonding as described above, the insulating material 81A is cured by heating. By doing so, the insulating material 81 is obtained.

  The insulating material 81 thus obtained is formed so as to surround the periphery of the metal bump 71 as described above.

  At this time, the insulating material 81A functions as a flux at the time of solder joining, and is cured in a shape that reinforces the periphery of the solder joint portion in a ring shape by interfacial tension with the metal ball 71A.

[Step 7B]
Next, as shown in FIG. 13G, the second reinforcing member 5 is joined to the lower surface of the wiring board 2. In addition, after applying an underfill material to the upper surface of the wiring board 2, the semiconductor element 3 is joined by solder reflow through the metal bumps 31. When the semiconductor element 3 is joined, the semiconductor element 3 is positioned so that the rib 42 of the first reinforcing member 4 and the semiconductor element 3 are in contact as described above. As the underfill material, the same resin as the insulating material 81 described above can be used.
The semiconductor package 1 is obtained as described above.

(Semiconductor device)
Next, a method for manufacturing a semiconductor device and a semiconductor device will be described based on preferred embodiments.

FIG. 14 is a cross-sectional view schematically showing a semiconductor device according to an embodiment of the present invention.
As shown in FIG. 14, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  Further, the heat transfer bumps 91 of the semiconductor package 1 are joined to the heat radiation terminals (not shown) of the mother board 200. The heat of the semiconductor package 1 can be efficiently released to the mother board 200 through this joint. When such a heat transfer bump 91 is made of the same material as that of the metal bump 71 described above, the heat transfer bump 91 can be bonded to the mother board 200 at the same time as the metal bump 71 is bonded.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Second Embodiment
FIG. 15 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the present invention. In the following description, for convenience of explanation, the upper side in FIG. 15 is referred to as “upper” and the lower side is referred to as “lower”.

  Hereinafter, the second embodiment will be described with a focus on the differences from the first embodiment described above, and the description of the same matters will be omitted.

  As shown in FIG. 15, in the semiconductor package 1 according to the second embodiment, the gap between the first reinforcing member 4 and the semiconductor element 3, that is, the gap between the main body 41 and the semiconductor element 3, from the substrate 21. Also, the heat conductive material 6 having high heat conductivity is filled. Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4 through the heat conductive material 6. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Moreover, although the heat conductive material 6 is filled in all or part of the gap between the main body 41 (first reinforcing member 4) and the semiconductor element 3, in the present embodiment, the heat conductive material 6 is The entire gap between the main body 41 (first reinforcing member 4) and the semiconductor element 3 is filled. Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The thermal conductivity of the heat conductive material 6 is preferably about 0.5 to 100 W / (m · K), and more preferably about 1 to 50 W / (m · K). Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The heat conductive material 6 is not particularly limited, and examples thereof include a resin composition that includes an inorganic filler and a resin material (a resin material and an inorganic filler blended in the resin material).

  Moreover, as the heat conductive material 6, although what has electroconductivity and what has insulation can be used, the thing which has insulation is preferable. Thereby, the unintentional short circuit through the heat conductive material 6 can be prevented.

  As the inorganic filler (inorganic filler) used for the heat conductive material 6 (resin composition), the same filler as that used in the first semiconductor package can be used. In addition, when what has electroconductivity as an inorganic filler is used, the insulation process is performed to the site | part which the heat conductive material 6 contacts as needed.

  Among these, as the inorganic filler, from the viewpoint of excellent insulation and thermal conductivity, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite, boron nitride, Nitride such as silicon nitride, gallium nitride and titanium nitride is preferable.

  Moreover, as a resin material used for the heat conductive material 6 (resin composition), the various thermoplastic resins or various thermosetting resins used by the said 1st semiconductor package are mentioned, for example.

  In addition, the heat conductive material 6 may be the same as the adhesive layer 32 (underfill material) described above, and the heat conductive material 6 and the adhesive layer 32 may be formed in a lump. .

According to this semiconductor package 1, the same effects as those of the first embodiment described above can be obtained.
The second embodiment can also be applied to the semiconductor device described above and a third embodiment described later.

<Third Embodiment>
FIG. 16 is a top view schematically showing a semiconductor package according to the third embodiment of the present invention. Hereinafter, the third embodiment will be described with a focus on differences from the first embodiment described above, and descriptions of the same matters will be omitted.

  As shown in FIG. 16, in the semiconductor package 1 of the third embodiment, a part of the inner peripheral portion of the main body 41 of the first reinforcing member 4, that is, a portion corresponding to the four corners of the semiconductor element 3, In each case, a plate-like convex portion 43 is formed. Each of the convex portions 43 is in contact with a corresponding corner portion of the semiconductor element 3.

  Thereby, it is possible to relieve stress when predetermined portions such as the wiring substrate 2 and the semiconductor element 3 of the semiconductor package 1 are thermally expanded. Further, the space for providing the metal bumps 31 can be widened.

  The convex portion 43 may be provided so as to contact one, two, or three of the four corner portions of the semiconductor element 3.

In the third embodiment, the semiconductor element 3 is mounted and the semiconductor element 3 is joined to the wiring board 2 by reflow using a flux or a solder paste, and then a normal capillary underfill material is used as the wiring board 2. The semiconductor package 1 can also be manufactured by filling and curing between the semiconductor element 3.
According to this semiconductor package 1, the same effects as those of the first embodiment described above can be obtained.
The third embodiment can also be applied to the semiconductor device described above.

Although the second semiconductor package and the semiconductor device of the present invention have been described based on the illustrated embodiments, the present invention is not limited to these.
In the above-described embodiment, the upper surface of the rib 42 of the first reinforcing member 4 is in contact with the lower surface of the semiconductor element 3, but the portions that are in contact with each other are not limited to this, for example, the first reinforcing member 4. The inner peripheral surface (side surface on the inner peripheral side) may be in contact with the outer peripheral surface of the semiconductor element 3.

Next, the third semiconductor package and the semiconductor device of the present invention will be described.
(Semiconductor package)
First, the semiconductor package of the present invention will be described.

  The semiconductor package of the present invention pays particular attention to the heat conductive material 6 in the first embodiment of the first semiconductor package, and the others are the first embodiment of the first semiconductor except where otherwise described. It has the same structure. Therefore, the third semiconductor package can also have the same effects as the first embodiment of the first semiconductor package.

Hereinafter, each part of the semiconductor package 1 of the present embodiment will be sequentially described in detail.
[Wiring board]
A wiring board similar to the wiring board used in the first semiconductor package can be used.

[Semiconductor element]
A semiconductor element similar to the semiconductor element used in the first semiconductor package can be used.

[First reinforcing member]
A first reinforcing member similar to the semiconductor element used in the first semiconductor package can be used.

  The first reinforcing member 4 in the present embodiment is a distance between the semiconductor element 3 (a distance between the inner peripheral surface 411 of the first reinforcing member 4 and the outer peripheral surface 33 of the semiconductor element 3), that is, the first 1 The width of the gap between the reinforcing member 4 and the semiconductor element 3 is formed to be constant over the entire circumference of the semiconductor element 3. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably. In addition, heat transfer from the semiconductor element 3 to the first reinforcing member via the heat conductive material 6 can be generated efficiently and uniformly.

  Moreover, the distance between the 1st reinforcement member 4 and the semiconductor element 3 is although it does not specifically limit, It is preferable that it is about 0.1-5 mm, and it is more preferable that it is about 0.1-2 mm. Thereby, the reinforcement effect of the wiring board 2 is exhibited suitably.

  The distance between the first reinforcing member 4 and the semiconductor element 3 may not be constant, and the first reinforcing member 4 and the semiconductor element 3 may be in contact with each other.

  Moreover, the surface of the 1st reinforcement member 4 may be roughened from a heat-dissipating viewpoint. If the surface of the first reinforcing member 4 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 1st reinforcement member 4 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the first reinforcing member 4 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the first reinforcing member 4, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the first reinforcing member 4 from the viewpoint of improving adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[Thermal conductive material]
In this embodiment, as shown in FIGS. 1 and 2, the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with a heat conductive material 6 having higher heat conductivity than the substrate 21. . Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4 through the heat conductive material 6. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Moreover, although the heat conductive material 6 is filled in all or part of the gap between the first reinforcing member 4 and the semiconductor element 3, in the present embodiment, the heat conductive material 6 is the first reinforcing member. The entire gap between 4 and the semiconductor element 3 is filled. Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The thermal conductivity of the heat conductive material 6 is preferably about 0.5 to 100 W / (m · K), and more preferably about 1 to 50 W / (m · K). Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The heat conductive material 6 is not particularly limited, and examples thereof include a resin composition that includes an inorganic filler and a resin material (a resin material and an inorganic filler blended in the resin material).

  Moreover, as the heat conductive material 6, although what has electroconductivity and what has insulation can be used, the thing which has insulation is preferable. Thereby, the unintentional short circuit through the heat conductive material 6 can be prevented.

  As the inorganic filler (inorganic filler) used for the heat conductive material 6 (resin composition), the same inorganic filler used in the first semiconductor package can be used.

  Examples of the resin material used for the heat conductive material 6 (resin composition) include various thermoplastic resins and various thermosetting resins used in the first semiconductor package.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the above-described thermal conductive material 6. Things can be used.

  The second reinforcing member 5 can be the same as the second reinforcing member used in the first semiconductor package.

  Further, the surface of the second reinforcing member 5 may be roughened from the viewpoint of heat dissipation. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 2nd reinforcement member 5 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the second reinforcing member 5, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the second reinforcing member 5 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately selected according to the shape and size of the reinforcing member, the type of the resin material, etc. Can be implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

According to the third semiconductor package, the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with the thermal conductive material 6 having higher thermal conductivity than the substrate 21. The heat can be efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6 and can be released through the first reinforcing member, and the heat dissipation is excellent. That is, the heat from the semiconductor element 3 is released to the outside through the heat conductive material 6, the first reinforcing member 4, the heat transfer post 24, the second reinforcing member 5, and the heat transfer bump 91, thereby the semiconductor package. The heat dissipation of 1 can be improved.

(Semiconductor package manufacturing method)
The third semiconductor package 1 as described above can be manufactured in the same manner as the first embodiment of the first semiconductor package.

(Semiconductor device)
The third semiconductor device can be manufactured in the same manner as in the first embodiment of the first semiconductor device.

  According to the third semiconductor device 100 of the present invention as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

  In the above-described embodiment, the heat conductive material 6 is filled in the entire gap between the first reinforcing member 4 and the semiconductor element 3, but is not limited to this. For example, FIGS. As shown in l), a part of the gap between the first reinforcing member 4 and the semiconductor element 3 may be filled. In FIG. 17, the part indicated by the oblique lines is the heat conductive material 6. When a part of the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with the heat conductive material 6, a predetermined portion such as the wiring board 2 or the semiconductor element 3 of the semiconductor package 1 is thermally expanded. Stress can be relaxed.

Next, a fourth semiconductor package and a semiconductor device of the present invention will be described with reference to the drawings.
<First Embodiment>
(Semiconductor package)
First, the semiconductor package of this embodiment will be described.

  18 is a cross-sectional view schematically showing the semiconductor package according to the first embodiment of the present invention, FIG. 19 is a top view showing the semiconductor package shown in FIG. 18, and a bottom view showing the semiconductor package shown in FIG. FIG. 20 is a diagram illustrating an example of a method of manufacturing the semiconductor package illustrated in FIG. In the following description, for convenience of description, the upper side in FIG. In each figure, each part of the semiconductor package is exaggerated for convenience of explanation.

  As shown in FIG. 18, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member 4, and a second reinforcing member 5.

  According to such a semiconductor package 1, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Increases overall rigidity. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. In the same manner, warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  Further, by providing the first reinforcing member 4 and the second reinforcing member 5, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced. Thermal conductivity in the direction can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
As the wiring board 2, a wiring board similar to the wiring board used in the first semiconductor package can be used.

[Semiconductor element]
For example, the same semiconductor element as the semiconductor element used in the first semiconductor package can be used as the semiconductor element 3.

[First reinforcing member]
The first reinforcing member (stiffener) 4 is bonded to a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above where the semiconductor element 3 is not bonded.

  This 1st reinforcement member 4 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 1st reinforcement member 4 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

  The first reinforcing member 4 has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed.

  Moreover, the 1st reinforcement member 4 has comprised plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  The surface of the first reinforcing member 4 opposite to the substrate 21 (that is, the upper surface) is the same surface as the surface of the semiconductor element 3 opposite to the substrate 21 (that is, the upper surface) or the substrate 21 side (that is, more than that). It is preferably located on the lower side. Thereby, when the semiconductor element 3 is installed after the first reinforcing member 4 is installed in manufacturing the semiconductor package 1, the installation of the semiconductor element 3 is facilitated.

In the present embodiment, the surface of the first reinforcing member 4 opposite to the substrate 21 (ie, the upper surface) and the surface of the semiconductor element 3 opposite to the substrate 21 (ie, the upper surface) are located on the same surface. Thereby, the curvature of the wiring board 2 can be effectively suppressed or prevented while the semiconductor package 1 is thinned. Moreover, when providing another structure (for example, a board | substrate, a semiconductor element, a heat sink, etc.) on the upper surface of the 1st reinforcement member 4, the installation of the structure can be performed stably.
The first reinforcing member 4 and the semiconductor element 3 may be molded with a sealing resin.

  The first reinforcing member 4 surrounds the periphery of the semiconductor element 3, that is, surrounds the periphery of the semiconductor element 3 through a gap between the outer periphery (side end portion) of the semiconductor element 3. Is provided. In the present embodiment, the first reinforcing member 4 has an annular shape (more specifically, a rectangular annular shape) so as to surround the semiconductor element 3. Thereby, the effect which raises the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent.

  The first reinforcing member 4 is provided so as to be separated from the semiconductor element 3 over the entire circumference of the semiconductor element 3. That is, the semiconductor package 1 has a gap between the first reinforcing member 4 and the semiconductor element 3 over the entire circumference of the semiconductor element 3.

  Further, the first reinforcing member 4 is a distance from the semiconductor element 3 (a distance between the inner peripheral surface 41 of the first reinforcing member 4 and the outer peripheral surface 33 of the semiconductor element 3), that is, the first reinforcing member 4. The width of the gap between the semiconductor element 3 and the semiconductor element 3 is constant over the entire circumference of the semiconductor element 3. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably. In addition, heat transfer from the semiconductor element 3 to the first reinforcing member via the heat sink 12 described later can be generated efficiently and uniformly.

  Moreover, the distance between the 1st reinforcement member 4 and the semiconductor element 3 is although it does not specifically limit, It is preferable that it is about 0.1-5 mm, and it is more preferable that it is about 0.1-2 mm. Thereby, the reinforcement effect of the wiring board 2 is exhibited suitably.

  The distance between the first reinforcing member 4 and the semiconductor element 3 may not be constant, and the first reinforcing member 4 and the semiconductor element 3 may be in contact with each other.

Moreover, the 1st reinforcement member 4 comprises the same structure as the 1st reinforcement member 4 of the said 1st semiconductor package, and can be formed with the same material.
In the present embodiment, a copper film may be formed on the surface of the first reinforcing member 4 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[heatsink]
As shown in FIGS. 18 and 19, the semiconductor package 1 is provided between the first reinforcing member 4 and the semiconductor element 3 on the surface (that is, the upper surface) opposite to the substrate 21 of the first reinforcing member 4 and the semiconductor element 3. The heat sink 12 is provided as a first heat conductive portion that is installed so as to straddle the substrate and has a higher thermal conductivity than the substrate 21. Thereby, the heat generated in the semiconductor element 3 can be efficiently transmitted from the semiconductor element 3 to the first reinforcing member 4 via the heat sink 12 and can be radiated from the heat sink 12. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  The heat sink 12 includes a substrate 121 and a plurality of heat radiation fins 122 erected on the substrate 121. In the present embodiment, the heat radiating fins 122 are formed over the entire area of the substrate 121.

  In the present embodiment, the heat sink 12 is installed so as to cover the semiconductor element 3 and the gap between the first reinforcing member 4 and the semiconductor element 3 in plan view, and corresponds to the semiconductor element 3. Radiating fins 122 are provided not only at the site but also at the site crossing the gap. Thereby, the heat dissipation of the semiconductor package 1 can be improved.

  Note that the heat sink 12 may be installed so that a part of the gap between the semiconductor element 3 and the first reinforcing member 4 and the semiconductor element 3 is exposed in a plan view, and crosses the gap. The heat radiating fins 122 may not be provided at the portion where the heat sink is provided.

  Moreover, the joining method to the 1st reinforcement member 4 and the semiconductor element 3 of the heat sink 12 is not specifically limited, For example, adhesion | attachment by an adhesive agent etc. are mentioned.

  The constituent material of the heat sink 12 is not particularly limited. For example, various metal materials can be used, but the thermal expansion coefficient of the heat sink 12 is preferably smaller than the thermal expansion coefficient of the substrate 21. Thereby, the thermal expansion of the board | substrate 21 can be suppressed similarly to the 1st reinforcement member 4 mentioned above.

  The heat sink 12 preferably has a difference in thermal expansion coefficient with the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the semiconductor element 3, the 1st reinforcement member 4, and the heat sink 12 can reinforce the wiring board 2 integrally, and can suppress the thermal expansion of the semiconductor package 1 whole.

  The heat conductivity of the heat sink 12 is preferably about 10 to 1000 W / (m · K), and more preferably about 50 to 500 W / (m · K). Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 via the heat sink 12, and more efficiently radiated from the heat sink 12.

  As a constituent material of the heat sink 12, it is preferable to use the same material as the first reinforcing member 4 described above. In addition, since this point has already been described, the description thereof is omitted here.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

  The second reinforcing member 5 has the same configuration as the second reinforcing member of the first semiconductor package and can be formed of the same material.

  In addition, from the viewpoint of heat dissipation, the surface of the second reinforcing member 5 may be roughened. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 2nd reinforcement member 5 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the second reinforcing member 5, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the second reinforcing member 5 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately selected according to the shape and size of the reinforcing member, the type of the resin material, etc. Can be implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

  According to this embodiment semiconductor package 1 in the fourth semiconductor package configured as described above, both sides of the wiring board 2 are also connected to the first reinforcing member 4 and the portion other than the portion joined to the semiconductor element 3. Since it is reinforced by the second reinforcing member 5, the rigidity of the entire semiconductor package 1 is increased. In particular, since the coefficient of thermal expansion of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2, the semiconductor device 3 is provided over the entire surface of the wiring substrate 2 in the same manner as the wiring substrate 2. It is possible to suppress or prevent warping of the wiring board 2 due to a difference in thermal expansion coefficient between the semiconductor element 3 and the semiconductor element 3.

  Further, since the heat sink 12 is provided so as to straddle between the first reinforcing member 4 and the semiconductor element 3, heat from the semiconductor element 3 is efficiently transferred to the first reinforcing member 4 via the heat sink 12. In addition to being able to escape through the first reinforcing member, heat can be dissipated from the heat sink 12, and the heat dissipation is excellent. That is, the heat from the semiconductor element 3 is not only dissipated from the heat sink 12, but is also released to the outside through the heat sink 12, the first reinforcing member 4, the heat transfer post 24, the second reinforcing member 5, and the heat transfer bump 91. Thus, the heat dissipation of the semiconductor package 1 can be improved.

  Moreover, since the thickness of the wiring board 2 can be reduced, the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation.

  Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured, for example, in the same manner as the first semiconductor package.

  However, next, as shown in FIG. 20 (g), the point of installing the heat sink 12 is different from the manufacturing method of the first semiconductor package. In this way, the semiconductor package 1 is obtained.

(Semiconductor device)
Next, a method for manufacturing a semiconductor device and a semiconductor device will be described based on preferred embodiments.

FIG. 21 is a cross-sectional view schematically showing a semiconductor device according to an embodiment of the present invention.
As shown in FIG. 21, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  Further, the heat transfer bumps 91 of the semiconductor package 1 are joined to the heat radiation terminals (not shown) of the mother board 200. The heat of the semiconductor package 1 can be efficiently released to the mother board 200 through this joint. When such a heat transfer bump 91 is made of the same material as that of the metal bump 71 described above, the heat transfer bump 91 can be bonded to the mother board 200 at the same time as the metal bump 71 is bonded.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Second Embodiment
FIG. 22 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the fourth semiconductor package of the present invention. In the following description, for convenience of explanation, the upper side in FIG. 22 is referred to as “upper” and the lower side is referred to as “lower”.

  Hereinafter, the second embodiment will be described with a focus on the differences from the first embodiment described above, and the description of the same matters will be omitted.

  As shown in FIG. 22, in the semiconductor package 1 of the second embodiment, the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with the heat conductive material 6 having higher heat conductivity than the substrate 21. ing. Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4 through the heat conductive material 6. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Moreover, although the heat conductive material 6 is filled in all or part of the gap between the first reinforcing member 4 and the semiconductor element 3, in the present embodiment, the heat conductive material 6 is the first reinforcing member. The entire gap between 4 and the semiconductor element 3 is filled. Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

Examples of the heat conductive material 6 used here include the heat conductive materials described above, for example, the heat conductive materials described in the first and third semiconductor packages. Furthermore, the above inorganic filler can of course be used.
In addition, the heat conductive material 6 may be the same as the adhesive layer 32 (underfill material) described above, and the heat conductive material 6 and the adhesive layer 32 may be formed in a lump. .

According to this semiconductor package 1, the same effects as those of the first embodiment described above can be obtained.
The second embodiment can also be applied to the semiconductor device described above and a third embodiment described later.

<Third Embodiment>
FIG. 23 is a cross-sectional view schematically showing a semiconductor package according to the third embodiment of the fourth semiconductor package of the present invention. In the following description, for convenience of explanation, the upper side in FIG. 23 is referred to as “upper” and the lower side is referred to as “lower”.

  Hereinafter, the third embodiment will be described with a focus on differences from the first embodiment described above, and descriptions of the same matters will be omitted.

  As shown in FIG. 23, the semiconductor package 1 according to the third embodiment has a heat sink 13 formed of a net-like braided body as the first heat conducting unit. Since the heat sink 13 has a net shape, it can partially contact the first reinforcing member 4 and the semiconductor element 3 and can expand and contract. Thereby, it is possible to relieve stress when predetermined portions such as the wiring substrate 2 and the semiconductor element 3 of the semiconductor package 1 are thermally expanded.

According to this semiconductor package 1, the same effects as those of the first embodiment described above can be obtained.
The third embodiment can also be applied to the semiconductor device described above.

  Next, preferred embodiments of the fifth semiconductor package and the semiconductor device of the present invention will be described.

<First Embodiment>
(Semiconductor package)
First, the semiconductor package of the present invention will be described.

  24 is a cross-sectional view schematically showing a semiconductor package according to an embodiment of the present invention, FIG. 2 is a top view showing the semiconductor package shown in FIG. 24, and FIG. 3 is a bottom view showing the semiconductor package shown in FIG. FIG. 25 is a diagram showing an example of a manufacturing method of the semiconductor package shown in FIG. In the following description, for convenience of explanation, the upper side in FIG. 24 is referred to as “upper” and the lower side is referred to as “lower”. 24 to 28, each part of the semiconductor package is exaggerated for convenience of explanation.

  As shown in FIG. 24, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member (reinforcing member) 4, and a second reinforcing member (reinforcing member). And 5.

  According to the fifth semiconductor package 1 as described above, the wiring substrate 2 is reinforced by the first reinforcing member 4 even in a portion other than the portion joined to the semiconductor element 3, so that the rigidity of the entire semiconductor package 1 is increased. In particular, since the thermal expansion coefficient of the first reinforcing member 4 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. The warpage of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  Further, since the wiring board 2 is reinforced in this manner, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced. The thermal conductivity of can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  Combined with such excellent heat dissipation of the semiconductor package 1, it is possible to effectively suppress or prevent the warpage of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3. As a result, the electrical connection reliability of the semiconductor package 1 can be improved.

  Also, in the semiconductor package 1, the wiring board 2 is sandwiched between the semiconductor element 3 and the second reinforcing member 5 by bonding the second reinforcing member 5 to the surface (lower surface) opposite to the semiconductor element 3 of the wiring board 2. Therefore, the wiring board 2 can be reinforced more strongly, and the difference in thermal expansion between both surfaces of the wiring board 2 can be suppressed. In particular, since the second reinforcing member is provided so as to extend between the metal bumps 71 described later, the wiring board 2 can be strongly reinforced.

  Further, in the semiconductor package 1, since the thickness of the first reinforcing member 4 is equal to or less than the thickness of the semiconductor element 3, the first reinforcing member 4 is formed on the wiring substrate 2 when the semiconductor package 1 is manufactured. When the semiconductor element 3 is installed in a bonded state, the workability of installation (mounting operation) of the semiconductor element 3 is excellent.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
As the wiring board in the present embodiment, the same wiring board as used in the first semiconductor package can be used.

[Semiconductor element]
As the semiconductor element in the present embodiment, the same semiconductor element as that used in the first semiconductor package can be used.
The semiconductor element 3 in the present embodiment has a plate shape, and the average thickness is not particularly limited, but is about 50 μm or more and 1000 μm or less.

[First reinforcing member]
The first reinforcing member (stiffener) 4 is bonded to a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above where the semiconductor element 3 is not bonded.

  This 1st reinforcement member 4 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 1st reinforcement member 4 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

  The first reinforcing member 4 has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed.

  Moreover, the 1st reinforcement member 4 has comprised plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  In particular, the surface (that is, the upper surface) opposite to the substrate 21 of the first reinforcing member 4 is positioned on the substrate 21 side (that is, lower side) than the surface (that is, upper surface) opposite to the substrate 21 of the semiconductor element 3. Yes. Thereby, when manufacturing the semiconductor package 1, when installing the semiconductor element 3 in the state which joined the 1st reinforcement member 4 on the wiring board 2, the workability | operativity of the installation (mounting operation | work) of the semiconductor element 3 is excellent. It will be.

  Further, the thickness of the first reinforcing member 4 is equal to or less than the thickness of the semiconductor element 3. Specifically, the thickness of the first reinforcing member 4 is thinner than the thickness of the semiconductor element 3 described above. Thereby, the positional relationship between the upper surface of the first reinforcing member 4 and the upper surface of the semiconductor element 3 as described above can be realized relatively easily. The first reinforcing member 4 may be thicker than the semiconductor element 3 as long as the positional relationship between the upper surface of the first reinforcing member 4 and the upper surface of the semiconductor element 3 can be realized.

Further, when T1 is the thickness of the semiconductor element 3 and T2 is the thickness of the first reinforcing member 4A, T2 / T1 is preferably 0.02 or more and 1.2 or less, and 0.1 or more and 1 The following is more preferable. When the semiconductor element 3 is installed with the first reinforcing member 4 bonded to the wiring board 2 when the semiconductor package 1 is manufactured, the workability of the installation (mounting operation) of the semiconductor element 3 is excellent. Become. In addition, a reinforcing function necessary for the first reinforcing member 4 can be ensured.
The first reinforcing member 4 and the semiconductor element 3 may be molded with a sealing resin.

  The 1st reinforcement member 4 in this embodiment can be similarly provided using the material similar to the 1st reinforcement member in a 1st semiconductor package except said point.

  In addition, from the viewpoint of heat dissipation, the surface of the first reinforcing member 4 may be roughened. If the surface of the first reinforcing member 4 is roughened, the surface area increases and the efficiency of heat dissipation increases. The method for roughening the surface of the first reinforcing member 4 is not particularly limited, and can be performed by, for example, chemical chemical treatment, mechanical sandblast treatment, or the like.

  The magnitude of the surface roughness of the first reinforcing member 4 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the wiring board 2, the shape and size of the first reinforcing member 4, and the like. Although there is no particular limitation, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  Moreover, the copper membrane | film | coat may be formed in the 1st reinforcement member 4 surface from a viewpoint of the adhesive improvement with a resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the thermal conductive material 6 described later. Things can be used.

The second reinforcing member 5 can be the same as the second reinforcing member in the first semiconductor package, but in the present embodiment, the second reinforcing member 5 is made of an Fe—Ni alloy.
As the Fe—Ni alloy, the same material as the first reinforcing member 4 described above can be used.

  Further, the Fe—Ni based alloy constituting the second reinforcing member 5 may be different from the Fe—Ni based alloy constituting the first reinforcing member 4, but the Fe—Ni based alloy constituting the first reinforcing member 4. Preferably it is the same as the alloy. Thereby, the thermal expansion difference of both surfaces of the wiring board 2 can be prevented or suppressed.

  In addition, from the viewpoint of heat dissipation, the surface of the second reinforcing member 5 may be roughened. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The method for roughening the surface of the second reinforcing member 5 is not particularly limited, and can be performed by, for example, chemical chemical treatment, mechanical sandblast treatment, or the like.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the wiring board 2, the shape and size of the second reinforcing member 5, and the like. Although there is no particular limitation, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  Moreover, the copper film may be formed in the 2nd reinforcement member 5 surface from a viewpoint of adhesiveness improvement with a resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the second reinforcing member 5. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured as follows, for example.

  Thereafter, as shown in FIG. 25, it can be manufactured in the same manner as the first semiconductor package 1.

Second Embodiment
Next, a second embodiment of the present invention will be described.

  FIG. 26 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the present invention. In the following description, for convenience of description, the upper side in FIG. 26 is referred to as “upper” and the lower side is referred to as “lower”. In FIG. 26, for convenience of explanation, each part of the semiconductor package is exaggerated.

  Hereinafter, the semiconductor package of the second embodiment will be described with a focus on differences from the above-described embodiments, and description of similar matters will be omitted. In FIG. 26, the same reference numerals are assigned to the same configurations as those in the above-described embodiment.

  The semiconductor package of the second embodiment is substantially the same as that of the first embodiment except that the configuration of the reinforcing member (first reinforcing member) is different.

  As shown in FIG. 26, in the semiconductor package 1 </ b> A, the first reinforcing member 4 </ b> A is bonded to a portion of the upper surface of the wiring board 2 where the semiconductor element 3 is not bonded.

  The first reinforcing member 4A is formed such that its inner peripheral surface 41A expands from the lower side toward the upper side. That is, the inner side surface (inner peripheral surface 41A) of the first reinforcing member 4A is inclined so that the width of the gap with the side surface of the semiconductor element 3 gradually decreases toward the substrate 21 side (lower side). . Thereby, when manufacturing the semiconductor package 1, when installing the semiconductor element 3 in a state where the first reinforcing member 4A is bonded to the wiring board 2, the inner peripheral surface 41A (inclined surface) of the first reinforcing member 4A is It functions as a guide surface that guides the semiconductor element 3 to a desired position, and the workability of installation (mounting work) of the semiconductor element 3 can be improved.

  Further, the upper surface of the first reinforcing member 4 </ b> A is located on the substrate 21 side (that is, the lower side) with respect to the upper surface of the semiconductor element 3. In the present embodiment, the thickness of the first reinforcing member 4 </ b> A is thinner than the thickness of the semiconductor element 3. If the positional relationship between the upper surface of the first reinforcing member 4A and the upper surface of the semiconductor element 3 as described above can be realized, the thickness of the first reinforcing member 4 is larger than the thickness of the semiconductor element 3 described above. Also good.

  In the present embodiment, the inner peripheral surface (inner side surface) 41A of the first reinforcing member 4A is a flat surface, but it may be a curved surface having a convex inner side.

  Also with the semiconductor package 1A of the second embodiment as described above, it is possible to improve the workability at the time of manufacture and to prevent the occurrence of defects due to the heat of the semiconductor element.

<Third Embodiment>
Next, a third embodiment of the present invention will be described.

  FIG. 27 is a cross-sectional view schematically showing a semiconductor package according to the third embodiment of the present invention. In the following description, for convenience of explanation, the upper side in FIG. 27 is referred to as “upper” and the lower side is referred to as “lower”. In FIG. 27, for convenience of explanation, each part of the semiconductor package is exaggerated.

  Hereinafter, the semiconductor package of the third embodiment will be described focusing on the differences from the above-described embodiment, and the description of the same matters will be omitted. In FIG. 27, the same components as those in the above-described embodiment are denoted by the same reference numerals.

  The semiconductor package of the third embodiment is substantially the same as the first embodiment except that the configuration of the reinforcing member (first reinforcing member) is different.

  As shown in FIG. 27, in the semiconductor package 1 </ b> B, the first reinforcing member 4 </ b> B is bonded to a portion of the upper surface of the wiring substrate 2 where the semiconductor element 3 is not bonded.

  The thickness of the first reinforcing member 4B is gradually reduced from the outside toward the inside. In the present embodiment, the thickness of the first reinforcing member 4B continuously changes from the outside toward the inside. Thus, by making the inner thickness of the first reinforcing member 4B thinner than the outer thickness, the necessary strength of the first reinforcing member 4B is ensured, and the wiring board is manufactured when the semiconductor package 1 is manufactured. When the semiconductor element 3 is installed in a state where the first reinforcing member 4 </ b> B is bonded onto the substrate 2, workability of installation (mounting operation) of the semiconductor element 3 can be improved.

  In addition, the upper surface (uppermost portion) of the first reinforcing member 4 </ b> B is located closer to the substrate 21 (that is, lower) than the upper surface of the semiconductor element 3. In the present embodiment, the thickness (maximum thickness) of the first reinforcing member 4 </ b> B is thinner than the thickness of the semiconductor element 3. If the positional relationship between the upper surface of the first reinforcing member 4B and the upper surface of the semiconductor element 3 as described above can be realized, the thickness (maximum thickness) of the first reinforcing member 4B is set to the semiconductor element 3 described above. It may be thicker than.

  In the present embodiment, the upper surface (surface opposite to the wiring board 2) of the first reinforcing member 4B is a flat surface, but is a curved surface having a convex upper side (opposite side to the wiring board 2). Also good.

Even with the semiconductor package 1B of the third embodiment as described above, it is possible to improve the workability at the time of manufacture and to prevent the occurrence of defects due to the heat of the semiconductor element.
(Semiconductor device)
Next, a method for manufacturing a semiconductor device and a semiconductor device will be described based on preferred embodiments.

FIG. 28 is a cross-sectional view schematically showing an example of an embodiment of a semiconductor device of the present invention.
As shown in FIG. 28, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  Further, the heat transfer bumps 91 of the semiconductor package 1 are joined to the heat radiation terminals (not shown) of the mother board 200. The heat of the semiconductor package 1 can be efficiently released to the mother board 200 through this joint. When such a heat transfer bump 91 is made of the same material as that of the metal bump 71 described above, the heat transfer bump 91 can be bonded to the mother board 200 at the same time as the metal bump 71 is bonded.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Next, a sixth semiconductor package of the present invention will be described.

  The sixth semiconductor package of the present invention pays particular attention to the first reinforcing member and the second reinforcing member, and has the same configuration as that of the first semiconductor package unless otherwise specified.

  In this specification, unless otherwise specified, the thermal expansion coefficient refers to a thermal expansion coefficient of 30 ° C. to 300 ° C. in a direction (plane direction) parallel to the plate surface of the wiring board 2.

  The first reinforcing member 4 in this embodiment has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed. Then, similarly to the case where the semiconductor element 3 is provided over the entire surface of the wiring board 2, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is suppressed or prevented. Can do.

  In particular, the first reinforcing member 4 has a different thermal expansion coefficient from that of the second reinforcing member 5. Thereby, due to the force acting on the wiring substrate 2 due to the difference in thermal expansion coefficient between the first reinforcing member 4 and the second reinforcing member 5, due to the difference in thermal expansion coefficient between the wiring substrate 2 and the semiconductor element 3. The force acting on the wiring board 2 can be offset or relaxed. Therefore, it is possible to suppress or prevent warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3. The relationship between the thermal expansion coefficient of the first reinforcing member 4 and the thermal expansion coefficient of the second reinforcing member 5 will be described in detail later together with the description of the thermal expansion coefficient of the second reinforcing member 5.

As the 1st reinforcement member 4 in this embodiment, the thing similar to the 1st reinforcement member in the said 1st semiconductor package can be used.
In addition, from the viewpoint of heat dissipation, the surface of the first reinforcing member 4 may be roughened. If the surface of the first reinforcing member 4 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 1st reinforcement member 4 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the first reinforcing member 4 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the first reinforcing member 4, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the first reinforcing member 4 from the viewpoint of improving adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[Second reinforcing member]
The second reinforcing member 5 has a thermal expansion coefficient smaller than that of the substrate 21, similarly to the first reinforcing member 4 described above.

  In particular, the second reinforcing member 5 in the present embodiment has a different thermal expansion coefficient from that of the first reinforcing member 4 described above. As described above, the coefficient of thermal expansion of the first reinforcing member 4 and the coefficient of thermal expansion of the second reinforcing member 5 are different from each other, resulting in a difference in thermal expansion coefficient between the first reinforcing member 4 and the second reinforcing member 5. A force (first force) acting in the direction of warping the wiring board 2 can be generated. Such a force (first force) is generated in a direction opposite to the force (second force) acting in the direction of warping the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3. These forces can be offset or alleviated. Therefore, it is possible to suppress or prevent warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.

  The difference between the coefficient of thermal expansion of the first reinforcing member 4 and the coefficient of thermal expansion of the second reinforcing member 5 prevents or suppresses the warp associated with the thermal expansion or thermal contraction of the substrate 21 (or the wiring substrate 2). Is set to

  More specifically, the thermal expansion coefficient of the second reinforcing member 5 is different from the thermal expansion coefficient of the first reinforcing member 4 and can prevent or suppress the warpage associated with the thermal expansion or thermal contraction of the wiring board 2. Although it should just be and it does not specifically limit, It is preferable that it is smaller than the thermal expansion coefficient of the 1st reinforcement member 4. FIG.

  Usually, the thermal expansion coefficient of the wiring board 2 is larger than the thermal expansion coefficient of the semiconductor element 3. Therefore, the wiring board 2 tends to thermally expand more than the semiconductor element 3, and a force (second force) in a direction in which the outer peripheral portion of the wiring board 2 is displaced toward the semiconductor element 3 is generated. On the other hand, when the thermal expansion coefficient of the second reinforcing member 5 is made smaller than the thermal expansion coefficient of the first reinforcing member 4 (that is, the thermal expansion coefficient of the first reinforcing member 4 is made larger than the thermal expansion coefficient of the second reinforcing member 5). Then, the first reinforcing member 4 tries to thermally expand larger than the second reinforcing member 5, and the force in the direction in which the outer peripheral portion of the wiring board 2 is displaced to the side opposite to the semiconductor element 3 (the direction opposite to the second direction). Of the first force). Therefore, these two forces (first force and second force) can be canceled out. As a result, warpage due to thermal expansion of the wiring board 2 can be prevented or suppressed.

As the 2nd reinforcement member 5 of this embodiment, the thing similar to the 2nd reinforcement member in the said 1st semiconductor package can be used.
The constituent material of the second reinforcing member 5 is not particularly limited, but the same constituent material as that of the first reinforcing member 4 described above can be used.

  However, the constituent material of the second reinforcing member 5 is preferably different from the constituent material of the first reinforcing member 4. Thereby, the thermal expansion coefficient difference of the 1st reinforcement member 4 and the 2nd reinforcement member 5 which were mentioned above can be set easily.

  The average thickness of the second reinforcing member 5 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and is not specifically limited, For example, it is about 0.02 mm or more and 0.8 mm or less.

  Further, the surface of the second reinforcing member 5 may be roughened from the viewpoint of heat dissipation. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 2nd reinforcement member 5 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the second reinforcing member 5, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the second reinforcing member 5 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately selected according to the shape and size of the reinforcing member, the type of the resin material, etc. Can be implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

According to the semiconductor package 1 configured as described above, the wiring board 2 and the semiconductor are caused by the force acting on the wiring board 2 due to the difference in thermal expansion coefficient between the first reinforcing member 4 and the second reinforcing member 5. The force acting on the wiring board 2 due to the difference in thermal expansion coefficient with the element 3 can be offset or alleviated. Therefore, it is possible to suppress or prevent warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.
According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

  Hereinafter, preferred embodiments of a seventh semiconductor package and a semiconductor device of the present invention will be described with reference to the accompanying drawings.

<First Embodiment>
(Semiconductor package)
First, the semiconductor package of this embodiment will be described.

  29 is a cross-sectional view schematically showing a semiconductor package according to an embodiment of the present invention, FIG. 2 is a top view showing the semiconductor package shown in FIG. 29, and FIG. 3 is a bottom view showing the semiconductor package shown in FIG. FIG. 4 is a diagram showing an example of a method for manufacturing the semiconductor package shown in FIG. In the following description, for convenience of explanation, the upper side in FIG. 29 is referred to as “upper” and the lower side is referred to as “lower”. In each figure, each part of the semiconductor package is exaggerated for convenience of explanation.

  As shown in FIG. 29, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member 4, a second reinforcing member 5, and a heat conductive material 6. And have. The average thickness (thickness) of the first reinforcing member 4 and the average thickness of the second reinforcing member 5 are different.

  According to the seventh semiconductor package 1 as described above, since both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3, the semiconductor The rigidity of the entire package 1 is increased. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. In the same manner, warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented. Then, by making the average thickness of the first reinforcing member 4 and the average thickness of the second reinforcing member 5 different from each other, the influence of thermal expansion exerted on the wiring board 2 by the first reinforcing member 4 and the second reinforcing member 5 becomes the wiring board. By causing a difference in the effect of thermal expansion on 2, it is possible to further suppress or prevent warping of the wiring board 2 due to a difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.

  Further, by providing the first reinforcing member 4 and the second reinforcing member 5, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced. Thermal conductivity in the direction can be increased. Therefore, the seventh semiconductor package 1 can release heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
In the present embodiment, for example, a wiring board that can use the first semiconductor package can be used.

[Semiconductor element]
In the present embodiment, for example, a semiconductor element that can use the first semiconductor package can be used.

[First reinforcing member]
In the present embodiment, for example, a first reinforcing member that can use the first semiconductor package can be used.
In the present embodiment, the surface of the first reinforcing member 4 opposite to the substrate 21 (that is, the upper surface) is closer to the substrate 21 side (that is, the lower side) than the surface of the semiconductor element 3 opposite to the substrate 21 (that is, the upper surface). ).

  The average thickness (thickness) of the first reinforcing member 4 (the length of the first reinforcing member 4 in the thickness direction of the substrate 21) is preferably equal to or less than the average thickness of the semiconductor element 3. . In the present embodiment, the average thickness of the first reinforcing member 4 is thinner than the average thickness of the semiconductor element 3. Thereby, the positional relationship between the upper surface of the first reinforcing member 4 and the upper surface of the semiconductor element 3 as described above can be realized relatively easily. Needless to say, the average thickness of the first reinforcing member 4 may be larger than the average thickness of the semiconductor element 3.

Further, when the average thickness of the semiconductor element 3 is t3 and the thickness t1 of the first reinforcing member 4 is set, t1 / t3 is preferably 0.02 to 1.2, and 0.1 to 1 It is more preferable that Thereby, when manufacturing the semiconductor package 1, when installing the semiconductor element 3 in the state which joined the 1st reinforcement member 4 on the wiring board 2, the workability | operativity of the installation (mounting operation | work) of the semiconductor element 3 is excellent. It will be. In addition, a reinforcing function necessary for the first reinforcing member 4 can be ensured.
The first reinforcing member 4 and the semiconductor element 3 may be molded with a sealing resin.

  The first reinforcing member 4 is provided so as to surround the periphery of the semiconductor element 3. In the present embodiment, the first reinforcing member 4 has an annular shape (more specifically, a rectangular annular shape) so as to surround the semiconductor element 3. That is, the 1st reinforcement member 4 has comprised the frame shape unevenly distributed around. Thereby, the effect which raises the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent.

  The first reinforcing member 4 is provided so as to be separated from the semiconductor element 3 over the entire circumference of the semiconductor element 3. That is, the semiconductor package 1 has a gap between the first reinforcing member 4 and the semiconductor element 3 over the entire circumference of the semiconductor element 3, and the gap is filled with a heat conductive material 6 described later. .

  Further, the first reinforcing member 4 is a distance from the semiconductor element 3 (a distance between the inner peripheral surface 41 of the first reinforcing member 4 and the outer peripheral surface 33 of the semiconductor element 3), that is, the first reinforcing member 4. The width of the gap between the semiconductor element 3 and the semiconductor element 3 is constant over the entire circumference of the semiconductor element 3. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably. In addition, heat transfer from the semiconductor element 3 to the first reinforcing member via the heat conductive material 6 can be generated efficiently and uniformly.

  Moreover, the distance between the 1st reinforcement member 4 and the semiconductor element 3 is although it does not specifically limit, It is preferable that it is about 0.1-5 mm, and it is more preferable that it is about 0.1-2 mm. Thereby, the reinforcement effect of the wiring board 2 is exhibited suitably.

  The distance between the first reinforcing member 4 and the semiconductor element 3 may not be constant, and the first reinforcing member 4 and the semiconductor element 3 may be in contact with each other.

  The first reinforcing member 4 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the semiconductor element 3 and the 1st reinforcement member 4 can reinforce the wiring board 2 integrally, and can suppress the thermal expansion of the semiconductor package 1 whole.

Moreover, as a constituent material of the 1st reinforcement member 4, the material similar to the 1st reinforcement member of the said 1st semiconductor package can be used, for example.
The average thickness of the first reinforcing member 4 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5, Although it will not specifically limit if it differs from the average thickness of the 2nd reinforcement member 5, For example, it is about 0.02 mm or more and 0.8 mm or less. The average thickness of the first reinforcing member 4 will be described in detail later together with the average thickness of the second reinforcing member 5.

  Moreover, the surface of the 1st reinforcement member 4 may be roughened from a heat-dissipating viewpoint. If the surface of the first reinforcing member 4 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 1st reinforcement member 4 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the first reinforcing member 4 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the first reinforcing member 4, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the first reinforcing member 4 from the viewpoint of improving adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately performed according to the shape, size, type of the resin material, and the like of the first reinforcing member 4. Can be selected and implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  The average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the first reinforcing member 4 and capable of surface treatment for improving adhesion.

[Thermal conductive material]
In the present embodiment, as shown in FIGS. 29 and 2, the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with the thermal conductive material 6 having higher thermal conductivity than the substrate 21. ing. Thereby, heat can be efficiently transferred from the semiconductor element 3 to the first reinforcing member 4 through the heat conductive material 6. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Moreover, although the heat conductive material 6 is filled in all or part of the gap between the first reinforcing member 4 and the semiconductor element 3, in the present embodiment, the heat conductive material 6 is the first reinforcing member. The entire gap between 4 and the semiconductor element 3 is filled. Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The thermal conductivity of the heat conductive material 6 is preferably about 0.5 to 100 W / (m · K), and more preferably about 1 to 50 W / (m · K). Thereby, the heat from the semiconductor element 3 can be more efficiently transmitted to the first reinforcing member 4 through the heat conductive material 6.

  The heat conductive material 6 is not particularly limited, and examples thereof include a resin composition that includes an inorganic filler and a resin material (a resin material and an inorganic filler blended in the resin material).

  Moreover, as the heat conductive material 6, although what has electroconductivity and what has insulation can be used, the thing which has insulation is preferable. Thereby, the unintentional short circuit through the heat conductive material 6 can be prevented.

  As the inorganic filler (inorganic filler) used for the heat conductive material 6 (resin composition), the same one used in the first semiconductor package can be used.

Further, as the resin material used for the heat conductive material 6 (resin composition), the same material as that used in the first semiconductor package can be used.
Needless to say, the heat conductive material 6 may be omitted.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used. However, an adhesive excellent in thermal conductivity is preferable, and is the same as the above-described thermal conductive material 6. Things can be used.

  The second reinforcing member 5 has a smaller coefficient of thermal expansion than the substrate 21, similar to the first reinforcing member 4 described above. In addition, as the second reinforcing member in the present embodiment, the second reinforcing member of the first semiconductor package can be used.

  Moreover, it does not specifically limit as a constituent material of the 2nd reinforcement member 5, The thing similar to the constituent material of the 1st reinforcement member 4 mentioned above can be used, For example, using a metal material, a ceramic material, etc. Although it is possible, it is preferable to use a metal material. When the 2nd reinforcement member 5 is comprised with the metal material, the heat dissipation of the 2nd reinforcement member 5 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved. In addition, although the constituent material of the 2nd reinforcement member 5 and the constituent material of the 1st reinforcement member 4 may be the same, and may differ, in this embodiment, it is made the same and is the average of the 2nd reinforcement member 5. By making the thickness different from the average thickness of the first reinforcing member 4, warpage of the wiring board 2 due to a difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is suppressed or prevented.

  The average thickness of the second reinforcing member 5 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5, Although it will not specifically limit if it differs from the average thickness of the 1st reinforcement member 4, For example, it is about 0.02 mm or more and 0.8 mm or less.

  Here, in this embodiment, the average thickness of the semiconductor element 3 is set to be relatively thick. In this case, when the average thickness of the semiconductor element 3 is t3 and the average thickness of the substrate 21 is t4, t3 / t4 is preferably 0.5 or more, and more preferably 0.75 or more. More preferably, it is 0.75 or more and 2.5 or less.

  The average thickness of the second reinforcing member 5 is set to be thicker than the average thickness of the first reinforcing member 4. Thereby, the curvature of the wiring board 2 resulting from the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented. The reason is as follows.

  First, the semiconductor element 3 is provided on the upper surface of the wiring substrate 2, the first reinforcing member 4 has a frame shape unevenly distributed around the periphery, and the second reinforcing member 5 has a substantially uniform shape. Therefore, if the average thickness of the first reinforcing member 4 and the average thickness of the second reinforcing member 5 are the same, the wiring board 2 warps due to thermal expansion. For this reason, by making the average thickness of the 1st reinforcement member 4 and the average thickness of the 2nd reinforcement member 5 differ, fine adjustment is performed and the curvature of the wiring board 2 resulting from a thermal expansion is prevented.

  Further, on the upper surface of the wiring board 2, the semiconductor element 3 and the first reinforcing member 4 having a small thermal expansion coefficient are installed over almost the entire surface. On the contrary, the second reinforcing member 5 installed on the lower surface of the wiring board 2 has openings 51 for forming metal bumps 71 for connection to a mother board 200 (see FIG. 30) described later. Therefore, when the number is large and the average thickness of the second reinforcing member 5 is thin, it is possible that the suppression or prevention of warping due to the difference in thermal expansion coefficient between the semiconductor element 3 and the wiring board 2 cannot be sufficiently achieved. There is sex. Therefore, it is necessary to set the average thickness of the second reinforcing member to be larger than the average thickness of the first reinforcing member 4 in order to make the reinforcing effect and the warp suppressing effect sufficient.

  Further, the average thickness of the first reinforcing member 4 cannot be made too thick due to the relationship with the average thickness of the semiconductor element 3. On the other hand, since the average thickness of the semiconductor element 3 is relatively large, it is necessary to correspondingly increase the average thickness of the second reinforcing member 5. Thereby, the average thickness of the second reinforcing member 5 is set to be thicker than the average thickness of the first reinforcing member 4.

  Further, when the average thickness of the first reinforcing member is t1, and the average thickness of the second reinforcing member is t2, t1 / t2 is preferably 0.02 to 0.98, and preferably 0.2 to 0. .8 is more preferable.

  Thereby, the curvature of the wiring board 2 resulting from the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  When the area when viewed from the top and bottom direction of the first reinforcing member is S1, and when the area when viewed from the top and bottom direction of the second reinforcing member is S2, S1 / S2 is: It is preferably 0.1 to 2, and more preferably 0.3 to 1.5. Thereby, compared with the past, warpage at room temperature and heat is small and excellent in reliability tests such as a temperature cycle test.

  Further, the surface of the second reinforcing member 5 may be roughened from the viewpoint of heat dissipation. If the surface of the second reinforcing member 5 is roughened, the surface area increases and the efficiency of heat dissipation increases. The roughening method of the surface of the 2nd reinforcement member 5 is not specifically limited, For example, it can implement by a chemical chemical | medical solution process, a mechanical sandblast process, etc.

  The magnitude of the surface roughness of the second reinforcing member 5 is determined according to the amount of heat generated by the semiconductor element 3, the configuration of the resin material, the configuration of the substrate 21, the shape and size of the second reinforcing member 5, and the like. Although not particularly limited, for example, the surface roughness expressed by arithmetic mean is about 0.1 μm or more and 100 μm or less. The surface roughness represented by the arithmetic average can be measured according to, for example, JIS B 0601.

  In addition, a copper film may be formed on the surface of the second reinforcing member 5 from the viewpoint of improving the adhesion with the resin material. For copper, since many surface treatment techniques for improving the adhesion strength with the resin material are known, the surface treatment is appropriately selected according to the shape and size of the reinforcing member, the type of the resin material, etc. Can be implemented.

  Although the formation method of a copper membrane is not specifically limited, For example, it can implement by plating processing, such as electrolytic plating and electroless plating, sputtering processing.

  In addition, the average thickness of the copper film is preferably as thin as possible without affecting the thermal expansion coefficient of the second reinforcing member 5 and capable of surface treatment for improving adhesion.

  According to the seventh semiconductor package 1 configured as described above, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 in portions other than the portion joined to the semiconductor element 3. Therefore, the rigidity of the entire semiconductor package 1 is increased. In particular, since the coefficient of thermal expansion of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2, the semiconductor device 3 is provided over the entire surface of the wiring substrate 2 in the same manner as the wiring substrate 2. It is possible to suppress or prevent warping of the wiring board 2 due to a difference in thermal expansion coefficient between the semiconductor element 3 and the semiconductor element 3. Then, by making the average thickness of the first reinforcing member 4 and the average thickness of the second reinforcing member 5 different from each other, the influence of thermal expansion exerted on the wiring board 2 by the first reinforcing member 4 and the second reinforcing member 5 becomes the wiring board. By causing a difference in the effect of thermal expansion on 2, it is possible to further suppress or prevent warping of the wiring board 2 due to a difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.

  In addition, since the gap between the first reinforcing member 4 and the semiconductor element 3 is filled with the heat conductive material 6 having higher heat conductivity than the substrate 21, the heat from the semiconductor element 3 is transferred to the heat conductive material. It can transmit efficiently to the 1st reinforcement member 4 via 6, can escape via the 1st reinforcement member, and is excellent in heat dissipation. That is, the heat from the semiconductor element 3 is released to the outside through the heat conductive material 6, the first reinforcing member 4, the heat transfer post 24, the second reinforcing member 5, and the heat transfer bump 91, thereby the semiconductor package. The heat dissipation of 1 can be improved.

  Moreover, since the thickness of the wiring board 2 can be reduced, the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation.

  Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured, for example, in the same manner as the first semiconductor package.

(Semiconductor device)
Next, a method for manufacturing a semiconductor device and a semiconductor device will be described based on preferred embodiments.

FIG. 30 is a cross-sectional view schematically showing a semiconductor device according to an embodiment of the present invention.
As shown in FIG. 30, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  Further, the heat transfer bumps 91 of the semiconductor package 1 are joined to the heat radiation terminals (not shown) of the mother board 200. The heat of the semiconductor package 1 can be efficiently released to the mother board 200 through this joint. When such a heat transfer bump 91 is made of the same material as that of the metal bump 71 described above, the heat transfer bump 91 can be bonded to the mother board 200 at the same time as the metal bump 71 is bonded.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Second Embodiment
FIG. 31 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the present invention. In the following description, for convenience of explanation, the upper side in FIG. 31 is referred to as “upper” and the lower side is referred to as “lower”. In FIG. 31, for convenience of explanation, each part of the semiconductor package is exaggerated.

  Hereinafter, the second embodiment will be described with a focus on the differences from the first embodiment described above, and the description of the same matters will be omitted.

  As shown in FIG. 31, in the semiconductor package 1 of the second embodiment, the surface of the first reinforcing member 4 opposite to the substrate 21 and the surface of the semiconductor element 3 opposite to the substrate 21 are located on the same surface. doing.

  In this embodiment, the average thickness of the semiconductor element 3 is set to be relatively thin. In this case, when the average thickness of the semiconductor element 3 is t3 and the average thickness of the substrate 21 is t4, t3 / t4 is preferably 0.5 or less, and more preferably 0.4 or less. More preferably, it is 0.1 or more and 0.4 or less.

  The average thickness of the first reinforcing member 4 is set to be thicker than the average thickness of the second reinforcing member 5. Thereby, the curvature of the wiring board 2 resulting from the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented. The reason is as follows.

  First, the average thickness of the first reinforcing member 4 is that the average thickness of the semiconductor element 3 is thin and the rigidity is small. In order to prevent it, it is set relatively thick. On the other hand, since the average thickness of the semiconductor element 3 is relatively thin, the amount of warpage due to the difference in thermal expansion coefficient from the wiring board 2 becomes large. Therefore, it is important to improve the symmetry of the semiconductor package 1 in the thickness direction, and the average thickness of the second reinforcing member 5 needs to be relatively thin. Thereby, the average thickness of the first reinforcing member 4 is set to be thicker than the average thickness of the second reinforcing member 5.

  Further, when the average thickness of the first reinforcing member is t1, and the average thickness of the second reinforcing member is t2, t1 / t2 is preferably 1.1 to 40, and preferably 1.5 to 10. It is more preferable.

Thereby, the curvature of the wiring board 2 resulting from the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.
The second embodiment can also be applied to the semiconductor device described above.

  As mentioned above, although the semiconductor package and semiconductor device of this invention were demonstrated based on embodiment of illustration, this invention is not limited to these.

  Further, in the above-described embodiment, the first reinforcing member 4 is provided so as to surround the semiconductor element 3 over the entire circumference of the semiconductor element 3, but is not limited thereto, and for example, the semiconductor element 3. A missing portion (notch) may be formed in a part of the periphery of the.

  In the above-described embodiment, the heat transfer post 24 penetrating the substrate 21 is used as the heat conductive portion that connects the first reinforcing member 4 and the second reinforcing member 5, but is not limited thereto. A heat conducting member (metal member) provided outside the substrate 21 may be used. In this case, the heat conducting member may be bonded (bonded) to the substrate 21, the first reinforcing member 4, and the second reinforcing member 5 using a heat transfer adhesive, or the substrate 21, the first reinforcing member may be bonded from the side surface side of the substrate 21. The reinforcing member 4 and the second reinforcing member 5 may be held from above and below.

  Moreover, the opening part formed in the 2nd reinforcement member 5 does not need to respond | correspond one-to-one with each metal bump 71. FIG. That is, an opening may be formed in the second reinforcing member 5 so that one corresponds to the plurality of metal bumps 71.

  The present invention can provide a semiconductor package and a semiconductor device that can prevent the occurrence of defects due to heat.

DESCRIPTION OF SYMBOLS 1 Semiconductor package 1A Semiconductor package 2 Wiring board 2A Wiring board 3 Semiconductor element 3A Semiconductor element 4 1st reinforcement member 4A 1st reinforcement member 5 2nd reinforcement member 5A 2nd reinforcement member 6 Thermal conductive material 6A Thermal conductive material 11 Adhesion Agent 12 Adhesive 21 Substrate 24 Heat transfer post 25 Substrate 31 Metal bump 31A Metal bump 32 Adhesive layer 32A Adhesive layer 33 Outer peripheral surface 41 Main body 411 Inner peripheral surface 42 Rib 51 Opening 51A Opening 52 Part 53 Part 71 Metal bump 71A Metal bump 72 Metal bump 81 Insulating material 81A Insulating material 82 Insulating material 82A Insulating material 91 Heat transfer bump 100 Semiconductor device 200 Mother board 211 Insulating layer 211A Prepreg 212 Insulating layer 213 Insulating layer 214 Insulating layer 215 Insulating layer 221 Conductive pattern 221A Metal layer 222 Conductor pattern 223 Conductor pattern 224 conductor pattern 231 conductor post 232 conductor post 233 conductor post 234 conductor post 251 insulation layer 251A insulation layer 252 insulation layer 252A insulation layer 253 insulation layer 253A insulation layer 261 conductor pattern 261A metal layer 262 conductor pattern 262A metal layer 263 conductor pattern 263A Metal layer 264 Conductor pattern 264A Metal layer 271 Conductor post 272 Conductor post 273 Conductor post 281 Heat transfer post 282 Heat transfer post 283 Heat transfer post 291 Insulating layer 292 Insulating layer 2111 Through hole 2511 Through hole 2512 Through hole 2521 Through hole 2522 Through Hole 2531 Through-hole 2532 Through-hole 2912 Opening 2922 Opening

Claims (65)

A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package comprising: a second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate.   The semiconductor package according to claim 1, wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element.   The semiconductor package according to claim 1, wherein each of the first reinforcing member and the second reinforcing member has a plate shape. A plurality of metal bumps are bonded to the surface of the second conductor pattern opposite to the substrate,
4. The semiconductor package according to claim 1, wherein the second reinforcing member has a plurality of openings formed so as to surround the metal bumps without contacting the metal bumps. 5.   5. The semiconductor package according to claim 1, wherein each of the first reinforcing member and the second reinforcing member has a thermal expansion coefficient difference of 7 ppm / ° C. or less with respect to the semiconductor element.   The semiconductor package according to claim 1, wherein each of the first reinforcing member and the second reinforcing member is made of a metal material.   The semiconductor package according to claim 6, wherein the metal material is an Fe—Ni-based alloy. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A part of said 1st reinforcement member is contacting the said semiconductor element, The semiconductor package characterized by the above-mentioned. The first reinforcing member has a main body portion and a convex portion formed so as to protrude from the main body portion toward the semiconductor element,
The semiconductor package according to claim 8, wherein the convex portion is in contact with the semiconductor element.   The semiconductor package according to claim 9, wherein a surface of the convex portion opposite to the substrate is in contact with a surface of the semiconductor element on the substrate side. The first reinforcing member has a plate shape,
The semiconductor package according to claim 9, wherein a surface of the main body portion on the substrate side and a surface of the convex portion on the substrate side are located on the same surface.   The semiconductor package according to claim 9, wherein the main body is provided so as to surround the periphery of the semiconductor element with a gap between the main body and a side end of the semiconductor element.   The semiconductor package according to claim 12, wherein the convex portion is formed on an inner peripheral portion of the main body portion over the entire circumference of the main body portion.   The semiconductor package according to claim 13, wherein the convex portion is in contact with the semiconductor element over the entire circumference of the semiconductor element.   The semiconductor package according to claim 9, wherein the convex portion is in contact with a corner portion of the semiconductor element.   The semiconductor package according to claim 8, wherein the first reinforcing member has a plate shape.   The semiconductor package according to claim 16, wherein a surface of the first reinforcing member opposite to the substrate and a surface of the semiconductor element opposite to the substrate are on the same surface.   The semiconductor package according to claim 8, further comprising a second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package comprising a gap between the first reinforcing member and the semiconductor element, wherein all or a part of the gap is filled with a thermally conductive material having a higher thermal conductivity than the substrate. .   The semiconductor package according to claim 19, wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element. The first reinforcing member surrounds the periphery of the semiconductor element, and is provided so that a gap is formed between the semiconductor element and the entire circumference of the semiconductor element.
The semiconductor package according to claim 19, wherein the thermal conductive material is filled in the entire gap.   The semiconductor package according to any one of claims 19 to 21, wherein the thermal conductivity of the thermally conductive material is 0.5 to 100 W / (m · K).   The semiconductor package according to claim 19, wherein the thermally conductive material has an insulating property.   The semiconductor package according to claim 19, wherein the thermally conductive material is made of a resin composition.   The semiconductor package according to claim 19, wherein the first reinforcing member has a plate shape.   26. The semiconductor package according to claim 25, wherein a surface of the first reinforcing member opposite to the substrate and a surface of the semiconductor element opposite to the substrate are located on the same surface.   27. The semiconductor package according to claim 19, further comprising a second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
The first reinforcing member and the semiconductor element are disposed on a surface opposite to the substrate so as to straddle between the first reinforcing member and the semiconductor element, and have a first thermal conductivity higher than that of the substrate. A semiconductor package comprising a heat conducting portion.   29. The semiconductor package according to claim 28, wherein the first heat conducting unit is a heat sink having a heat dissipation property.   30. The semiconductor package according to claim 28, wherein the first reinforcing member is provided so as to surround a periphery of the semiconductor element.   30. The semiconductor package according to claim 28, wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element with a gap between the first reinforcing member and a side end portion of the semiconductor element.   32. The semiconductor package according to claim 31, wherein the first heat conducting unit has a heat radiating fin at a portion crossing the gap.   The semiconductor package according to any one of claims 28 to 32, wherein the thermal conductivity of the first heat conducting unit is 10 to 1000 W / (m · K).   The semiconductor package according to any one of claims 28 to 33, wherein the first heat conducting portion is made of a metal material.   35. The semiconductor package according to claim 28, wherein a thermal expansion coefficient of the first heat conducting unit is smaller than a thermal expansion coefficient of the substrate.   36. The semiconductor package according to claim 28, wherein the first reinforcing member has a plate shape.   37. The semiconductor package according to claim 36, wherein a surface of the first reinforcing member opposite to the substrate and a surface of the semiconductor element opposite to the substrate are located on the same surface.   38. The semiconductor package according to claim 28, further comprising a second reinforcing member that is bonded to the other surface of the substrate and has a smaller coefficient of thermal expansion than the substrate. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A plate-like semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A plate-like reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
The semiconductor package, wherein the surface of the reinforcing member opposite to the substrate is located on the same surface as the surface of the semiconductor element opposite to the substrate or closer to the substrate. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package, wherein a surface of the first reinforcing member opposite to the substrate is located on the same surface as the surface of the semiconductor element opposite to the substrate or closer to the substrate.   41. The semiconductor package according to claim 40, wherein a thickness of the first reinforcing member is equal to or less than a thickness of the semiconductor element.   42. The semiconductor package according to claim 40 or 41, wherein the first reinforcing member has a frame shape so as to surround the periphery of the semiconductor element.   43. The semiconductor package according to claim 42, wherein an inner side surface of the first reinforcing member is inclined such that a width of a gap between the first reinforcing member and the side surface of the semiconductor element gradually decreases toward the substrate side.   44. The semiconductor package according to claim 42 or 43, wherein the thickness of the first reinforcing member gradually decreases from the outside toward the inside.   45. The semiconductor package according to claim 40, wherein thermal expansion coefficients of the first reinforcing member and the second reinforcing member are 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, respectively.   46. The semiconductor package according to claim 40, wherein each of the first reinforcing member and the second reinforcing member has a thermal expansion coefficient difference of 7 ppm / ° C. or less with respect to the semiconductor element. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package, wherein a thermal expansion coefficient of the first reinforcing member and a thermal expansion coefficient of the second reinforcing member are different from each other.   48. The difference between the thermal expansion coefficient of the first reinforcing member and the thermal expansion coefficient of the second reinforcing member is set to prevent or suppress warpage associated with thermal expansion or contraction of the substrate. The semiconductor package described.   49. The semiconductor package according to claim 47 or 48, wherein a thermal expansion coefficient of the first reinforcing member is larger than a thermal expansion coefficient of the second reinforcing member.   50. The semiconductor package according to claim 47, wherein thermal expansion coefficients of the first reinforcing member and the second reinforcing member are 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, respectively.   51. The semiconductor package according to claim 47, wherein each of the first reinforcing member and the second reinforcing member has a thermal expansion coefficient difference of 7 ppm / ° C. or less with respect to the semiconductor element.   52. The semiconductor package according to claim 47, wherein at least one of the first reinforcing member and the second reinforcing member is made of an Fe-Ni alloy.   53. The semiconductor package according to claim 48, wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element.   54. The semiconductor package according to claim 48, wherein each of the first reinforcing member and the second reinforcing member has a plate shape. A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A wiring board;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A first reinforcing member bonded to a portion of the one surface of the substrate where the semiconductor element is not bonded, and having a smaller coefficient of thermal expansion than the substrate;
A second reinforcing member bonded to the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
The semiconductor package according to claim 1, wherein an average thickness of the first reinforcing member is different from an average thickness of the second reinforcing member.   56. The semiconductor package according to claim 55, wherein an average thickness of the first reinforcing member is thicker than an average thickness of the second reinforcing member.   57. The semiconductor package according to claim 56, wherein t1 / t2 is 1.1 to 40, where t1 is an average thickness of the first reinforcing member and t2 is an average thickness of the second reinforcing member.   56. The semiconductor package according to claim 55, wherein an average thickness of the second reinforcing member is thicker than an average thickness of the first reinforcing member.   59. The semiconductor package according to claim 58, wherein t1 / t2 is 0.02 to 0.98, where t1 is an average thickness of the first reinforcing member and t2 is an average thickness of the second reinforcing member.   59. The semiconductor package according to claim 55, wherein average thicknesses of the first reinforcing member and the second reinforcing member are 0.02 mm or more and 0.8 mm or less, respectively.   61. The semiconductor package according to claim 55, wherein a constituent material of the first reinforcing member and a constituent material of the second reinforcing member are the same.   62. The semiconductor package according to claim 55, wherein at least one of the first reinforcing member and the second reinforcing member is made of an Fe-Ni alloy.   64. The semiconductor package according to claim 55, wherein the first reinforcing member is provided so as to surround the periphery of the semiconductor element.   64. The semiconductor package according to claim 55, wherein each of the first reinforcing member and the second reinforcing member has a plate shape.   65. A semiconductor device comprising the semiconductor package according to claim 1.

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