JPWO2009025336A1 - Silicon single crystal wafer for IGBT and manufacturing method of silicon single crystal wafer for IGBT - Google Patents

Abstract

Provided is a method for manufacturing a silicon single crystal wafer for IGBT and a silicon single crystal wafer for IGBT, which can expand a pulling speed margin and can manufacture a low-oxygen wafer with small variation in resistivity in a short time. For this purpose, when an n-type dopant is added to the silicon melt by the Czochralski method and the single crystal is grown at a speed at which the silicon single crystal can be pulled up at a growth rate of the grown-in defect-free, After filling the initial polycrystalline material, the single crystal having an interstitial oxygen concentration of 8.5 × 10 17 atoms / cm 3 or less is grown while supplying an additional material.

Description

The present invention relates to an IGBT silicon single crystal wafer used for manufacturing an insulated gate bipolar transistor (IGBT) and a method for manufacturing an IGBT silicon single crystal wafer.
This application claims priority on August 21, 2007 based on Japanese Patent Application No. 2007-215331 for which it applied to Japan, and uses the content for it here.

Insulated Gate Bipolar Transistor (hereinafter referred to as IGBT) is a gate voltage-driven switching element suitable for controlling high power, and is used for inverters in trains, hybrid vehicles, air conditioners, refrigerators, etc. It has been. As shown in FIGS. 5A to 5C, the IGBT is provided with three electrodes, ie, an emitter E, a collector C, and a gate G. The gate is formed on the surface side of the element via an insulating oxide film SiO _2. The current between the emitter E on the device surface side and the collector C on the back surface side is controlled by the applied voltage.
As described above, since the IGBT is an element that controls current with a gate insulated by an oxide film, the quality of the gate oxide film (Gate Oxide Integrity, hereinafter referred to as GOI) is important. If a defect is included in the silicon single crystal wafer, the defect is taken into the gate oxide film and causes a dielectric breakdown of the oxide film.

Further, the IGBT is not an element that uses only the vicinity of the surface of the wafer in the horizontal direction like an LSI such as a memory, but is an element that uses the wafer in the vertical direction (thickness direction) as shown in FIGS. 5A to 5C. Properties are affected by the bulk quality of the wafer. In particular, recombination lifetime and resistivity are important qualities. Since the recombination lifetime is reduced by crystal defects in the substrate, it is necessary to control so that no crystal defects occur even after the device process. Regarding the resistivity, uniformity and stability are required. It is important that it is uniform not only in the plane of the wafer but also between the wafers, that is, in the length direction of the silicon ingot, and does not change even after the device thermal process.
If a plurality of received elements on the wafer plane, that is, a plurality of elements are provided in parallel, if the resistivity differs between these elements, a large current concentrates on the low resistivity element and breaks. Therefore, the uniformity and stability of the resistivity are important. As described above, when a plurality of elements are miniaturized in parallel, a large current is concentrated due to the difference in resistivity, and the current is concentrated on a specific element, resulting in damage. It is important that the process does not change.

Further, as shown in FIG. 5A, as a substrate for a so-called punch through (hereinafter referred to as PT) type IGBT in which the depletion layer contacts the collector side when the current is turned off, an epitaxial wafer (hereinafter referred to as an epi wafer) is used. Is used. However, the PT type IGBT has a problem of high cost because it uses an epi-wafer. Also, switching loss increases at high temperatures for lifetime control. For this reason, the ON voltage decreases at a high temperature, and current may concentrate on a specific element during parallel use, causing damage.
In order to overcome the drawbacks of the PT-type substrate, a non-punch through (hereinafter referred to as NPT) type IGBT in which the depletion layer does not contact the collector side at the time of OFF has been developed. More recently, an FS-IGBT having a trench gate structure and a field stop (hereinafter referred to as FS) layer formed on the collector side as shown in FIG. It has come to be manufactured. As a substrate for an NPT type or FS type IGBT, a wafer having a diameter of 150 mm or less (hereinafter referred to as an FZ wafer) cut from a silicon single crystal grown by the FZ method has been used.

Although the FZ wafer is cheaper than the epi wafer, it is necessary to increase the diameter of the wafer in order to further reduce the manufacturing cost of the IGBT. However, it is extremely difficult to grow a single crystal having a diameter larger than 150 mm by the FZ method, and even if it can be produced, it is difficult to stably supply it at a low price.
Therefore, we tried to manufacture a silicon single crystal wafer for IGBT by the Czochralski method (CZ method) that can easily grow a large diameter crystal of φ200 mm or more, preferably φ300 mm or more.

The techniques described in Patent Documents 1 to 3 described below are all aimed at reducing defects in the wafer. In Patent Document 1, the entire surface is grown by the CZ method and doped with nitrogen. A silicon single crystal consisting of an N-region, having an interstitial oxygen concentration of 8 ppma or less, or doped with nitrogen, excluding at least void-type defects and dislocation clusters from the entire surface, and having an interstitial oxygen concentration of 8 ppma or less A wafer is disclosed.
Patent Document 2 discloses a method for producing a silicon single crystal that is pulled up using the Czochralski method while being doped with oxygen and nitrogen, and 6.5 × 10 ¹⁷ atoms / day while the single crystal is pulled up. A method for producing a silicon single crystal doped with oxygen at a concentration of less than cm ³ and nitrogen at a concentration of more than 5 × 10 ¹³ atoms / cm ³ is disclosed.
Further, in Patent Document 3, a nitrogen concentration of 2 × 10 ¹⁴ atoms / cm ³ or more and 2 × 10 ¹⁶ atoms / cm ³ or less grown from a melt added with nitrogen by the Czochralski method, and 7 × 10 ¹⁷ atoms is used. Containing oxygen concentration of / cm ³ or less, various surface defect densities are FPD ≦ 0.1 / cm ² , SEPD ≦ 0.1 / cm ² , and OSF ≦ 0.1 / cm ² , A silicon semiconductor substrate is disclosed in which the defect density is LSTD ≦ 1 × 10 ⁵ / cm ³ and the oxide film breakdown voltage characteristics are TZDB high C mode pass rate ≧ 90% and TDDB pass rate ≧ 90%.
JP 2001-146498 A JP 2000-7486 A JP 2002-29891 A

However, although Patent Documents 1 to 3 disclose a wafer manufacturing method that is free of crystal defects, the wafer characteristics necessary for the IGBT are not clarified. Further, it is defect-free CZ silicon, and the interstitial oxygen concentration is 8.5 × 10 ¹⁷ atoms / cm ³ or less, 7 × 10 ¹⁷ atoms / cm ³ or less, or 4.5 × 10 ¹⁷ atoms / cm ³ or less, and the wafer surface In order to grow a crystal whose resistivity variation is 5% or less, it is necessary to drastically change the rotation speed of the quartz crucible and the rotation speed of the crystal from the conventional conditions, and a defect-free crystal can be grown. There is a problem that the pulling speed margin becomes small and the yield decreases.

  The resistance characteristic of the IGBT wafer is an Si substrate for n-type semiconductor. A typical method for manufacturing an Si substrate for an n-type semiconductor is to melt Si in a crucible and dope P to manufacture a Si single crystal ingot by the Czochralski method. In this typical manufacturing method, since the segregation coefficient of P is 0.3, the P concentration greatly changes in the longitudinal direction of the manufactured Si ingot. Therefore, when the resistance specification range of the semiconductor substrate is small, one Si The corresponding resistance portion that can be taken from the single crystal ingot is only a small part, and the production efficiency is extremely low. Therefore, in the case of an IGBT semiconductor substrate, an Si single crystal ingot having a high resistance of several thousand Ωcm or more is manufactured in advance without doping with an n-type impurity such as P, and then neutron irradiation is performed so as to be within a desired resistance range. A neutron irradiation method for adjusting the resistivity is known.

The resistivity adjustment by neutron irradiation is a special process, and is performed by placing the Si single crystal in the reactor for a certain period of time. for that reason,
1. 1. Increase the cost of Si substrates for semiconductors. 2. It becomes a factor which prolongs the cycle time of manufacture, such as waiting time of neutron irradiation and transport time. There was a problem that the amount of treatment was limited due to the treatment in the reactor.

  The present invention has been made in view of the above circumstances, and it is possible to manufacture a silicon single crystal wafer for IGBT capable of manufacturing a low-oxygen wafer with improved oxide breakdown voltage characteristics and small variations in resistivity in a short time. It is an object to provide a method and a silicon single crystal wafer for IGBT.

When a silicon single crystal wafer is manufactured by the Czochralski method (hereinafter sometimes referred to as the CZ method), a wafer having a large diameter of about 300 mm can be manufactured. The wafer manufactured by the CZ method is For this reason, it is not suitable for an IGBT wafer.
(1) In the CZ method, excessive vacancies aggregate when a single crystal is grown, and COP defects (Crystal Originated Particles) of about 0.2 to 0.3 μm are generated. When manufacturing an IGBT, a gate oxide film is formed on the wafer surface. When a COP defect is exposed on the wafer surface or a COP defect existing in the vicinity of the wafer surface is taken into the gate oxide film. Degrading GOI (Gate Oxide Integrity). Therefore, a wafer that does not contain COP defects is required so that the GOI does not deteriorate, but it is difficult to manufacture a defect-free wafer by the CZ method.
(2) The silicon single crystal wafer manufactured by the CZ method contains excess oxygen of about 1 × 10 ¹⁸ atoms / cm ³ , and such a wafer has a low temperature of about 1 hour at 450 ° C. When heat treatment (heat treatment corresponding to the sintering process in the IGBT manufacturing process) is performed, oxygen donors are generated, and the resistivity of the wafer changes before and after the heat treatment.
(3) The resistivity of a silicon single crystal wafer manufactured by the CZ method can be controlled by the amount of dopant added to the silicon melt, and phosphorus is added as a dopant to an IGBT wafer, but phosphorus has a segregation coefficient. Since it is small, the concentration greatly changes along the length direction of the silicon single crystal. Therefore, within a single silicon single crystal, the range of wafers having a resistivity that matches the design specifications is narrow.
(4) The silicon single crystal wafer manufactured by the CZ method contains excess oxygen of about 1 × 10 ¹⁸ atoms / cm ^3. Oxygen precipitates as SiO ₂ and degrades the recombination lifetime.

(5) Furthermore, according to a recent study, “a wafer having defect-free CZ silicon with an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less and a variation in resistivity within the wafer surface of 5% or less. Even when the p / n junction leakage was measured after the IGBT thermal process simulation, only a small amount of junction leakage occurred. For this reason, a wafer having lower oxygen is demanded.

  In order to solve the above problems (1) to (5), the present inventors have conducted intensive research. As a result, by adopting the following configuration, a wafer having the wafer characteristics necessary for the IGBT is obtained as CZ. It was found that it can be manufactured by the method.

The method for producing a silicon single crystal wafer for IGBT of the present invention is a method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method,
When an n-type dopant is added to the silicon melt and the single crystal is grown at a speed at which the growth rate of the silicon single crystal can be pulled up by a grown-in defect-free silicon single crystal,
After the initial polycrystalline raw material is filled, the single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less is grown while supplying an additional raw material.
The method for producing a silicon single crystal wafer for IGBT of the present invention is a method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method,
In the silicon melt, phosphorus is 2.9 × 10 ¹³ atoms / cm ³ or more and 2.9 × 10 ¹⁵ atoms / cm ³ or less, and a p-type dopant having a segregation coefficient smaller than that of phosphorus is crystallized according to the segregation coefficient. The concentration of the silicon single crystal is added so that the concentration is 1 × 10 ¹³ atoms / cm ³ or more and 1 × 10 ¹⁵ atoms / cm ³ or less, and the pulling speed of the silicon single crystal is increased so that a grown-in defect-free silicon single crystal can be pulled. So when growing single crystals,
After filling the initial polycrystalline material, the single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less is grown while supplying an additional material while controlling the dopant concentration to be the above concentration. It is characterized by that.
The present invention, when growing the straight body of a silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the fluctuation ratio range of the surface area where the silicon melt contacts the crucible is -7 to + 7%, and the convection state of the silicon melt is controlled to reduce the interstitial oxygen concentration of the single crystal to 0. It is preferable to set it in the range of 7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ .
The present invention, when growing the straight body of a silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the variation range of the liquid surface height of the silicon melt with respect to the upper end of the crucible is -3 mm to +3 mm, and the convection state of the silicon melt is controlled to control the interstitial oxygen concentration of the single crystal. Is preferably in the range of 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ .
The present invention, when growing the straight body of a silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the fluctuation ratio range of the silicon melt amount is −7 to + 7%, and the convection state of the silicon melt is controlled, so that the interstitial oxygen concentration of the single crystal is 0.7 × 10 ^17. It is preferable to be in the range of ˜4.5 × 10 ¹⁷ atoms / cm ³ .
In the present invention, the silicon material added and supplied when growing the single crystal can be a melting material or a solid material.
In the present invention, the concentration of nitrogen incorporated in the crystal is 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less with respect to the silicon melt for growing the silicon single crystal by the Czochralski method. Can be added.
The present invention, when growing a silicon single crystal by the Czochralski method,
A hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in the range of 40 Pa or more and 400 Pa or less can be introduced into the atmospheric gas in the CZ furnace.
The silicon single crystal wafer for IGBT of the present invention is a silicon single crystal wafer for IGBT composed of a silicon single crystal grown by the Czochralski method, and is manufactured by any one of the manufacturing methods described above,
It is preferable that the variation of the interstitial oxygen concentration in the axial direction of the straight body portion of the silicon single crystal is in the range of 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ .
In the present invention, the LPD density on the wafer surface may be 0.1 pieces / cm ² or less, and the light etching defect density may be 1 × 10 ³ pieces / cm ² or less.
In the present invention, a polycrystalline silicon layer having a thickness of 50 nm to 1000 nm can be formed on the back surface side.

The method for producing a silicon single crystal wafer for IGBT of the present invention is a method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method,
When an n-type dopant is added to the silicon melt and the single crystal is grown at a speed at which the growth rate of the silicon single crystal can be pulled up by a grown-in defect-free silicon single crystal,
After filling the initial polycrystalline material, the single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less (ASTM F121-1979) It is characterized by nurturing.
In the present invention, the silicon raw material added and supplied when growing the single crystal can be a molten raw material or a solid raw material.
In the present invention, the concentration of nitrogen incorporated in the crystal is 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less with respect to the silicon melt for growing the silicon single crystal by the Czochralski method. Can be added.
The present invention, when growing a silicon single crystal by the Czochralski method,
A hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in the range of 40 Pa or more and 400 Pa or less can be introduced into the atmospheric gas in the CZ furnace.
The silicon single crystal wafer for IGBT of the present invention is a silicon single crystal wafer for IGBT composed of a silicon single crystal grown by the Czochralski method, and is manufactured by any one of the manufacturing methods described above,
The variation of the interstitial oxygen concentration in the axial direction of the straight body portion of the silicon single crystal is preferably in the range of 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ .
In the present invention, the LPD density on the wafer surface may be 0.1 pieces / cm ² or less, and the light etching defect density may be 1 × 10 ³ pieces / cm ² or less.
In the present invention, a polycrystalline silicon layer having a thickness of 50 nm to 1000 nm can be formed on the back surface side.
In the present invention, instead of adding an n-type dopant to a silicon melt and adjusting the resistivity, a high-resistance Si single crystal ingot of several thousand Ωcm or more is manufactured in advance, and then the neutron is in a desired resistance range. The resistivity can be adjusted by irradiation.

The silicon single crystal wafer for IGBT of the present invention is an IGBT silicon single crystal wafer made of a silicon single crystal grown by the Czochralski method, and COP defects and dislocation clusters are eliminated in the entire crystal diameter direction. The interstitial oxygen concentration can be 8.5 × 10 ¹⁷ atoms / cm ³ or less, and the variation in resistivity within the wafer surface can be 5% or less.
Further, in the silicon single crystal wafer for IGBT of the present invention, when the silicon single crystal is grown by the Czochralski method, the grown-in defect free from the silicon melt doped with the n-type dopant. It is preferable that the silicon single crystal is grown at a pulling speed capable of pulling up.

Furthermore, in the silicon single crystal wafer for IGBT of the present invention, the pass rate of TZDB at a breakdown electric field of 8 MV / cm is 90% or more, and the concentration of oxygen donor generated when heat treatment is performed at 450 ° C. for 1 hour. Is 9.8 × 10 ¹² pieces / cm ³ or less, or 6 × 10 ¹² pieces / cm ³ or less, and the density of BMD precipitated when two-stage heat treatment is performed at 800 ° C. for 4 hours and 1000 ° C. for 16 hours. Is 5 × 10 ⁷ pieces / cm ³ or less, and the recombination lifetime when the two-stage heat treatment is performed is preferably 100 μsec or more.
Furthermore, in the silicon single crystal wafer for IGBT of the present invention, phosphorus and a p-type dopant having a segregation coefficient smaller than that of phosphorus are 1 × 10 ¹³ atoms / cm ³ or more and 1 × 10 ¹⁵ atoms / cm ^{3, respectively.} It is preferably contained in the following concentrations.
Furthermore, in the silicon single crystal wafer for IGBT of the present invention, the LPD density on the wafer surface is 0.1 piece / cm ² or less, and the light etching defect density is 1 × 10 ³ pieces / cm ² or less. Is preferred.
Moreover, in the silicon single crystal wafer for IGBT of the present invention, it is preferable that a polycrystalline silicon layer of 50 nm or more and 1000 nm or less is formed on the back surface side.

  In the present invention, the variation in resistivity is measured at a total of three locations: the wafer center, a position between the wafer center and the periphery, and a position 5 mm from the wafer periphery. The maximum value and the minimum value are selected and set to a value obtained by the equation (maximum value−minimum value) × 100 / minimum value.

Further, in the present invention, “Grown-in defect free” means that defects caused by crystal growth such as COP defects and dislocation clusters are eliminated.
“Light etching defects” means that an As-grown silicon single crystal wafer is immersed in an aqueous copper sulfate solution and then air-dried, and then subjected to Cu decoration for about 20 minutes at 900 ° C. in a nitrogen atmosphere. In order to remove the Cu silicide layer on the surface of the test piece, it was immersed in an HF / HNO ₃ mixed solution, and the surface layer was removed by etching for about several tens of microns. Thereafter, the wafer surface was etched by 2 μm light etching (chromic acid etching). And defects detected using an optical microscope. According to this evaluation method, the dislocation clusters formed at the time of crystal growth can be revealed by Cu decoration, and the dislocation clusters can be detected with high sensitivity. That is, the light etching defect includes a dislocation cluster.
In the present invention, the “LPD density” is a density of defects detected using a laser light scattering particle counter (SP1 (surfscan SP1): manufactured by KLA-Tencor).

Further, TZDB is an abbreviation for Time Zero Dielectric Breakdown, and is one of the indexes representing GOI. The pass rate of TZDB in the present invention was determined by measuring the current-voltage curve at about 229 locations on the entire wafer under the conditions that the electrode area of the measurement electrode was 8 mm ² and the judgment current was 1 mA. The probability of not having occurred is taken as the pass rate of TZDB. This pass rate is a C mode pass rate.

  According to the silicon single crystal wafer of the present invention, since COP defects and dislocation clusters are eliminated in the entire crystal diameter direction, it is suitable as a wafer for IGBT which is an element that uses the wafer in the vertical direction. That is, since COP defects and dislocation clusters are eliminated in the entire crystal diameter direction, the COP defects are not taken into the gate oxide film when the gate oxide film is formed on the wafer surface in the IGBT manufacturing process, and the GOI is deteriorated. I will not let you. Further, by eliminating dislocation clusters, leakage current in the integrated circuit can be prevented.

Furthermore, wafers are manufactured from a single crystal of silicon that is pulled by the continuous CZ method (CCZ method) in which pulling is performed while adding raw materials, rather than the batch CZ method that does not add raw materials when pulling, which is the mainstream at present. It is possible to easily manufacture a silicon single crystal ingot maintaining a low oxygen state in the crystal axis direction, which was very difficult by the equation, and to improve the yield of the silicon wafer for IGBT.
That is, normally, when a silicon single crystal ingot is manufactured by a batch-type Czochralski method, oxygen is inevitably mixed from a quartz crucible holding a silicon melt. When the measures for reducing oxygen are not taken, the oxygen concentration of the single crystal ingot is usually about 10 × 10 ¹⁷ atoms / cm ³ (oldASTM), but the process conditions such as the application of a transverse magnetic field and the pressure in the furnace are limited. By devising, it is possible to realize a silicon single crystal ingot with a low oxygen concentration. However, in the case of the batch type CZ method, 4.5 × 10 ¹⁷ atoms / cm ³ or less or 4 × 10 ¹⁷ atoms / cm ³ or less in the entire longitudinal direction of the silicon single crystal (the straight body portion extending over the entire length in the crystal axis direction). Maintaining the desired low oxygen concentration cannot be realized, and can be realized only in a part in the longitudinal direction (crystal axis direction).
The reason for this is that, as described above, oxygen dissolves from the quartz crucible into the silicon melt, but as the crystal pulling length increases, the contact area between the quartz crucible and the silicon melt changes during the crystal pulling process. For this reason, the oxygen concentration in the single crystal varies. Further, oxygen dissolved in the silicon melt is transported by convection inside the silicon melt and taken into the crystal from the silicon melt, but the convection changes depending on the remaining amount of the melt. For this reason, the oxygen concentration in the single crystal varies.
As described above, the present invention also has a feature of having an aspect of an excellent method for producing a low oxygen concentration crystal. Instead of adding an n-type dopant to the silicon melt and adjusting the resistivity, a high-resistance Si single crystal ingot of several thousand Ωcm or more is manufactured in advance, and then the resistivity is applied by neutron irradiation so as to be within a desired resistance range. It is also possible to adjust.

That is, in the present invention, when the straight body portion of the silicon single crystal is grown by the Czochralski method for producing the silicon single crystal by the continuous CZ method, the supply of the additional raw material is controlled to obtain the silicon melt. The variation ratio range of the surface area in contact with the crucible is set to -7 to + 7%, or the supply range of the additional raw material is controlled so that the variation range of the liquid surface height of the silicon melt is -3 mm to +3 mm. Alternatively, by controlling the supply of the additional raw material so that the variation ratio range of the silicon melt amount is −7 to + 7%, the remaining amount of the melt capable of growing low oxygen crystals can be maintained. In addition, the contact area between the quartz crucible and the silicon melt is controlled to be constant, the amount of oxygen dissolved from the quartz crucible into the silicon melt is controlled to be constant, and the convection inside the silicon melt is crystallized. And controls so as not to vary by up length, together with the amount of oxygen taken into the crystal from the silicon melt becomes constant axial length of 4.5 × 10 17 ^atoms / cm ³ or less in the state of low oxygen concentration It is possible to produce a single crystal that is maintained over a wide range.
That is, in the present invention, the convection state of the silicon melt is controlled, and the interstitial oxygen concentration of the single crystal is in the range of 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ over the entire length in the crystal axis direction. It becomes possible. This makes it possible to realize a low oxygen concentration region that can be obtained only in a part of the crystal longitudinal direction in the batch type CZ method over the entire crystal longitudinal direction.
In the present invention, in the case of the range ratio of the surface area where the silicon melt comes into contact with the crucible, this surface area is also included when there is a quartz part with which the silicon melt comes into contact in addition to the crucible. For example, when a double crucible in the CCZ method is used, the surface area of the silicon crucible contact portion of the inner crucible or the quartz raw material supply pipe is immersed in the silicon melt. Including the surface area of the part, the surface area is in contact with the crucible.

Further, since the interstitial oxygen concentration is 8.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) or less, or 4.5 × 10 ¹⁷ atoms / cm ³ or less, the concentration of oxygen donors generated after the heat treatment of the wafer is 9. It can be suppressed to 8 × 10 ¹² pieces / cm ³ or less, the change in the resistivity of the wafer before and after the heat treatment can be prevented, and the quality of the silicon single crystal wafer can be stabilized.
The reason why the oxygen donor concentration is 9.8 × 10 ¹² atoms / cm ³ or less is as follows. An n-type wafer having a resistivity of 40 to 70 Ω · cm is used for the high voltage IGBT. For example, when the resistivity specification of the substrate is 50 ± 5 Ω · cm, the allowable donor concentration is 9.8 × 10 ¹² ions / cm ³ or less. Here, the temperature at which oxygen donors due to oxygen are most likely to be generated is 450 ° C. For example, in the device process, the Al wiring sintering process is performed around this temperature. FIG. 1 shows the results of examining the oxygen concentration dependence of the oxygen donor concentration generated when heat treatment is performed at 450 ° C. for 1 hour. From FIG. 1, in order to suppress the oxygen donor concentration to 9.8 × 10 ¹² atoms / cm ³ or less, the interstitial oxygen concentration of the wafer must be controlled to 8.5 × 10 ¹⁷ atoms / cm ³ or less. I understand that. For this reason, in the present invention, the interstitial oxygen concentration is set to 8.5 × 10 ¹⁷ atoms / cm ³ or less, or 4.5 × 10 ¹⁷ atoms / cm ³ or less.

The interstitial oxygen concentration can also be reduced by lowering the rotation speed of the quartz crucible.
Specifically, as shown in FIG. 4, when growing a silicon single crystal from the silicon melt while rotating it in the direction opposite to the quartz crucible, the quartz crucible rotation speed R1 (rpm) and the crystal rotation The number R2 (rpm)
As shown by the points (R1, R2) in FIG.
Point A (0.1,1), Point B (0.1,7), Point C (0.5,7), Point I (0.7,6), Point E (1,6), Point F It can be set to a value within a range surrounded by (2, 2) and point G (2, 1). Thereby, a single crystal having an interstitial oxygen concentration of 4 × 10 ¹⁷ atoms / cm ³ or less can be grown. Substantially, when the rotation speed of the quartz crucible is R1 (rpm) and the rotation speed of the crystal is R2 (rpm), R1: 0.1 or more and 2 or less, R2: 1 or more and 7 or less, When R1: 0.5 or more and 0.7 or less, R2 <7-5 (R1-0.5) is satisfied, and when R1: 0.7 or more and 1 or less, R2 <6 is satisfied, and R1: 1 In the case of 2 or less, it can be set in a range satisfying R2 <6-4 (R1-1). In this case, a silicon single crystal having a low oxygen concentration can be grown by setting the interstitial oxygen concentration in the single crystal to 4.0 × 10 ¹⁷ atoms / cm ³ or less.
Further, the quartz crucible rotation speed R1 (rpm) and the crystal rotation speed R2 (rpm)
As shown by the points (R1, R2) in FIG.
Point A (0.1,1), point B (0.1,7), point L (0.2,7), point K (0.3,7), point J (0.5,6), Pull the silicon single crystal up to a value within the range surrounded by point I (0.7,6), point H (1,5), point N (1,3), and point M (1,1). Also good. Substantially, the quartz crucible rotation speed R1 (rpm) and the crystal rotation speed R2 (rpm) are in the range of R1: 0.1 or more and 2 or less, R2: 1 or more and 7 or less, provided that R1: 0. In the case of 3 or more and 0.5 or less, R2 <7-5 (R1-0.3) is satisfied, and in the case of R1: 0.5 or more and 0.7 or less, R2 <6 is satisfied, and R1: 0. In the case of 7 or more and 1 or less, it may be set in a range satisfying R2 <6-3.4 (R1-0.7). In this case, a silicon single crystal having a low oxygen concentration can be provided by setting the interstitial oxygen concentration in the single crystal to 3.5 × 10 ¹⁷ atoms / cm ³ or less.
Further, the quartz crucible rotation speed R1 (rpm) and the crystal rotation speed R2 (rpm)
As shown by the points (R1, R2) in FIG.
Point A (0.1,1), point B (0.1,7), point L (0.2,7), point Q (0.3,6), point J (0.5,6), The silicon single crystal may be pulled up by setting a value within a range surrounded by the points P (0.7, 5), N (1, 3), and M (1, 1). Substantially, the quartz crucible rotation speed R1 (rpm) and the crystal rotation speed R2 (rpm) are in the range of R1: 0.1 or more and 1 or less, R2: 1 or more and 7 or less, provided that R1: 0. When 2 or more and 0.3 or less, R2 <7-10 (R1-0.2) is satisfied, and when R1: 0.3 or more and 0.5 or less, R2 <6 is satisfied, and R1: 0.5 In the case of 0.7 or more and 0.7 or less, R2 <6-5 (R1-0.5) is satisfied, and in the case of R1: 0.7 or more and 1 or less, R2 <5-6.7 (R1-0.7) Can be set in a range that satisfies the above. In this case, a silicon single crystal having an interstitial oxygen concentration of 3.0 × 10 ¹⁷ atoms / cm ³ or less in the single crystal can be grown, and a silicon single crystal having a lower oxygen concentration can be grown.
Table 3 shows the relationship among the quartz crucible rotation speed R1 (rpm), the crystal rotation speed R2 (rpm), and the interstitial oxygen concentration.

In the present invention, the magnetic field applied to the silicon melt can be a horizontal magnetic field, a cusp magnetic field, or the like. For example, the strength of the horizontal magnetic field is 3000 to 5000 G (0.3 T to 0.5 T). it can. When the magnetic field strength is below the above range, the effect of suppressing convection of the silicon melt is not sufficient, and the shape of the solid-liquid interface cannot be made preferable, and the oxygen concentration cannot be lowered sufficiently, which is not preferable. Further, if the magnetic field strength is increased beyond the above range, convection is suppressed too much, and the high-temperature silicon melt advances the deterioration of the inner surface of the quartz crucible, and the dislocation-free rate of the crystal is lowered.
In the present invention, the magnetic field center position and the melt surface position during crystal pulling are preferably −75 to +50 mm, more preferably 20 to 45 mm. Here, the magnetic field center position means a height position where the center of the magnetic field generating coil is located in a horizontal magnetic field, and -75 mm means 75 mm above the melt surface. ing.

The manufacturing method of the silicon single crystal wafer for IGBT of the present invention has an unprecedented level of oxygen concentration of 4 × 10 ¹⁷ atoms / cm ³ (ASTM F121-1979) or less in an 8-inch φCZ silicon single crystal. Could be realized. A silicon single crystal which is COP-free and has an oxygen concentration of 4 × 10 ¹⁷ atoms / cm ³ or less is a crystal located between the CZ crystal and the FZ crystal, which is a conventional crystal. By growing the COP-free crystal by the MCZ method, an oxide film breakdown voltage equivalent to that of the FZ crystal can be obtained. In addition, by setting the oxygen concentration to 4 × 10 ¹⁷ atoms / cm ³ or less, the heat treatment in the device manufacturing process can eliminate the concern about the generation of oxygen donors in the device manufacturing process. It becomes impossible. In the pulling by the MCZ method, the convection of the silicon melt is suppressed, the amount of dissolution of the quartz crucible is reduced, and the impurity concentration in the quartz crucible is reduced by using the synthetic quartz crucible, so that a CZ crystal having a quality closer to that of the FZ crystal can be grown. . Here, the synthetic quartz crucible means that at least the inner surface in contact with the raw material melt is formed of the following synthetic quartz.

Synthetic quartz is a chemically synthesized and manufactured raw material, and synthetic quartz glass powder is amorphous. Since the raw material of synthetic quartz is gas or liquid, it can be easily purified, and synthetic quartz powder can have a higher purity than natural quartz powder. Synthetic quartz glass raw materials are derived from gaseous raw materials such as carbon tetrachloride and liquid raw materials such as silicon alkoxide. In synthetic quartz powder glass, it is possible to make all impurities 0.1 ppm or less.
In the glass obtained by melting synthetic quartz glass powder, when the light transmittance is measured, the synthetic quartz glass is made of carbon tetrachloride, which is used for ultraviolet optical applications as a raw material, and transmits ultraviolet rays up to a wavelength of about 200 nm. It is considered that the characteristics are close to.
In a glass obtained by melting synthetic quartz glass powder, when a fluorescence spectrum obtained by excitation with ultraviolet light having a wavelength of 245 nm is measured, a fluorescence peak as in a molten product of natural quartz powder is not observed.
Synthesis of whether the glass material was natural quartz by measuring the concentration of impurities contained, measuring the difference in silanol amount, measuring light transmittance, or measuring the fluorescence spectrum obtained by excitation with ultraviolet light having a wavelength of 245 nm Whether it was quartz or not can be determined.

  The MCZ method makes it easy to grow 8-inch φ silicon single crystals compared to the FZ method, and the use of a quartz crucible makes it possible to increase the charge. Compared to the FZ method, raw material costs can be reduced, and at the same time Can be improved.

In the present invention, in order to control the gas flow state on the surface of the silicon melt, the pressure in the furnace is 10 torr (1.3 kPa) or more, preferably 30 to 200 torr (4.0 to 27 kPa), more preferably 30 to 70 torr (4.0 to 9.3 kPa) is desirable. The upper limit of the pressure in the furnace is that when the pressure in the furnace increases, the gas flow rate on the melt of inert gas such as Ar decreases, so that it is difficult to exhaust the reactant gas such as SiO evaporated from the melt. As a result, the oxygen concentration in the crystal increases, and SiO aggregates in the upper part of the melt in the furnace at about 1100 ° C. or at a lower temperature, thereby generating dust and dropping into the melt. In order to prevent dislocations, the upper limit of the pressure was specified to prevent these.
In the present invention, the atmospheric gas flow rate supplied into the CZ furnace is set to 100 to 200 liters / min or more, the pressure in the CZ furnace is set to 6700 Pa or less, and SiO evaporated from the melt surface is effectively discharged out of the apparatus. At the same time, foreign matter drifting on the surface of the melt is driven to the crucible wall, and the oxygen concentration in the crystal is prevented from increasing.

Further, according to the silicon single crystal wafer of the present invention, the variation in resistivity within the wafer surface is 5% or less, so that the quality of the IGBT can be stabilized.
By the way, the resistivity of a silicon single crystal wafer manufactured by the CZ method can be controlled by the amount of dopant contained in the silicon single crystal, but phosphorus often used as a dopant for an IGBT substrate has a small segregation coefficient, so that the silicon single crystal The concentration varies greatly over the length direction. Therefore, the range in which a wafer having a resistivity that meets the design specifications in one single crystal is obtained is narrow. Therefore, in the present invention, as described above, neutron irradiation, addition of an n-type dopant to the silicon melt, addition of a predetermined amount of p-type dopant having a segregation coefficient smaller than phosphorus and phosphorus, and various other means are employed. In any case, it is important to grow a single crystal using a synthetic quartz crucible which uses silicon polycrystal having a low impurity concentration as a raw material and has little impurity elution. By using these means, the yield of the silicon single crystal can be improved.

In addition, in the wafer of the present invention that realizes a low oxygen concentration, it is possible to dope with P by doping with a neutron after manufacturing the wafer without doping with a dopant at the time of pulling. For neutron irradiation, first, a silicon single crystal is grown without adding a dopant for adjusting the resistivity to the silicon melt, and irradiating this non-doped silicon single crystal with neutrons results in ³⁰ Si in the crystal. Phosphorus can be doped by utilizing the phenomenon that is converted to ³¹ P. ^{Since 30} Si is uniformly contained in a single crystal at a concentration of about 3%, this neutron irradiation is a method in which phosphorus can be doped most uniformly in both the radial and axial directions of the crystal.

The resistivity can also be controlled by adding an n-type dopant to the silicon melt. At this time, it is desirable to apply a so-called DLCZ method (Double Layered Czochralski). The DLCZ method is a method for suppressing a change in concentration in the crystal axis direction of a dopant having a small segregation coefficient such as phosphorus. This method is disclosed in, for example, Japanese Patent Laid-Open No. 5-43384. In the CZ method, all the polycrystalline silicon is once dissolved in a crucible, added as a silicon melt, phosphorus is added, and the temperature at the bottom of the crucible is lowered. Dopant concentration incorporated into the single crystal by solidifying the silicon melt upward from the bottom to form a silicon solidified layer and growing the crystal while gradually dissolving the silicon solidified layer from the top toward the bottom Is a method of keeping the constant almost constant.
In the present invention, the change in resistivity in the crystal axis direction of the silicon single crystal can also be suppressed by adopting the DLCZ method.

Moreover, the resistivity change in the crystal axis direction of the silicon single crystal can also be suppressed by adding a predetermined amount of phosphorus and a p-type dopant having a segregation coefficient smaller than that of phosphorus. This is called a so-called double doping method and is disclosed in, for example, Japanese Patent Application Laid-Open No. 2002-128591, and is a method for suppressing a change in resistivity in the axial direction of a crystal doped with a dopant having a small segregation coefficient such as phosphorus. . The phosphorus concentration change is compensated for by doping p-type dopant (for example, Al, Ga, In) having a segregation coefficient smaller than that of phosphorus as a counter dopant. FIG. 2 shows a change in resistivity in the crystal axis direction when only phosphorus is doped and when phosphorus and aluminum are simultaneously doped. When the resistivity specification of the wafer is 50 ± 5 Ω · cm, the yield is improved about three times by simultaneously doping with phosphorus and aluminum. The yield is the highest when the concentration ratio of aluminum to phosphorus at the upper end of the single crystal is about 50%. In the present invention, phosphorous and a p-type dopant having a segregation coefficient smaller than that of phosphorous are contained in concentrations of 1 × 10 ¹³ atoms / cm ³ or more and 1 × 10 ¹⁵ atoms / cm ³ or less, respectively. The change in resistivity in the crystal axis direction can be suppressed.

Next, when the silicon single crystal is doped with nitrogen of 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less, it is easy to eliminate COP defects and dislocation clusters. If the doping amount of nitrogen is less than the above range, the effect is small, and if it exceeds the above range, nitride is generated and the silicon single crystal cannot be grown.

Further, according to the silicon single crystal wafer of the present invention, the pass rate of TZDB is 90% or more, and the concentration of oxygen donors generated when heat treatment is performed at 450 ° C. for 1 hour is 9.8 × 10 ¹² pieces. / Cm ³ or less or 6 × 10 ¹² pieces / cm ³ or less, and the density of BMD generated when two-stage heat treatment is performed at 800 ° C. for 4 hours and 1000 ° C. for 16 hours is 5 × 10 ⁷ pieces / cm ³ Since the recombination lifetime when the two-stage heat treatment is performed is 100 μsec or more, the characteristics required for a silicon single crystal wafer for IGBT can be satisfied.

The recombination lifetime is deteriorated by interstitial oxygen contained in the silicon single crystal being precipitated as SiO ₂ through a device formation process. According to the wafer of the present invention, since the interstitial oxygen concentration is 8.5 × 10 ¹⁷ atoms / cm ³ or less as described above, the recombination lifetime can be 100 μsec or more.

The recombination lifetime is deteriorated by interstitial oxygen contained in the silicon single crystal being precipitated as SiO ₂ through a device formation process. According to the wafer of the present invention, since the interstitial oxygen concentration is 8.5 × 10 ¹⁷ atoms / cm ³ or less as described above, the recombination lifetime can be 100 μsec or more.

Furthermore, the method for manufacturing a silicon single crystal wafer for IGBT of the present invention is a method for manufacturing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method, and the atmosphere in a CZ furnace A hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in the range of 40 Pa or more and 400 Pa or less is introduced into the gas, and the pulling speed of the silicon single crystal is high enough to pull up the grown-in defect-free silicon single crystal. A single crystal having an oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less can be grown, and the pulled silicon single crystal can be irradiated with neutrons to be doped with phosphorus.
Moreover, the manufacturing method of the silicon single crystal wafer for IGBT of this invention is a manufacturing method of the silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method, Comprising: An n-type dopant is added to a silicon melt. A hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in the range of 40 Pa or more and 400 Pa or less is introduced into the atmosphere gas in the CZ furnace, and the pulling rate of the silicon single crystal is reduced to a grown-in defect-free silicon single crystal Can grow a single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less.
The method for producing a silicon single crystal wafer for IGBT of the present invention is a method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method, wherein phosphorus is added to the silicon melt. 2.9 × 10 ¹³ atoms / cm ³ or more and 2.9 × 10 ¹⁵ atoms / cm ³ or less, a p-type dopant having a segregation coefficient smaller than that of phosphorus, and the concentration in the crystal is 1 × 10 according to the segregation coefficient Hydrogen atoms containing material that is added in the range of ¹³ atoms / cm ^{3 to} 1 × 10 ¹⁵ atoms / cm ³ and in the atmosphere gas in the CZ furnace is in the range of 40 Pa to 400 Pa in terms of hydrogen gas partial pressure. The rate of pulling of the silicon single crystal is such that the growth rate of the grown-in defect-free silicon single crystal can be increased. Degrees can be grown to 8.5 × ¹⁰ 17 atoms / cm ³ or less of a single crystal.

Furthermore, in the method for producing a silicon single crystal wafer for IGBT of the present invention, the nitrogen incorporated into the crystal is 1 × 10 ¹³ atoms / cm ³ or more with respect to the silicon melt for growing the silicon single crystal by the Czochralski method. It is preferable to add at a concentration of 5 × 10 ¹⁴ atoms / cm ³ or less.

Here, the hydrogen-containing substance is a substance containing hydrogen atoms in its molecule, and is a gaseous substance that generates hydrogen gas by being thermally decomposed when dissolved in the silicon melt. This hydrogen-containing substance includes hydrogen gas itself. By mixing this hydrogen-containing substance with an inert gas and introducing it into the atmosphere at the time of forming the necking portion, the hydrogen concentration in the silicon melt can be improved. Specific examples of the hydrogen-containing substance include inorganic compounds containing hydrogen atoms such as hydrogen gas, H ₂ O, and HCl, hydrocarbon atoms such as silane gas, CH ₄ , and C ₂ H _2, and hydrogen atoms such as alcohol and carboxylic acid. Examples of the organic compound include, but it is particularly preferable to use hydrogen gas. In addition, as the atmospheric gas in the CZ furnace, inexpensive Ar gas is preferable, and various rare gases such as He, Ne, Kr, and Xe alone or a mixed gas thereof can be used.

Moreover, in this invention, the density | concentration of the hydrogen containing substance in hydrogen containing atmosphere is made into the range of 40 Pa or more and 400 Pa or less in hydrogen gas conversion partial pressure. Here, the hydrogen gas equivalent partial pressure is because the amount of hydrogen atoms obtained by thermal decomposition of the hydrogen-containing material depends on the number of hydrogen atoms originally contained in the hydrogen-containing material. . For example, 1 mole of H ₂ O contains 1 mole of H _2, but 1 mole of HCl contains only 0.5 mole of H ₂ . Therefore, in the present invention, the hydrogen-containing substance is used so that an atmosphere equivalent to the reference atmosphere can be obtained on the basis of a hydrogen-containing atmosphere in which hydrogen gas is introduced into the inert gas at a partial pressure of 40 to 400 Pa. It is desirable to determine the concentration of hydrogen, and the preferable pressure of the hydrogen-containing substance at this time is defined as a partial pressure in terms of hydrogen gas.
That is, in the present invention, it is assumed that a hydrogen-containing substance is dissolved in a silicon melt and is thermally decomposed in a high-temperature silicon melt to be converted into hydrogen atoms. What is necessary is just to adjust the addition amount of a hydrogen-containing substance so that a pressure may be in the range of 40-400 Pa.

According to the above method for manufacturing a silicon single crystal wafer for IGBT, by introducing a hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure of 40 Pa or more and 400 Pa or less, a grown-in defect-free silicon single crystal is obtained. The allowable range of the pullable speed can be widened, whereby a wafer from which COP defects and dislocation clusters are eliminated in the entire crystal diameter direction can be easily manufactured. Further, the non-doped silicon single crystal after the pulling is irradiated with neutrons to dope phosphorus, or an n-type dopant such as phosphorus is added to the silicon melt, thereby reducing the variation in resistivity in the plane of the wafer. % Or less. The reduction in resistivity variation can also be achieved by adding phosphorus and a p-type dopant having a segregation coefficient smaller than that of phosphorus to the silicon melt.
Further, by adding nitrogen to the silicon melt, the allowable range of the speed at which the grown-in defect-free silicon single crystal can be pulled can be further increased, and the elimination of COP defects and dislocation clusters in the wafer is facilitated. .

  According to the present invention, a method for manufacturing an IGBT silicon single crystal wafer and an IGBT silicon capable of expanding a pulling speed margin and manufacturing a wafer with low oxygen and small resistivity variation at low cost. A single crystal wafer can be provided.

FIG. 1 is a graph showing the relationship between interstitial oxygen concentration and oxygen donor concentration after heat treatment. FIG. 2 is a graph showing the relationship between the solidification rate and the resistivity. FIG. 3 is a schematic vertical cross-sectional view of a CZ furnace used in carrying out the method for producing a silicon single crystal wafer according to the embodiment of the present invention. FIG. 4 is a graph showing the relationship among the quartz crucible rotation speed, crystal rotation speed, and interstitial oxygen concentration. FIG. 5A is a schematic cross-sectional view showing an IGBT. FIG. 5B is a schematic cross-sectional view showing the IGBT. FIG. 5C is a schematic cross-sectional view showing the IGBT. FIG. 6 is a cross-sectional view showing a contact state between the quartz crucible 1 a and the silicon melt 3. FIG. 7 is a schematic perspective view showing the contact area between the quartz crucible 1 a and the silicon melt 3. FIG. 8 is a cross-sectional view schematically showing the vicinity of the lower end of the raw material rod suspended in the chamber as the additional raw material supply means 30 in the CZ furnace shown in FIG. FIG. 9 is a schematic perspective view showing the contact area between the immersion portion 35 of the raw material supply pipe 34 and the silicon melt 3. FIG. 10 is a graph showing the raw material supply state with respect to the crystal length of the straight body part. FIG. 11 is a graph showing the raw material supply state with respect to the crystal length of the straight body part. FIG. 12 is a graph showing the raw material supply state with respect to the crystal length of the straight body part. FIG. 13 is a graph showing the raw material supply state with respect to the crystal length of the straight body part. FIG. 14 is a graph showing the results of the experimental example of the present invention. FIG. 15 is a graph showing the results of the experimental example of the present invention. FIG. 16 is a graph showing the results of the experimental example of the present invention. FIG. 17 is a graph showing the results of the experimental example of the present invention.

Explanation of symbols

3 ... Silicon melt 6 ... Silicon single crystal T ... Seed crystal 30 ... Additional raw material supply means

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Configuration of CZ furnace)
FIG. 3 is a longitudinal sectional view of a CZ furnace suitable for carrying out the method for manufacturing a silicon single crystal wafer for IGBT in the embodiment of the present invention.
The CZ furnace shown in FIG. 3 includes a crucible 1 disposed in the center of the chamber, a heater 2 disposed outside the crucible 1, and a magnetic field supply device 9 disposed outside the heater 2. . The crucible 1 has a double structure in which a quartz crucible 1a containing a silicon melt 3 inside is held by an outer graphite crucible 1b, and is rotated and moved up and down by a support shaft 1c called a pedestal.
A cylindrical heat shield 7 is provided above the crucible 1. The heat shield 7 has a structure in which an outer shell is made of graphite and the inside thereof is filled with graphite felt. The inner surface of the heat shield 7 is a tapered surface whose inner diameter gradually decreases from the upper end to the lower end. The upper outer surface of the heat shield 7 is a tapered surface corresponding to the inner surface, and the lower outer surface is formed in a substantially straight surface so as to gradually increase the thickness of the heat shield 7 downward.
Then, the silicon single crystal 6 can be formed by immersing the seed crystal T attached to the seed chuck 5 in the silicon melt 3 and pulling up the seed crystal T while rotating the crucible 1 and the pulling shaft 4. .

FIG. 6 is a cross-sectional view showing a contact state between the quartz crucible 1 a and the silicon melt 3.
When the silicon single crystal 6 is pulled up, the quartz crucible 1a stores the silicon melt 3 therein. At this time, the quartz crucible 1a contacts the silicon melt 3 with the surface area S1 on the inner surface.

By controlling the area S1 where the quartz crucible 1a contacts the silicon melt 3, the amount of oxygen dissolved from the quartz crucible 1a into the silicon melt 3 is controlled to be constant.
FIG. 7 is a schematic perspective view showing the contact area between the quartz crucible 1 a and the silicon melt 3.
As shown in FIG. 7, the surface area S1 can be obtained as the sum of a curved bottom surface S11 and a cylindrical sidewall surface S12.

  The heat shield 7 blocks the radiant heat from the heater 2 and the silicon melt 3 surface to the side surface of the silicon single crystal 6, surrounds the side surface of the growing silicon single crystal 6, and the silicon melt 3. It surrounds the surface.

  Outside the heat shield 7, an additional raw material supply means 30 is provided which can continuously add silicon raw material to the silicon melt 3 in the quartz crucible 1a.

  The magnetic field supplied from the magnetic field supply device 9 may be a horizontal magnetic field or a cusp magnetic field. For example, the strength of the horizontal magnetic field is 2000 to 4000 G (0.2 T to 0.4 T), more preferably 2500. -3500G (0.25T-0.35T), and the magnetic field center height is set to be within a range of -150 to +100 mm, more preferably -75 to +50 mm with respect to the melt surface.

FIG. 8 is a cross-sectional view schematically showing the vicinity of the lower end of the raw material rod suspended in the chamber as the additional raw material supply means 30 in the CZ furnace shown in FIG.
As shown in FIG. 8, the additional raw material supply means 30 has a raw material rod 31 suspended in a chamber, and the raw material rod 31 is suspended by a raw material rod suspension mechanism (not shown) having lifting and rotating functions, It is inserted into the raw material melting heater 32 while rotating at a predetermined rotation speed. A predetermined dopant is added to the raw material rod 31 by mixing at the time of coating / forming, embedding after forming, or the like.

  The raw material melting heater 32 has, for example, a shape in which two types of large and small cylinders are connected by a hollow cone, and the raw material rod 31 suspended and heated in the raw material melting heater 32 is melted from the lower end. Then, the rotation of the raw material rod 31 corrects the variation in temperature distribution of the raw material melting heater 32, and the raw material rod 31 is heated almost uniformly.

  Therefore, the melting portion tip position 31a always coincides with the axis of the raw material rod 31, and maintains a stable conical shape. Since the melting portion tip position 31 a does not fluctuate, the droplet 31 b passes through the center of the raw material supply pipe 34 provided below the raw material melting heater 32 and falls into the melt 3. Further, the distance from the lower end of the raw material rod 31 to the melt 3, that is, the drop distance of the droplet 31 b is operated under the condition that the distance is minimized and is constant. It will not be blocked by liquid splashing.

  Since the raw material rod 31 is heated almost uniformly and maintains a stable melting state, the fluctuation of the raw material supply amount to the quartz crucible 1a can be minimized, and the silicon single crystal 6 is kept under stable conditions. Will grow in.

The lower end of the raw material supply pipe 34 made of quartz is immersed in the silicon melt 3, and the vibration caused by the drop of the supplied liquid droplet 31 b is caused by the drop of the supplied liquid droplet 31 b like the so-called double crucible inner crucible. It does not reach the surface of the silicon melt 3 located outside. In this case, the depth of the immersion portion 35 located at the lower end of the raw material supply pipe 34 is set so as to prevent the vibration transmission of the droplet 31b and the influence of convection inhibition inside the silicon melt 3 to a minimum.
Specifically, the dimensions of the raw material supply pipe 34 are preferably in the range of an outer diameter of 50 to 100 mm, an inner diameter = outer diameter of −5 to 15 mm, and an immersion depth of 5 to 200 mm. It can be in a range of 50 mm and immersion depth of 10 to 100 mm.

  The immersion part 35 of the raw material supply pipe 34 is in contact with the silicon melt 3 at an annular bottom surface 36, a cylindrical outer peripheral surface 36 and an inner peripheral surface 38.

FIG. 9 is a schematic perspective view showing the contact area between the immersion portion 35 of the raw material supply pipe 34 and the silicon melt 3.
By additionally controlling the area S2 where the immersion portion 35 and the silicon melt 3 abut, the amount of oxygen dissolved from the quartz crucible 1a into the silicon melt 3 is controlled to be constant.
As shown in FIG. 9, the surface area S2 can be obtained as the sum of an annular bottom surface S36 and a cylindrical outer surface S36 and inner surface S38.

(Manufacturing method of silicon single crystal wafer for IGBT)
Next, a method for manufacturing a silicon single crystal wafer for IGBT using the CZ furnace shown in FIG. 3 will be described.
First, for example, 100 kg of high-purity silicon polycrystal as a raw material is charged into the crucible 1, and a silicon wafer having a CVD film made of, for example, silicon nitride is introduced as a nitrogen source. The material filling can be 300 kg depending on the crystal length to be produced. The nitrogen concentration in the silicon crystal is 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less, or 1 × 10 ¹⁴ atoms / cm ³ or more and 5 × 10 ¹⁵ atoms / cm ³ or less. Thus, it is preferable to adjust the nitrogen concentration in the silicon melt. At the same time, a dopant adjusted to a predetermined amount is added.

Next, the inside of the CZ furnace is a hydrogen-containing atmosphere composed of a mixed gas of a hydrogen-containing substance and an inert gas, the atmosphere pressure is 1.3 to 13.3 kPa (10 to 100 torr), and the hydrogen-containing substance in the atmosphere gas is The concentration is adjusted to be about 40 to 400 Pa in terms of hydrogen gas partial pressure. When hydrogen gas is selected as the hydrogen-containing substance, the hydrogen gas partial pressure may be 40 to 400 Pa. The concentration of hydrogen gas at this time is in the range of 0.3% to 31%.
In addition, it can also be set as the atmosphere only of the inert gas which does not contain hydrogen gas.

  If the hydrogen gas equivalent partial pressure of the hydrogen-containing material is less than 40 Pa, the allowable range of the pulling rate is reduced, and generation of COP defects and dislocation clusters cannot be suppressed. Further, the higher the hydrogen gas equivalent concentration (hydrogen concentration) of the hydrogen-containing substance, the greater the effect of suppressing dislocation generation. However, if the hydrogen gas equivalent partial pressure exceeds 400 Pa, the risk of explosion or the like increases when an oxygen leak occurs in the CZ furnace, which is not preferable for safety. The hydrogen gas equivalent partial pressure of the hydrogen-containing substance is more preferably in the range of 40 Pa to 250 Pa, and particularly preferably the hydrogen gas equivalent partial pressure is in the range of 40 Pa to 135 Pa.

Next, for example, a horizontal magnetic field of 3000 G (hereinafter referred to as G) (0.3 T (hereinafter referred to as Tesla)) from the magnetic field supply device 9 has a magnetic field center height of −75 to +50 mm with respect to the melt surface. The silicon polycrystal is heated by the heater 2 to obtain a silicon melt 3.
Next, the seed crystal T attached to the seed chuck 5 is immersed in the silicon melt 3, and the crystal is pulled up while rotating the crucible 1 and the pulling shaft 4. As the pulling conditions in this case, the growth rate of the single crystal is V (mm / min), and the ratio V / G (mm) when the temperature gradient G (° C./mm) is 1350 ° C. from the melting point during single crystal growth. ² / min · ° C.) is controlled to about 0.22 to 0.15, and V is controlled to 0.65 to 0.30 mm / min, which is a speed at which the grown-in defect-free silicon single crystal can be pulled up. The following conditions can be exemplified. As other conditions, the rotation speed of the quartz crucible is set to 5 to 0.2 rpm, the rotation speed of the single crystal is set to 20 to 0.5 rpm, the pressure of the argon atmosphere is set to 30 Torr (4.0 kPa), and the magnetic field strength is further increased. Can be exemplified by conditions such as 3000G. In particular, by setting the rotation speed of the quartz crucible to 5 rpm or less, diffusion of oxygen atoms contained in the quartz crucible into the silicon melt can be prevented, and the interstitial oxygen concentration in the silicon single crystal can be reduced. it can.

In the crystal pulling, the silicon single crystal 6 is pulled in the order of the neck portion 6n, the shoulder portion 6a, and the straight body portion 6b. At this time, the addition of the additional raw material is started by the additional raw material supply means 30 at the start of the pulling up of the straight body portion 6b.
Thereafter, while the straight body portion 6b of the silicon single crystal 6 is grown, the additional supply of the raw material by the additional raw material supply means 30 is controlled so that the variation ratio range of the surface area where the silicon melt 3 contacts the quartz crucible 1a is controlled. -7 to + 7%.

Here, the surface area with which the silicon melt 3 abuts on the quartz crucible 1a is accurately represented by the sum of the surface area S1 shown in FIG. 6 and the surface area S2 shown in FIG. In other words, it means the total area of the quartz portion with which the silicon melt comes into contact. In the raw material supply control from the additional raw material supply means 30, the ratio ΔS of the variation amount of S1 + S2 is controlled to be in the above range.
Specifically, the surface area S1 is the sum of the bottom surface S11, the side wall surface S12, and the variable surface area S13 when the liquid surface height of the silicon melt 3 changes by ΔH.
The variable surface area S13 is 2πR · ΔH when the radius R of the side wall of the quartz crucible 1a is constant in the height direction.
The surface area S2 is the sum of the bottom surface S36, the outer surface S36, the inner surface S38, and the variable surface areas S7 and S8 when the liquid surface height of the silicon melt 3 changes by ΔH.
The surface area S7 and the surface area S8 are 2πr1 · ΔH and 2πr2 · ΔH, respectively, when the inner radius r1 and the outer radius r2 of the raw material supply pipe 34 are constant in the height direction.

The surface area variation ratio ΔS at which the silicon melt 3 abuts on the quartz crucible 1a is the ratio of the value of S13 + S7 + S8 to the value of S11 + S12 + S36 + S37 + S38, that is,
(S13 + S7 + S8) / (S11 + S12 + S36 + S37 + S38) × 100
It becomes.
Here, since S13 + S7 + S8 is 2π (R + r1 + r2) ΔH, the value of the ratio ΔS to be controlled is
2π (R + r1 + r2) / (S11 + S12 + S36 + S37 + S38) × ΔH
That is, ΔS is a function of ΔH,
ΔS = f (ΔH)
Thus, ΔS can be controlled by controlling the fluctuation amount ΔH in which the liquid surface height H of the silicon melt 3 fluctuates with respect to the upper edge of the quartz crucible 1a.

Specifically, as shown in FIG. 7, in the step of pulling up the straight body portion 6b, the additional supply of the raw material by the additional raw material supply means 30 is controlled so that the liquid of the silicon melt 3 is applied to the upper end of the quartz crucible 1a. When the amount of variation in which the surface height H varies is ΔH, the variation ratio range of ΔH is −3 to +3 mm.
Here, ΔH is set to take a positive value when the amount of stored silicon melt 3 increases and to take a negative value when the amount of silicon melt 3 decreases.

Thereby, the variation ratio range per unit time of the amount of silicon melt 3 stored in the quartz crucible 1a is set to -7 to + 7%.
The fluctuation ratio range of the silicon melt amount 3 per unit time Δt is raised as a single crystal 6 per unit time Δt, the amount W1 stored in the quartz crucible 1a at the start of the unit time Δt when the straight body 6b is pulled up. When the amount of feedstock W3 added from the additional feedstock supply means 30 per unit time Δt is the amount W2,
(W1-W2 + W3) / W1 × 100
It becomes.
Here, the unit time Δt to be controlled is set to 1 to 100 minutes.
Further, the condition that the amount W1 should satisfy with respect to the amount W0 stored in the quartz crucible 1a at the start of the pulling up of the straight barrel portion 6b is as follows.
W1 / W0 × 100 ≧ 90-95 (%)
It is.

In this way, the silicon melt 3 liquid level height fluctuation amount ΔH stored in the quartz crucible 1a is controlled as described above, and the surface area ratio ΔS at which the silicon melt 3 contacts the quartz crucible 1a is within the above range. By controlling the fluctuation ratio of the silicon melt amount 3 to be in the above range, the amount of the silicon melt 6 in which the pulled silicon single crystal 6 becomes low oxygen is maintained. In this state, the straight body portion 6b It can be done consistently. Thus, the contact area between the quartz crucible 1a and the silicon melt 3 is controlled to be constant, and the amount of oxygen dissolved from the quartz crucible 1a into the silicon melt 3 is controlled to be constant. 3 is controlled so as not to fluctuate depending on the crystal pulling length, the amount of oxygen taken into the silicon single crystal 6 from the silicon melt 3 is made constant, and a low oxygen concentration of 4.5 × 10 ¹⁷ atoms / It becomes possible to manufacture the silicon single crystal 6 that maintains the state of cm ³ or less over the entire length in the axial direction.

That is, according to the present invention, the convection state of the silicon melt is controlled, and the interstitial oxygen concentration of the single crystal is 4.5 × 10 ¹⁷ atoms / cm ³ or less over the entire length in the crystal axis direction, more preferably 0.7 × becomes possible in the range of ^{10 17 ~2.5 × 10 17 atoms /} cm 3. This makes it possible to realize a low oxygen concentration region that can be obtained only in a part of the crystal longitudinal direction in the batch type CZ method over the entire crystal longitudinal direction.

By pulling up under the above pulling conditions, the interstitial oxygen concentration in the silicon single crystal is 8.5 × 10 ¹⁷ atoms / cm ³ or less, more preferably 4.5 × 10 ¹⁷ atoms / cm ³ or less, It can be set to 2.5 × 10 ¹⁷ atoms / cm ³ or less, which can prevent generation of oxygen donor in the IGBT manufacturing process. If the interstitial oxygen concentration exceeds the above range, oxygen donors are generated in the IGBT manufacturing process, and the characteristics of the IGBT are changed.

In addition, in place of or in addition to the addition of n-type (P, As, Sb, etc.) dopant in the silicon melt, single crystal silicon to which a dopant for adjusting the formed resistivity is not added. Can be irradiated with a neutron beam. By this neutron beam irradiation, a part of silicon atoms is converted into phosphorus, whereby the single crystal silicon can be uniformly doped with phosphorus, and single crystal silicon with a uniform resistivity can be obtained. The irradiation conditions of the neutron beam may be, for example, irradiation for about 80 hours at a crystal rotation of about 2 rpm at a position where the neutron beam flux is 3.0 × 10 ¹² pieces / cm ² / s ⁻¹ . The silicon ingot thus irradiated with the neutron beam has a resistivity of about 48 Ω · cm to 52 Ω · cm.

  In order to prevent a change in the concentration of the n-type dopant, for example, the above-described DLCZ method, double doping method, or CCZ method may be employed. Furthermore, the crystal rotation speed during single crystal growth may be set to 15 rpm or more in order to suppress variation in resistivity in the wafer plane.

  Moreover, although the example which supplies the silicon | silicone of a molten state as the additional raw material supply means 30 was demonstrated, it can also be set as the structure which supplies a solid silicon raw material. In this case, the quartz crucible 1a can have an inner crucible made of quartz. At this time, the surface area of the silicon melt 3 abutting on the quartz crucible includes the amount of the inner crucible and additional feedstock. Will control the amount of.

Next, the wafer may be cut out from the single crystal silicon, and lapping or etching may be performed as necessary, and then RTA heat treatment may be performed as necessary.
When lapping, in order to prevent the wafer from cracking, it is preferable to form a front side chamfer at the peripheral edge of the wafer surface and a back side chamfer at the rear peripheral edge of the wafer.

Next, a polysilicon layer is formed on one side of the wafer. Since the silicon single crystal wafer of this embodiment has an extremely low interstitial oxygen concentration, the gettering effect due to oxygen precipitates cannot be expected. Therefore, it is necessary to form a polycrystalline silicon layer as a gettering layer on the back surface side to remove heavy metal contamination in the IGBT manufacturing process. Further, by forming the polycrystalline silicon layer on the back surface side, it is possible to prevent the occurrence of slip or the like and prevent the propagation of the slip to the wafer surface side. The thickness of the polysilicon layer is preferably in the range of 50 nm to 2000 nm. If the thickness is 50 nm or more, the gettering effect and the effect of suppressing the occurrence of slip can be sufficiently exerted, and if the thickness is 2000 nm or less, warpage of the wafer can be prevented.
Thus, the silicon single crystal wafer for IGBT of this embodiment can be manufactured.

According to the manufacturing method described above, by introducing a hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in the range of 40 Pa or more and 400 Pa or less, an allowable width of a speed at which a grown-in defect-free silicon single crystal can be pulled is increased. Thus, a wafer from which COP defects and dislocation clusters are eliminated in the entire crystal diameter direction can be easily manufactured. Also, the silicon single crystal after pulling is irradiated with neutrons to dope phosphorus, or by adding an n-type dopant such as phosphorus to the silicon melt, the variation in resistivity within the wafer surface is 5% or less. Can be. The reduction in resistivity variation can also be achieved by adding phosphorus and a p-type dopant having a segregation coefficient smaller than that of phosphorus to the silicon melt.
Further, by adding nitrogen to the silicon melt, the allowable range of the speed at which the grown-in defect-free silicon single crystal can be pulled can be further increased, and the elimination of COP defects and dislocation clusters in the wafer is facilitated. .

(Silicon single crystal wafer for IGBT)
The silicon single crystal wafer manufactured as described above is free from COP defects and dislocation clusters in the entire crystal diameter direction, and has an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less, more preferably 4.5 × 10 ¹⁷ atoms / cm ³ or less, more preferably 2.5 × 10 ¹⁷ atoms / cm ³ or less, and variation in resistivity within the wafer surface is 5% or less. The resistivity itself is about 48 Ω · cm to 52 Ω · cm. Further, the silicon single crystal wafer is doped with nitrogen of 1 × 10 ¹⁴ atoms / cm ³ or more and 5 × 10 ¹⁵ atoms / cm ³ or less.
Furthermore, in the silicon single crystal wafer of this embodiment, the pass rate of TZDB at a breakdown electric field of 8 MV / cm is 90% or more, and the concentration of oxygen donor that precipitates when heat treatment is performed at 450 ° C. for 1 hour is 9 8 × 10 ¹² pieces / cm ³ or less or 6 × 10 ¹² pieces / cm ³ or less, and the density of BMD generated when two-stage heat treatment at 800 ° C. for 4 hours and 1000 ° C. for 16 hours is 5 × 10 ⁷ pieces / cm ³ or less, and the recombination lifetime in the case of performing the two-stage heat treatment is 100 μsec or more.
Furthermore, in the silicon single crystal wafer of this embodiment, the LPD density on the wafer surface is 0.1 / cm ² and the light etching defect density is 1 × 10 ³ / cm ² or less. Furthermore, in the silicon single crystal wafer of this embodiment, a polycrystalline silicon layer having a thickness of 50 nm or more and 2000 nm or less is formed on the back surface side, and a surface chamfered portion is formed on the peripheral edge of the wafer surface. A back side chamfer is formed on the peripheral edge of the back side.

  According to the silicon single crystal wafer for IGBT of this embodiment, COP defects and dislocation clusters are eliminated in the entire crystal diameter direction, and therefore, when the gate oxide film is formed on the wafer surface in the IGBT manufacturing process, COP defects are not generated. The gate oxide film is not taken in, and the GOI is not deteriorated.

Furthermore, by eliminating COP defects and dislocation clusters throughout the crystal diameter direction, the wafer can be suitably used as an IGBT wafer, which is an element that uses the wafer in the vertical direction. That is, since COP defects and dislocation clusters are eliminated, the quality of the bulk of the wafer becomes excellent, and the recombination lifetime, which is an important characteristic for an IGBT wafer, can be improved.
Further, since the interstitial oxygen concentration is 8.5 × 10 ¹⁷ atoms / cm ³ or less, the concentration of oxygen donor generated after the heat treatment of the wafer can be suppressed to 9.8 × 10 ¹² atoms / cm ³ or less. Thus, the change in the resistivity of the wafer can be prevented, and the quality of the silicon single crystal wafer can be stabilized.
Moreover, according to the silicon single crystal wafer of the present invention, since the variation in resistivity within the wafer surface is 5% or less, the quality of the silicon single crystal wafer can be stabilized.
Further, the silicon single crystal is doped with nitrogen of 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less, or 1 × 10 ¹⁴ atoms / cm ³ or more and 5 × 10 ¹⁵ atoms / cm ³ or less. This facilitates elimination of COP defects and dislocation clusters. If the nitrogen doping amount is less than the above range, COP defects and dislocation clusters may not be completely eliminated. If the nitrogen doping amount exceeds the above range, nitrides are generated and a silicon single crystal cannot be grown.
Further, the pass rate of TZDB is 90% or more, and the concentration of oxygen donor generated when heat treatment is performed at 450 ° C. for 1 hour is 9.8 × 10 ¹² ions / cm ³ or less, or 6 × 10 ¹² ions / cm ^{3 or} less, the density of BMD precipitating when performing two-stage heat treatment of 16 hours at 4 hours and 1000 ° C. at 800 ° C. is not more 5 × 10 ⁷ / cm ³ or less, were two-stage heat treatment Since the recombination lifetime in this case is 100 μsec or more, the characteristics required for a silicon single crystal wafer for IGBT can be satisfied.

(Experimental example 1)
Silicon ingots having various interstitial oxygen concentrations were produced by the CZ method. Specifically, the polycrystalline silicon lump was put into a quartz crucible, and the polycrystalline silicon lump was heated in an argon atmosphere to obtain a silicon melt. Phosphorus was added as a dopant to the silicon melt. The amount of phosphorus added was adjusted so that the resistivity of the silicon single crystal was 65 Ω · cm. Next, the seed crystal is immersed in the silicon melt while supplying a horizontal magnetic field of 3000 G (0.3 T) from the magnetic field supply device so that the magnetic field center height is −75 to +50 mm with respect to the melt surface. Then, while rotating the seed crystal and the quartz crucible, the seed crystal was gradually pulled up to grow a single crystal under the seed crystal. The growth rate (pulling rate) of the single crystal is V (mm / min), and the ratio V / G when the temperature gradient G is 1350 ° C. from the melting point during single crystal growth is 0.185. The V was set to 0.49 mm / min. In this way, an ingot of single crystal silicon that was pulled under the pulling conditions of Conditions 1 to 4 was manufactured. The interstitial oxygen concentration in the silicon ingot was controlled by adjusting the rotation speed of the quartz crucible. In condition 4, a silicon wafer with a silicon nitride film was introduced into the silicon melt, thereby doping the silicon single crystal with 4.1 × 10 ¹⁴ atoms / cm ³ of nitrogen.

  Next, the pulled single crystal silicon ingot was sliced to cut out the wafer. The cut wafer was subjected to surface treatment such as lapping and etching. In this way, a silicon single crystal wafer having a diameter of 200 mm and a thickness of 0.75 mm was manufactured.

The obtained silicon single crystal wafer was measured for interstitial oxygen concentration and evaluated for variations in resistivity within the wafer surface. The interstitial oxygen concentration was measured according to the Fourier transform infrared spectrophotometry standardized by ASTM F-121 (1979). In addition, the resistivity variation is measured at a total of three locations, the wafer center, the middle position between the wafer center and outer periphery, and the position 5 mm from the wafer outer periphery, and the maximum and minimum values are selected from the three resistivities. A value was selected and calculated according to the formula “(maximum value−minimum value) × 100 / minimum value”. The results are shown in Table 1.
Further, Table 1 shows the allowable range of the pulling speed. This allowable width is determined by gradually reducing the pulling rate of the crystal and vertically dividing the grown crystal in the growth direction and observing the Grown-in defect distribution by Cu-decoration after X-ray topography. This is a pull-up speed margin that can eliminate COP defects and dislocation clusters in the entire crystal diameter direction by determining the dislocation cluster region by measuring light etching defects.

As shown in Table 1, it was found that the interstitial oxygen concentration can actually be reduced by reducing the crucible rotation speed from 7 rpm to 1 rpm (condition 1 → conditions 2 to 4). However, in conditions 1 and 2, although the crystal rotation speed was slow, the allowable range of the pulling speed could be secured to some extent, but the variation in resistivity was very large.
Further, comparing conditions 2 and 3, in condition 3, the variation in resistivity was reduced by increasing the rotation speed of the crystal, but the allowable range of the pulling speed was greatly reduced. This is presumably because the solid-liquid interface shape between the silicon melt and the single crystal changed due to the increase in the rotation speed of the single crystal.
Furthermore, with respect to the condition 4, the allowable range of the pulling rate was increased by doping nitrogen with respect to the condition 3, but the variation in resistivity was also increased. This is presumably because the convection state of the silicon melt was changed by nitrogen doping.

  From the above, under the pulling conditions of Conditions 1 to 4, it was difficult to simultaneously achieve reduction in interstitial oxygen concentration, reduction in variation in resistivity, and increase in the allowable range of pulling speed.

(Experimental example 2)
Silicon ingots having various interstitial oxygen concentrations were produced by the CZ method. Specifically, the polycrystalline silicon lump was put into a quartz crucible, and the polycrystalline silicon lump was heated in an argon atmosphere to obtain a silicon melt. Next, the seed crystal is immersed in the silicon melt while applying a horizontal magnetic field of 3000 G (0.3 T) from the magnetic field supply device so that the magnetic field center height is −75 to +50 mm with respect to the melt surface. Then, while rotating the seed crystal and the quartz crucible, the seed crystal was gradually pulled up to grow a single crystal under the seed crystal. The growth rate (pulling rate) of the single crystal is V (mm / min), and the ratio V / G when the temperature gradient G is 1350 ° C. from the melting point during single crystal growth is 0.185. The V was set to 0.49 mm / min. In this manner, single crystal silicon ingots pulled under the pulling conditions 5 to 14 were manufactured.

The rotation speed of the quartz crucible was 2 rpm under all conditions, and the rotation speed of the single crystal was 20 rpm under all conditions. Furthermore, in conditions 5 and 6, a silicon wafer with a silicon nitride film was introduced into the silicon melt, and nitrogen was doped into the silicon single crystal. Moreover, in conditions 7-11, hydrogen gas was introduce | transduced into argon gas atmosphere and it pulled up on the conditions of hydrogen partial pressure 30-400 Pa. Further, under conditions 12 to 14, nitrogen doping and hydrogen gas introduction were performed simultaneously. Furthermore, in conditions 7-10 and 12-13, the resistivity is adjusted by adding phosphorus to the silicon melt, and in other conditions, neutrons are applied to the single crystal silicon pulled up in the same manner as in Experimental Example 1. Irradiated with rays and doped with phosphorus. Irradiation with neutrons was performed under the condition of irradiation with a bundle of 3.0 × 10 ¹² particles / cm ² / s for 80 hours. In this way, the resistivity of the silicon single crystal was adjusted to 65 Ω · cm.

  Thereafter, a single crystal silicon ingot was sliced to cut out a wafer. The cut wafer was subjected to surface treatment such as lapping and etching. In this way, a silicon single crystal wafer having a diameter of 200 mm and a thickness of 0.75 mm was manufactured.

  For the obtained silicon single crystal wafer, the interstitial oxygen concentration was measured in the same manner as in Experimental Example 1, and the variation in resistivity within the wafer surface was evaluated. The results are shown in Table 2. Table 2 also shows the nitrogen concentration in the wafer, the hydrogen partial pressure in the atmosphere of the CZ furnace, and the conditions for the dopant introduction method. Further, similarly to Experimental Example 1, the allowable range of the pulling speed is shown at the same time.

As shown in Tables 1 and 2, the variation in resistivity deteriorated by nitrogen doping in condition 4 was improved by performing phosphorous doping by neutron irradiation as shown in conditions 5 and 6, but the allowable range of pulling rate Was not enough.
In addition, the allowable range of the pulling rate that was reduced by increasing the rotation speed of the crystal in Condition 3 was improved by introducing hydrogen into the atmosphere as shown in Conditions 8-10. As in conditions 8 to 10, while introducing a predetermined amount of hydrogen and controlling the crucible rotation speed and the single crystal rotation speed, the interstitial oxygen concentration is reduced, the resistivity variation is reduced, and the pulling speed is increased. It has been found that an increase in the allowable range can be realized simultaneously.
Also, the variation in resistivity increased by nitrogen doping in condition 4 was improved by introducing hydrogen into the atmosphere as shown in conditions 12 and 13. This is considered to be because the change in the convection state of the silicon melt caused by nitrogen doping was suppressed by introducing hydrogen. Moreover, in conditions 12 and 13, the allowable range of the pulling rate could be expanded as compared with the case of nitrogen doping alone (conditions 5 to 6) and hydrogen introduction alone (conditions 7 to 11).
Furthermore, with respect to these conditions 12 and 13, in the condition 14 in which phosphorus was introduced by neutron irradiation, the variation in resistivity was further reduced.

(Experimental example 3)
Using a transverse magnetic field MCZ furnace, using a quartz crucible with an inner diameter of 24 inches, charging 60 kg of initial polycrystalline raw material, and supplying silicon raw material with adjusted P concentration in the melt state, pulling up the Si single crystal and finally 210 mm Two crystals with a diameter of 1000 mm were produced.
Target N-type resistance: 50 Ωcm
As conditions for crystal growth, the transverse magnetic field strength was 3500 gauss, the quartz crucible rotation was 0.5 rpm, the crystal rotation was 3 to 10 rpm, and the magnetic field center position was 45 mm below the melt surface position.
The added raw material supply state at this time is shown in Table 4 and FIG.

  Thereafter, a wafer was manufactured from the grown single crystal. Table 5 shows the oxygen concentration with respect to the crystal length of the straight body portion measured in this wafer, and Table 6 shows the electrical resistivity and the resistance in-plane distribution.

The silicon single crystal grown above had an oxygen concentration of 1.5 to 2.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) in the entire region of the crystal body. The portion containing neither COP nor dislocation clusters was 800 mm or more (810 mm, 840 mm) for both crystals.
Also, the resistivity was in the range of 48 to 52 Ωcm over the entire area of the crystal body. The RRG indicating the in-plane distribution was in the range of 4% or less.

(Experimental example 4)
(Example of changing the target resistivity: 100 Ωcm)
Using a transverse magnetic field MCZ furnace, using a quartz crucible with an inner diameter of 24 inches, charging 60 kg of initial polycrystalline raw material, and supplying silicon raw material with adjusted P concentration in the melt state, pulling up the Si single crystal and finally 210 mm Two crystals with a diameter of 1000 mm were produced.
Target N-type resistance: 100 Ωcm
As conditions for crystal growth, the transverse magnetic field strength was 3500 gauss, the quartz crucible rotation was 0.5 rpm, the crystal rotation was 3 to 10 rpm, and the magnetic field center position was 45 mm below the melt surface position.
The added raw material supply state at this time is shown in Table 7 and FIG.

  Thereafter, a wafer was manufactured from the grown single crystal. Table 8 shows the oxygen concentration with respect to the crystal length of the straight body portion measured in this wafer, and Table 9 shows the electrical resistivity and the resistance in-plane distribution.

The silicon single crystal grown above had an oxygen concentration of 1.5 to 2.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) in the entire region of the crystal body. The portion containing neither COP nor dislocation clusters was 800 mm or more (810 mm, 840 mm) for both crystals.
In addition, both the resistivity values were in the range of 97 to 106 Ωcm over the entire area of the crystal body. The RRG indicating the in-plane distribution was in the range of 4% or less.

(Experimental example 5)
(Example of P gas doping)
Using a transverse magnetic field MCZ furnace, using a quartz crucible with an inner diameter of 24 inches, charging 60 kg of the initial polycrystalline material, mixing a gas containing P into the atmosphere in the furnace, and doping the crystal with P gas dope. While supplying high-purity silicon raw material in the melt state, the Si single crystal was pulled up to finally produce two crystals of 210 mm diameter × 1000 mm.
Target N-type resistance: 100 Ωcm
As conditions for crystal growth, the transverse magnetic field strength was 3500 gauss, the quartz crucible rotation was 0.5 rpm, the crystal rotation was 3 to 10 rpm, and the magnetic field center position was 45 mm below the melt surface position.
The added raw material supply state at this time is shown in Table 10 and FIG.

  Thereafter, a wafer was manufactured from the grown single crystal. Table 11 shows the oxygen concentration with respect to the crystal length of the straight body portion measured in this wafer, and Table 12 shows the electrical resistivity and the resistance in-plane distribution.

The silicon single crystal grown above had an oxygen concentration of 1.5 to 2.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) in the entire region of the crystal body. The portion containing neither COP nor dislocation clusters was 800 mm or more (810 mm, 840 mm) for both crystals.
Also, the resistivity was in the range of 97 to 105 Ωcm over the entire area of the crystal body. The RRG indicating the in-plane distribution was in the range of 4% or less.

(Experimental example 6)
(Example of continuous crucible method of double crucible method)
Using a transverse magnetic field MCZ furnace, using a quartz crucible with an inner diameter of 24 inches, charging 60 kg of initial polycrystalline raw material, and supplying silicon raw material with adjusted P concentration to the outer crucible of the double crucible in a solid state, Si single crystal Finally, two crystals of 210 mm diameter × 1000 mm were produced.
Target N-type resistance: 100 Ωcm
As conditions for crystal growth, the transverse magnetic field strength was 3500 gauss, the quartz crucible rotation was 0.5 rpm, the crystal rotation was 3 to 10 rpm, and the magnetic field center position was 45 mm below the melt surface position.
The added raw material supply state at this time is shown in Table 13 and FIG.

  Thereafter, a wafer was manufactured from the grown single crystal. Table 14 shows the oxygen concentration with respect to the crystal length of the straight body portion measured in this wafer, and Table 15 shows the electrical resistivity and the resistance in-plane distribution.

The silicon single crystal grown above had an oxygen concentration in the range of 1.5 to 2.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) over the entire area of the crystal body. The portion containing neither COP nor dislocation clusters was 800 mm or more (810 mm, 840 mm) for both crystals.
In addition, both the resistivity values were in the range of 96 to 104 Ωcm over the entire area of the crystal body. The RRG indicating the in-plane distribution was in the range of 4% or less.

(Experimental example 7)
Next, an experiment on the fluctuation range of ΔH was performed.
As the same pulling conditions as in Example 3, the height position ΔH of the liquid surface position was intentionally varied greatly. The results are shown in Table 16 and FIG.

  As a result, it can be seen that if the control of the height position of the liquid surface is within a range of ± 3 mm, no crystal defect is detected, and if the height position of the liquid surface fluctuates further, a crystal defect is detected. Further, it can be seen that when the control of the height position of the liquid level exceeds the range of ± 3 mm, an undesirable defect occurs, and the performance as a silicon single crystal wafer for IGBT is greatly deteriorated.

(Experimental example 8)
Next, an experiment on the fluctuation range of ΔS was performed.
As the same pulling conditions as in Example 3, the height position of the liquid surface position was intentionally changed greatly, and the change ratio ΔS of the surface area at which the silicon melt contacted the crucible was changed greatly, and the change in the oxygen concentration was measured.
The results are shown in Table 17 and FIG.

As a result, as shown in FIG. 15, when ΔS exceeds 7%, the oxygen concentration greatly changes and deviates from a preferable range of 4.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) or less. I understand. Therefore, it can be seen that the range of ΔS is preferably in the range of −7% to + 7%.

(Experimental example 9)
Next, for comparison, an experiment was conducted without additional supply of raw materials.
As the pulling conditions, except that the initial charge amount was 100 kg, the pulling was performed under the same conditions as in Example 3, and in the wafer manufactured from the grown single crystal, the change in oxygen concentration with respect to the measured crystal length of the straight body portion was measured. Table 18 and FIG. 16 show the electrical resistivity and resistance in-plane distribution in Table 19 and FIG.

From these results, it can be seen that when the additional supply of the raw material is not performed, the portion that becomes low oxygen is limited, and in particular, the oxygen concentration is 1 × 10 ¹⁷ atoms / cm ³ or less in a very narrow range. Although there is a region, it can be seen that the oxygen concentration region of 4.5 × 10 ¹⁷ atoms / cm ³ or less is about half of the entire crystal length.
In addition, the resistance distribution in the longitudinal direction of the crystal has a small segregation of the dopant for adjusting the electrical resistivity (P: 0.3), so that the resistivity is drastically reduced, and the yield is reduced in the case of a product with a narrow resistance range I understand.

From these results, in order to stably obtain a wafer having an oxygen concentration in the range of 4.5 × 10 ¹⁷ atoms / cm ³ (oldASTM) or less as in Experimental Examples 7 and 8, the height position of the liquid surface position is obtained. It can be seen that the variation range of ΔH needs to be in the range of −3 to +3 mm and / or the variation ratio ΔS of the surface area at which the silicon melt contacts the crucible needs to be in the range of −7 to + 7%. .

It is possible to provide a method for manufacturing a silicon single crystal wafer for IGBT and a silicon single crystal wafer for IGBT capable of expanding a pulling speed margin and manufacturing a wafer having low oxygen and small variation in resistivity at low cost. .

Claims (12)

A method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal from a silicon melt by the Czochralski method,
When an n-type dopant is added to the silicon melt and the single crystal is grown at a speed at which the growth rate of the silicon single crystal can be pulled up by a grown-in defect-free silicon single crystal,
An IGBT silicon single crystal wafer characterized by growing the single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less while filling an initial polycrystalline material and supplying an additional material. Production method. A method for producing a silicon single crystal wafer for IGBT obtained by growing a silicon single crystal by the Czochralski method,
In the silicon melt, phosphorus is 2.9 × 10 ¹³ atoms / cm ³ or more and 2.9 × 10 ¹⁵ atoms / cm ³ or less, and a p-type dopant having a segregation coefficient smaller than that of phosphorus is crystallized according to the segregation coefficient. The concentration of the silicon single crystal is added so that the concentration is 1 × 10 ¹³ atoms / cm ³ or more and 1 × 10 ¹⁵ atoms / cm ³ or less, and the pulling speed of the silicon single crystal is increased so that a grown-in defect-free silicon single crystal can be pulled. So when growing single crystals,
After filling the initial polycrystalline material, the single crystal having an interstitial oxygen concentration of 8.5 × 10 ¹⁷ atoms / cm ³ or less is grown while supplying an additional material while controlling the dopant concentration to be the above concentration. A method of manufacturing a silicon single crystal wafer for IGBT, which is characterized by the above. When growing the straight body of silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the fluctuation ratio range of the surface area where the silicon melt contacts the crucible is -7 to + 7%, and the convection state of the silicon melt is controlled to reduce the interstitial oxygen concentration of the single crystal to 0. The manufacturing method of the silicon single crystal wafer for IGBT according to claim 1 or 2, wherein the range is from 7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ . When growing the straight body of silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the fluctuation range of the liquid surface height of the silicon melt with respect to the upper end of the crucible is -3 mm to +3 mm, and the convection state of the silicon melt is controlled to control the interstitial oxygen concentration of the single crystal. The manufacturing method of the silicon single crystal wafer for IGBT according to claim 1 or 2, wherein the range is 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ . When growing the straight body of silicon single crystal from the Czochralski method,
The supply of the additional raw material is controlled so that the fluctuation ratio range of the silicon melt amount is −7 to + 7%, and the convection state of the silicon melt is controlled, so that the interstitial oxygen concentration of the single crystal is 0.7 × 10 ^17. 3. The method for producing a silicon single crystal wafer for IGBT according to claim 1, wherein the range is from −4.5 × 10 ¹⁷ atoms / cm ³ .   6. The method for producing a silicon single crystal wafer for IGBT according to claim 1, wherein the silicon material added and supplied when growing the single crystal is a melting material or a solid material. With respect to the silicon melt for growing a silicon single crystal by the Czochralski method, the nitrogen incorporated into the crystal is at a concentration of 1 × 10 ¹³ atoms / cm ³ or more and 5 × 10 ¹⁴ atoms / cm ³ or less. The method for producing a silicon single crystal wafer for IGBT according to any one of claims 1 to 6, which is added. When growing a silicon single crystal by the Czochralski method,
8. The silicon single crystal wafer for IGBT according to claim 1, wherein a hydrogen atom-containing substance having a hydrogen gas equivalent partial pressure in a range of 40 Pa to 400 Pa is introduced into the atmosphere gas in the CZ furnace. Manufacturing method.   When a silicon single crystal is grown by the Czochralski method, a high-resistance silicon single crystal ingot that is 1000 Ωcm or more and 10,000 Ωcm or less is pulled up in advance without adjusting the resistivity by adding an n-type dopant to the silicon melt, 9. The method of manufacturing a silicon single crystal wafer for IGBT according to claim 1, wherein the resistivity is adjusted so as to be within a desired resistance range by neutron irradiation. A silicon single crystal wafer for IGBT consisting of a silicon single crystal grown by the Czochralski method, manufactured by the manufacturing method according to claim 1,
The variation of the interstitial oxygen concentration in the axial direction of the straight body portion of the silicon single crystal is in the range of 0.7 × 10 ^{17 to} 4.5 × 10 ¹⁷ atoms / cm ³ . Silicon single crystal wafer. 11. The silicon single crystal wafer for IGBT according to claim 10, wherein the LPD density on the wafer surface is 0.1 piece / cm ² or less and the light etching defect density is 1 × 10 ³ pieces / cm ² or less. . 12. The IGBT silicon single crystal wafer according to claim 10 or 11, wherein a polycrystalline silicon layer having a thickness of 50 nm to 1000 nm is formed on the back surface side.

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