JPWO2007141847A1 - Display device - Google Patents

Abstract

In the display device (10), a plurality of pairs of display electrodes (2; (X1, Y1) to (Xj, Xn)) of a plurality of units are electrically connected to have a length corresponding to the plurality of units. ing. One scan driving circuit (700) displays one of the display electrode pairs of the plurality of pairs of display electrodes at the boundary between two adjacent units (321, 322) of the plurality of units. A scanning voltage is applied to the electrodes (Y1 to Yn), and a sustain voltage pulse is applied to one of the display electrodes. [Selection] Figure 9

Description

  The present invention relates to a large display device, and more particularly to electrical connection of a scanning pulse circuit of a large display device including a plurality of plasma tube arrays each having a phosphor layer therein.

  A plasma display panel (PDP) generates a plasma discharge in a closed discharge space of a large number of vertical and horizontal small cells, and excites a phosphor with 147 nm ultraviolet light emitted from the discharge plasma to emit light. The cell space is formed between two stacked flat glass plates. On the other hand, in the plasma tube array (PTA), a phosphor layer is formed in an elongated glass tube or a support member on which the phosphor layer is formed is inserted to form a large number of cell spaces in the tube. By arranging a large number of such plasma tubes, a large display screen of, for example, 6 m × 3 m can be formed. In a normal plasma tube array, a sustain voltage pulse for the X electrode is applied from the X electrode driver device, and the sustain voltage pulse circuit for the Y electrode of the Y electrode driver device passes through the scan driver circuit of the Y electrode driver device. A sustain voltage pulse for the Y electrode is applied.

Japanese Unexamined Patent Application Publication No. 2004-178854 (Patent Document 1) describes an arc tube array type display device. The arc tube array type display device includes an arc tube array constituting a display screen, an arc tube array supported from the display surface side and the back side, and a number of electrodes for applying a voltage to the arc tube. Supports formed in stripes on the opposing surface, terminal electrode lead portions provided on the support outside the display area of the display screen, and relay electrode lead portions provided on the support within the display area of the display screen; A first driver that applies a voltage to the terminal electrode lead-out portion, and a second driver that applies a voltage to the relay electrode lead-out portion. Accordingly, even a display device having a large screen size has an electrode structure that does not cause a voltage drop, thereby preventing uneven brightness of the display device.
JP 2004-178854 A

  In a large display device comprising a plurality of juxtaposed plasma tube arrays having drive circuits for the respective X electrodes and Y electrodes, the length of the display electrode increases as the size increases, and the resistance of the display electrode increases. Inductance and / or capacitance components increase. When the inductance of the display electrode from the position where the pulse voltage is applied to the position of the cell is increased, the waveform and effective voltage value of the applied voltage pulse for address discharge and sustain discharge may be affected. If the rise delay time of the address voltage pulse is increased due to the distortion of the pulse waveform, the duration of the effective applied voltage pulse applied to the light emitting cell is shortened, and therefore the cell is liable to fail the sustain discharge. In addition, when the resistance of the display electrode increases from the pulse voltage application position to the cell position, the voltage drop increases and the effective voltage difference between the cells increases. .

  In order to prevent such an increase in the inductance and resistance of the display electrode, the width or thickness of the display electrode is usually increased, but the light shielding rate of the display electrode is increased, and thus the luminous efficiency of the display device is decreased. As a result, the display image quality may deteriorate.

  Inventors designed the layout and connection of scanning circuits to multi-unit plasma tube arrays in an advantageous form in a large display device consisting of juxtaposed multi-unit plasma tube arrays with drive circuits By doing so, it was recognized that the failure of address discharge and the accompanying failure of sustain discharge in each unit can be greatly reduced, thereby reducing the luminance unevenness of the display.

  An object of the present invention is to reduce luminance unevenness in a large display device composed of a plurality of units.

  Another object of the present invention is to reduce address discharge failures in a large display device composed of a plurality of units.

  Still another object of the present invention is to prevent a synchronization deviation of scan pulses of a plurality of scan driving circuits of a large display device composed of a plurality of units.

  According to a feature of the present invention, a display device includes a phosphor layer formed therein, a discharge gas sealed therein, and a plurality of gas discharge tubes each having a plurality of light emitting points in the longitudinal direction. A plurality of pairs of display electrodes are arranged on the display surface side of the gas discharge tube, and a plurality of signal electrodes are arranged on the back side of the gas discharge tubes. The plurality of pairs of display electrodes of the plurality of units are electrically connected to have a length corresponding to the plurality of units. The display device applies a scanning voltage to one of the display electrode pairs of the plurality of pairs of display electrodes of the plurality of units in the first period, and the one display electrode in the second period. At least one scan driving circuit for applying a sustain voltage pulse to the other display electrode of each of the plurality of pairs of display electrodes of the plurality of units in the second period. And at least one sustain voltage circuit for applying a potential. The one scanning drive circuit applies a scanning voltage to one of the display electrode pairs of the plurality of pairs of display electrodes at a boundary between two adjacent units of the plurality of units. Then, a sustain voltage pulse is applied to one of the display electrodes.

  According to another feature of the invention, another scan drive circuit in the plurality of scan drive circuits is configured such that the plurality of scan drive circuits at the boundary between two other adjacent units in the plurality of units. A scanning voltage is applied to one of the display electrode pairs of the pair of display electrodes, and a sustain voltage pulse is applied to the one display electrode. Each scan voltage pulse of the one scan drive circuit and the other one scan drive circuit has a period between adjacent scan voltage pulses to prevent a synchronization shift with the other scan voltage pulse.

  According to the present invention, luminance unevenness can be reduced in a large display device composed of a plurality of units, failure of address discharge can be reduced, and a plurality of scan drive circuits of a large display device composed of a plurality of units can be reduced. It is possible to prevent the scan pulse from being out of synchronization.

  Embodiments of the present invention will be described with reference to the drawings. In the drawings, similar components are given the same reference numerals.

  FIG. 1 illustrates a schematic partial structure of a unit 300 of an array of plasma tubes or gas discharge tubes 11R, 11G and 11B, typically for a color display. In FIG. 1, a plasma tube array (PTA) unit 300 comprises a transparent elongated color plasma tube 11R, 11G and 11B array, transparent front support sheet or thin substrate arranged in parallel to each other. A front-side support substrate 31, a transparent or opaque back-side support sheet or back-side support substrate 32 made of a thin substrate, a plurality of display electrode pairs or main electrode pairs 2, and a plurality of signal electrodes or address electrodes 3. It is out. In FIG. 1, X represents a sustain electrode or X electrode of the display electrode 2, and Y represents a scan electrode or Y electrode of the display electrode 2. R, G, and B indicate red, green, and blue, which are emission colors of the phosphor. The support substrates 31 and 32 are made of, for example, a flexible PET film or glass.

  The narrow tubes 20 of the elongated plasma tubes 11R, 11G, and 11B are made of a transparent insulator such as borosilicate glass, Pyrex (registered trademark), soda glass, quartz glass, or zerodur, and typically have a tube diameter. 2 mm or less, for example, the tube has a width of about 1 mm and a height of about 0.55 mm, a length of 300 mm or more, and a tube wall thickness of about 0.1 mm.

  Support members formed with phosphor layers 4 of red, green, and blue (R, G, B) are inserted and arranged on the back side inside the plasma tubes 11R, 11G, and 11B, respectively. Introduced and sealed at both ends. An electron emission film 5 made of MgO is formed on the inner surfaces of the plasma tubes 11R, 11G, and 11B. The phosphor layers R, G, B typically have a thickness in the range of about 10 μm to about 50 μm.

  The support member is made of an insulator such as borosilicate glass, Pyrex (registered trademark), quartz glass, soda glass, and lead glass, as in the case of the plasma tubes 11R, 11G, and 11B. A body layer 4 is formed. The support member is disposed outside the glass tube by applying a phosphor paste on the support member, firing it to form the phosphor layer 4 on the support member, and then inserting the support member into the glass tube. can do. As such phosphor paste, various phosphor pastes known in the art can be used.

  The electron emission film 5 generates electrons by collision with the charged particles of the discharge gas. The phosphor layer 4 is excited by vacuum ultraviolet light generated by de-excitation of the discharge gas enclosed in the tube excited by applying a voltage to the display electrode pair 2, and generates visible light.

  FIG. 2A shows a front support substrate 31 on which a plurality of transparent display electrode pairs 2 are formed. FIG. 2B shows a back side support substrate 32 on which a plurality of signal electrodes 3 are formed.

  The signal electrode 3 is formed on the front surface, that is, the inner surface of the back support substrate 32, and is provided along the longitudinal direction of the plasma tubes 11R, 11G, and 11B. The pitch between adjacent signal electrodes 3 is substantially the same as the width of each of the plasma tubes 11R, 11G, and 11B, and is, for example, 1 mm. The plurality of display electrode pairs 2 are formed on the back surface, that is, the inner surface of the front-side support substrate 31 in a known form, and are arranged in a direction that intersects the signal electrodes 3 at a right angle. The width of the display electrode 2 is, for example, 0.75 mm, and the distance between the edges of each pair of display electrodes 2 is, for example, 0.4 mm. A distance serving as a non-discharge region or a non-discharge gap is secured between the display electrode pair 2 and the adjacent display electrode pair 2, and the distance is, for example, 1.1 mm.

  The signal electrode 3 and the display electrode pair 2 are brought into contact with the lower outer peripheral surface portion and the upper outer peripheral surface portion of the plasma tubes 11R, 11G, and 11B when the PTA unit 300 is assembled. In order to improve the adhesion, an adhesive may be interposed between each electrode and the plasma tube surface to bond them.

  When the PTA unit 300 is viewed from the front, the intersection of the signal electrode 3 and the display electrode pair 2 becomes a unit light emitting region. In the display, one of the display electrode pairs 2 is used as the scanning electrode Y, a selective discharge is generated at the intersection of the scanning electrode Y and the signal electrode 3, and a light emitting region is selected. By using wall charges formed on the inner surface of the tube, a display discharge is generated at the display electrode pair 2 to emit light from the phosphor layer. The selective discharge is a counter discharge generated in the plasma tubes 11R, 11G, and 11B between the scanning Y electrode and the signal electrode 3 facing each other in the vertical direction. The display discharge is a surface discharge generated in the plasma tubes 11R, 11G and 11B between a pair of display electrodes arranged in parallel on a plane.

  The display electrode pair 2 and the signal electrode 3 can generate a discharge in the discharge gas inside the tube by applying a voltage. In FIG. 1, the electrode structure of the plasma tubes 11R, 11G, and 11B is a structure in which three electrodes are arranged in one light emitting portion, and a display discharge is generated by the display electrode pair 2. However, the present invention is not limited thereto, and a structure in which display discharge is generated between the display electrode 2 and the signal electrode 3 may be employed. That is, an electrode structure in which the display electrode pair 2 is one and a selective discharge and a display discharge (opposite discharge) are generated between the display electrode 2 and the signal electrode 3 using the display electrode 2 as a scanning electrode may be used.

FIG. 3 shows the structure of a cross section perpendicular to the longitudinal direction of the tubes of the plasma tube array 11 of the PTA unit 300. In the PTA unit 300, the plasma tubes 11R, 11G, and 11B have phosphor layers 4R, 4G, and 4B formed on the inner surfaces of the back support members 6R, 6G, and 6B, and have a cross-sectional width of 1.0 mm. And a thin tube having a cross-sectional height of 0.55 mm, a tube wall thickness of 0.1 mm, and a length of 1 m to 3 m. As an example, the red phosphor 4R includes a yttria-based ((Y.Ga) BO ₃ : Eu) material, and the green phosphor 4G includes a zinc silicate-based (Zn ₂ SiO ₄ : Mn) material. The blue phosphor 4B includes a BAM-based (BaMgAl ₁₀ O ₁₇ : Eu) material.

  In FIG. 3, the back side support substrate 32 is bonded to the bottom surfaces of the plasma tubes 11R, 11G, and 11B via an adhesive layer. Signal electrodes 3R, 3G, and 3B are disposed on the bottom surfaces of the plasma tubes 11R, 11G, and 11B and on the top surface of the back-side support substrate 32.

  FIG. 4 shows electrical connections of the X electrode driver circuit board 500, the Y electrode driver circuit 700, the address electrode driver circuit (AD) 46, and the driver control circuit 42 on the back surface of the PTA unit 300 of the normal display device 10. Yes.

  FIG. 5 shows the sustain voltage pulse circuit (SST) 60 and scan pulse circuit (SCN) 70 for the Y electrode in the normal Y electrode driver circuit 700 connected to the PTA unit 300, and the X electrode driver circuit board 500. The schematic structure of the sustain voltage pulse circuit 50 for X electrodes is shown.

  Sustain voltage pulse circuit (SST) 50 includes a bias voltage source Vs connected to X electrodes X1 to Xn via a switch, and a ground potential GND connected to X electrodes X1 to Xn via a switch.

  Sustain voltage pulse circuit (SST) 60 includes a high pulse voltage source Vs connected to scan pulse circuit (SCN) 70 via a switch, and a ground potential GND connected to scan pulse circuit 70 via a switch. Yes. Scan pulse circuit (SCN) 70 couples pulse voltage source Vs and ground potential GND to Y electrodes Y1-Yn. The scan pulse circuit 70 further includes a bias voltage source Vsc connected to the Y electrodes Y1 to Yn via the switches, and a scan pulse power supply −Vy connected to the Y electrodes Y1 to Yn via the switches.

  Referring to FIG. 4, in the display device 10, the X electrodes of the n pairs of display electrodes 2 (X1, Y1) to (Xn, Yn) of the PTA unit 300 are connected to the flexible cable 500FC from the right side of the front support substrate 31. Is connected to the sustain voltage pulse circuit 50 for the X electrode on the X electrode driver circuit board 500, and the Y electrode is connected to the Y electrode of the Y electrode driver circuit 700 from the left side of the front support board 31 via the flexible cable 70FC. The scan pulse circuit 70 on the high voltage circuit board 600 is connected. The sustain voltage pulse circuit 60 for the Y electrode on the Y electrode driver circuit 700 is connected to the scan pulse circuit 70 via a flexible cable. The m signal electrodes 3 A1 to Am of the PTA unit 300 are connected to the address driver circuit 46 via the flexible cable 46FC from the bottom side of the back support substrate 32. The X electrode driver circuit board 500 further includes a reset circuit (RST) 51. The Y high voltage circuit board 600 further includes a reset circuit (RST) 61. The driver control circuit 42 is connected to the X electrode driver circuit board 500, the Y electrode high voltage circuit board 600 of the Y electrode driver circuit 700, and the address driver circuit 46. A power source (PS) 40 that supplies power to the circuits 42, 46, 500, and 700 is further provided on the back surface of the PTA unit 300.

Next, an example of a driving method of a general plasma tube array type AC gas discharge display device will be described. One picture (video) is typically composed of one frame period. In interlaced scanning, one frame is composed of two fields, and in progressive scanning, one frame is composed of one field. Further, in order to display a moving image by a normal television system, it is necessary to display 30 frames per second. Therefore, in the display by this kind of gas discharge display device 10, in order to perform color reproduction with gradation by binary light emission control, typically such one field F is made into a set of q subfields SF. replace. Often, these subfields SF are in turn 2 ⁰ , 2 ¹ , 2 ² ,. . . 2 Set the number of display discharges in each subfield SF with different weights such as ^q-1 . Brightness setting in N (= 1 + 2 ¹ +2 ² + ... + 2 ^q-1 ) steps can be performed for each color of R, G, and B by a combination of light emission / non-light emission in units of subfields. A field period Tf, which is a field transfer period, is divided into q subfield periods Tsf in accordance with such a field configuration, and one subfield period Tsf is assigned to each subfield SF. Further, the subfield period Tsf is divided into a reset period TR for initialization, an address period TA for addressing, and a display period TS for light emission by sustain discharge. Typically, the length of the reset period TR and the address period TA is constant regardless of the weight, whereas the number of pulses in the display period TS increases as the weight increases, and the length of the display period TS increases. So long. In this case, the length of the subfield period Tsf is longer as the weight of the corresponding subfield SF is larger.

  FIG. 6 illustrates a schematic drive sequence of output drive voltage waveforms of the X electrode driver circuit board 500, the Y electrode driver circuit 700, and the address driver circuit 42 in the normal display device 10. The illustrated waveform is an example, and the amplitude, polarity, and timing can be changed variously.

  The order of the reset period TR, the address period TA, and the sustain period TS is the same in the q subfields SF, and the driving sequence is repeated for each subfield SF. In the reset period TR of each subfield SF, a negative pulse Prx1 and a positive pulse Prx2 are sequentially applied to all the display electrodes X, and a positive pulse Pry1 is applied to all the display electrodes Y. A negative pulse Pry2 is applied in order. The pulses Prx1, Pry1, and Pry2 are ramp waveforms or blunt wave pulses that gradually increase in amplitude at the rate of change at which minute discharge occurs. The first applied pulses Prx1 and Pry1 are applied in order to once generate moderate wall charges of the same polarity in all the discharge cells regardless of light emission / non-light emission in the previous subfield SF. Subsequently, by applying the pulses Prx2 and Pry2 to the discharge cell in which an appropriate wall charge exists, the wall charge is adjusted so as to be reduced to a level (erase state) that is not redischarged by the sustain pulse. The drive voltage applied to the cell is a combined voltage representing the difference in the amplitude of the pulses applied to the display electrodes X and Y.

In the address period TA, wall charges necessary for maintaining the discharge are formed only in the discharge cells that emit light. With all display electrodes X and all display electrodes Y biased to a predetermined potential, a negative scan pulse -Vy is applied to the display electrode Y corresponding to the selected row for each row selection period (scanning time for one row). Apply. Simultaneously with this row selection, the address pulse Va is applied only to the address electrode A corresponding to the selected cell in which the address discharge is to be generated. In other words, to control the binary potentials of the address electrodes A ₁ to A _m for each scanning line based on the subfield data Dsf for m columns worth of the selected row j. As a result, an address discharge is generated in the discharge tube between the display electrode Y and the address electrode A in the selected cell. Display data written by the address discharge is stored in the form of wall charges on the cell inner wall of the discharge tube, and the surface discharge between the display electrodes XY is generated by the subsequent application of the sustain pulse.

  In the sustain period TS, a sustain pulse Ps having a polarity (positive in the example shown in the figure) that is added to the wall charges generated in the previous address discharge to generate a sustain discharge is applied. Thereafter, the sustain pulse Ps is alternately applied to the display electrode X and the display electrode Y. The amplitude of the sustain pulse Ps is the sustain voltage Vs. By applying the sustain pulse Ps, a surface discharge is generated in a discharge cell in which a predetermined wall charge remains. The number of times the sustain pulse Ps is applied corresponds to the weight of the subfield SF as described above. Note that the address electrode A may be biased to the voltage Vas having the same polarity as the sustain pulse Ps in order to prevent unnecessary counter discharge throughout the sustain period TS.

  FIG. 7 shows the electrical arrangement of the X electrode driver circuit board 500, the Y electrode driver circuit 700, and the two address electrode driver circuits (AD) 46 on the back surface of two PTA units 301 and 302 arranged adjacent to each other in the normal display device 12. Indicates a connection.

  The PTA unit 301 has a power source 40, a driver control circuit 42, an address driver circuit 46 for the PTA unit 301, and an X electrode driver circuit board 500 on the back surface thereof. The PTA unit 302 has an address driver circuit 46 for the PTA unit 302 and a Y electrode driver circuit 700 on the back surface thereof. The X electrodes of the n display electrode pairs 2 (X1, Y1) to (Xn, Yn) of the PTA unit 301 are connected to the X electrode driver circuit substrate 500 from the right side of the front support substrate 31 through a flexible cable. . The Y electrodes of the n pairs of display electrodes 2 (X1, Y1) to (Xn, Yn) of the PTA unit 302 are scanned pulse circuits 70 of the Y electrode driver circuit 700 from the left side of the front support substrate 31 via a flexible cable. Connected to. Each of the PTA units 301 and 302 has a horizontal width of Ly, and therefore the length of the display electrode pair 2 of each PTA unit has a Ly. The length of Ly is a value in the range of 0.5 to 2.0 m, for example.

  FIG. 8 shows the waveform of the scanning voltage pulse −Vy along the longitudinal direction of the scanning electrode Yj of the display electrode pair 2 extending across the two adjacent PTA units 301 and 302 of the display device 12.

  The scan voltage pulse −Vy applied to the scan electrode Yj from the scan pulse circuit 70 in the scan period TS has a trapezoidal waveform close to a rectangle, but the distance in the longitudinal direction of the scan electrode Yj (D = 0 to D = 2Ly). As it becomes longer, it has a more distorted waveform such that its inductance component causes more ringing and its electrical resistance makes its height smaller. Accordingly, in the discharge cell of the scan electrode Yj portion in the PTA unit 301 at the position farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied (D = 2Ly), the scan voltage pulse − Address discharge may fail because the effective width and height of Vy are insufficient. Thereby, such a cell may fail to sustain discharge in the subsequent sustain period TS.

  FIG. 9 shows an X electrode driver circuit board 500 on the back right side of the PTA unit 321, a Y electrode driver circuit 700 on the back left side of the PTA unit 321, and the PTA units 321 and 322 in the display device 102 according to the embodiment of the present invention. An example of electrical connection of two address electrode driver circuits (AD) 46 on the lower back side is shown.

  In the display device 102, the PTA units 321 and 322 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at the boundary between them. The X electrodes of the n pairs of display electrodes 2 (X1, Y1) to (Xn, Yn) of the PTA unit 321 are X electrodes from the end of the front support substrate 31 on the right side of the PTA unit 321 via the flexible cable 500FC. The sustain voltage pulse circuit 50 (FIG. 4) for the X electrode on the driver circuit board 500 is connected. The Y electrode is connected to the scan pulse circuit 70 of the Y electrode driver circuit 700 through the flexible cable 700FC from the portion of the front support substrate 31 on the boundary between the left side of the PTA unit 321 and the right side of the PTA unit 322. . The Y electrode high voltage circuit board 600 of the Y electrode driver circuit 700 is connected to the scan pulse circuit 70 via a flexible cable. The m signal electrodes 3 A1 to Am of the PTA unit 321 are connected to the address driver circuit 46 of the PTA unit 321 through the flexible cable 46FC from the end of the back support substrate 32 at the bottom of the PTA unit 321.

  The driver control circuit 42 is connected to the X electrode driver circuit board 500, the Y electrode high voltage circuit board 600 of the Y electrode driver circuit 700, and the address driver circuit 46 of the PTA unit 321 via respective cables. On the back surface of the PTA unit 321, a power source (PS) 40 that supplies power to the circuits 42, 46, 500, and 700 is further provided. The m signal electrodes 3 A1 to Am of the PTA unit 322 are connected to the address driver circuit 46 of the PTA unit 322 via the flexible cable 46FC from the end of the back support substrate 32 on the bottom side of the PTA unit 322. The driver control circuit 42 is further connected to the address driver circuit 46 of the PTA unit 322 via a cable indicated by a one-dot chain line.

  Since the scan pulse circuit 70 applies the scan voltage pulse -Vy in parallel to two portions of the length Ly of the Y electrodes of length 2Ly at the boundary between the PTA units 321 and 322, The length of the Y electrode is equal to the horizontal width Ly of each of the PTA units 321 and 322, and is half of that in the case of FIG. 9 (2Ly). Therefore, in the discharge cell of the Y electrode portion in each of the PTA units 321 and 322 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied, the scan voltage pulse −Vy Since the effective width and height are sufficient, the possibility of successful address discharge is increased.

  FIG. 10 shows two X electrode driver circuit boards 500 on the back right side of the PTA unit 321 and the back left side of the PTA unit 327 and the Y electrode on the back left side of the PTA unit 321 in the display device 104 according to another embodiment of the present invention. An example of electrical connection of the driver circuit 700 and two address electrode driver circuits (AD) 46 on the lower back side of the PTA units 321 and 322 is shown.

  In the display device 104, the PTA units 321 and 327 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at the boundary between them. The electrical connection of the X electrode driver circuit board 500, the Y electrode driver circuit 700, and the address electrode driver circuit (AD) 46 with respect to the PTA unit 321 is the same as in FIG. The X electrodes of the n pairs of display electrodes 2 (X1, Y1) to (Xn, Yn) of the PTA unit 327 are connected to the PTA unit 327 through the flexible cable 500FC from the end of the front support substrate 31 on the left side of the PTA unit 327. Are connected to the X electrode driver circuit board 500 on the back surface of the substrate. The m signal electrodes 3A1 to Am of the PTA unit 327 are connected to the address driver circuit 46 of the PTA unit 327 through the flexible cable 46FC from the end of the back support substrate 32 at the bottom of the PTA unit 327. The driver control circuit 42 is further connected to the X electrode driver circuit board 500 and the address driver circuit 46 of the PTA unit 322 via a cable indicated by a one-dot chain line.

  Since the scanning pulse circuit 70 applies the scanning voltage pulse -Vy to two portions of the length Ly of the Y electrodes having a length of 2 Ly at the boundary between the PTA units 321 and 327, the Y electrode from the boundary. Is equal to the lateral width Ly of each of the PTA units 321 and 327. Therefore, in the discharge cell of the Y electrode portion in each of the PTA units 321 and 327 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied, the scan voltage pulse −Vy Since the effective width and height are sufficient, the possibility of successful address discharge is increased.

  FIG. 11 shows an X electrode driver circuit board 500 on the rear right side of the PTA unit 33, a Y electrode driver circuit 700 on the left rear side of the PTA unit 331, and the PTA unit 331 in the display device 106 according to still another embodiment of the present invention. 2 shows an example of electrical connection of two address electrode driver circuits (AD) 46 on the lower back side of 332.

  In the display device 106, the PTA units 331 and 332 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at the boundary between them. The electrical connection of the Y electrode driver circuit 700 and the address electrode driver circuit (AD) 46 related to the PTA unit 331 is the same as that of the PTA unit 321 of FIG. In this case, the X electrode driver circuit board 500 is not disposed on the back surface of the PTA unit 331. The X electrodes of the n pairs of display electrodes 2 (X1, Y1) to (Xn, Yn) of the PTA unit 332 are from the portion of the front support substrate 31 on the boundary between the left side of the PTA unit 331 and the right side of the PTA unit 332. It is connected to the X electrode driver circuit board 500 on the back surface of the PTA unit 332 via the flexible cable 500FC. The m signal electrodes 3 A1 to Am of the PTA unit 332 are connected to the address driver circuit 46 of the PTA unit 321 from the end of the back support substrate 32 on the bottom side of the PTA unit 332. The driver control circuit 42 is further connected to the X electrode driver circuit board 500 and the address driver circuit 46 of the PTA unit 322 via a cable indicated by a one-dot chain line.

  Since the scanning pulse circuit 70 applies the scanning voltage pulse -Vy to two portions of the length Ly of the length 2Ly of the Y electrode at the boundary between the PTA units 331 and 332, respectively. Is equal to the lateral width Ly of each of the PTA units 331 and 332. Therefore, in the discharge cell of the Y electrode portion in each of the PTA units 331 and 332 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied, the scan voltage pulse −Vy Since the effective width and height are sufficient, the possibility of successful address discharge is increased.

  FIGS. 12A and 12B show the display pulse pair 2 on the inner surface of the front support substrate 31 at the boundary between two adjacent PTA units 331 and 332 in FIG. 11 to the scan pulse circuit 70 and / or the X electrode driver circuit substrate 500. A method of pulling out the connection line 22 is shown. The Y electrode connection line 22 is formed on the flexible cable 70FC. The X electrode connection line 22 is formed on the flexible cable 500FC.

  In FIG. 12A, each display electrode pair 2 on the front support substrate 31 extends from the right side of the front support substrate 31 of the separate PTA unit 332 to the lower side of the back support substrate 32 along the outer surface of the plasma tube 11B. A connection line 22 connected to is formed. Next, as shown in FIG. 12B, the left side of the PTA unit 331 is connected to the right side of the PTA unit 332 so that the corresponding display electrode pairs 22 of the PTA unit 321 and the PTA unit 332 are in contact with each other, and the joint is inconspicuous. Like that. The connection line 22 drawn from the Y electrode in the display electrode 2 is connected to the scan pulse circuit 70 disposed on the left side of the back surface of the PTA unit 331 via the flexible cable 70FC (FIG. 11). The connection line 22 drawn from the X electrode in the display electrode pair 2 is connected to the X electrode driver circuit board 500 disposed on the right side of the back surface of the PTA unit 332 via the flexible cable 500FC (FIG. 11). As an alternative configuration, the X electrode 2 in the display electrode pair 2 is connected to the right side of the PTA unit 331 and / or the left side of the PTA unit 332 via the flexible cable 500FC as shown in FIGS. It may be connected to the corresponding X electrode driver circuit board 500.

  FIG. 13 shows two X electrode driver circuit boards 500 and two Y electrode driver circuits 700 on the back of four adjacent PTA units 331, 332, 326 and 327 of the display device 108, according to yet another embodiment of the present invention. , And four address electrode driver circuits (AD) 46 are electrically connected.

  In the display device 108, the PTA units 331, 332, 326, and 327 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at their respective boundaries. Connections in the PTA units 331 and 332 are the same as in FIG. Connections in the PTA unit 327 are the same as those in FIG. The electrical connection of the Y electrode driver circuit 700 with respect to the PTA unit 326 is the same as in the case of the PTA unit 331 in FIG. In this case, the power supply 40 and the driver control circuit 42 are not arranged on the back surface of the PTA unit 326.

  Since the scan pulse circuit 70 of the PTA unit 331 applies the scan voltage pulse -Vy to two portions of the length Ly of the Y electrode of length 4 Ly at the boundary between the PTA units 331 and 332, the boundary The length of the Y electrode from is equal to the lateral width Ly of each of the PTA units 331 and 332. Since the scan pulse circuit 70 of the PTA unit 326 applies the scan voltage pulse −Vy to two portions of the length Ly of the Y electrode having a length of 4 Ly at the boundary between the PTA units 326 and 327, respectively. The length of the Y electrode from is equal to the lateral width Ly of each of the PTA units 326 and 327. Therefore, in the discharge cell of the Y electrode portion in each of the PTA units 331, 332, 326 and 327 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied, the scan voltage Since the effective width and height of the pulse -Vy are sufficient, the possibility of successful address discharge is increased.

  FIG. 14 shows two X electrode driver circuit boards 500 and two Y electrode drivers on the back side of five adjacent PTA units 321, 322, 325, 326 and 327 of the display device 110 according to still another embodiment of the present invention. An example of electrical connection of a circuit 700 and five address electrode driver circuits (AD) 46 is shown.

  In the display device 110, the PTA units 321, 322, 325, 326, and 327 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at their respective boundaries. Connections in the PTA units 311 and 312 are the same as those in FIG. Connections in the PTA units 326 and 327 are the same as those in FIG. Connection in the PTA unit 325 is the same as in the case of the PTA unit 322 in FIG.

  The scan pulse circuit 70 of the PTA unit 321 applies the scan voltage pulse −Vy to two portions of the length Ly and 1.5 Ly of the Y electrode of length 4 Ly at the boundary between the PTA units 321 and 322, respectively. Therefore, the length of each part of the Y electrode from the boundary is equal to the lateral width Ly and 1.5 Ly of the PTA unit 331. The scan pulse circuit 70 of the PTA unit 326 applies the scan voltage pulse −Vy to two portions of the length Ly and 1.5 Ly of the Y electrode of length 4 Ly at the boundary between the PTA units 326 and 327, respectively. Therefore, the length of each part of the Y electrode from the boundary is equal to the lateral width Ly and 1.5 Ly of the PTA unit 327. Therefore, in the discharge cell of the Y electrode portion in each of the PTA units 321, 322, 325, 326 and 327 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied, Since the effective width and height of the scanning voltage pulse -Vy are sufficient, the possibility of successful address discharge is increased.

  FIG. 15 illustrates two X electrode driver circuit boards 500, three Y on the back of six adjacent PTA units 321, 322, 324, 325, 326 and 327 of the display device 112, according to yet another embodiment of the invention. An example of electrical connection of the electrode driver circuit 700 and six address electrode driver circuits (AD) 46 is shown.

  In the display device 112, the PTA units 321, 322, 324, 325, 326 and 327 have display electrode pairs 2 (X1, Y1) to (Xn, Yn) connected to each other at their respective boundaries. The PTA units 321 and 322 are the same as those in FIG. Connections in the PTA units 325, 326 and 327 are the same as in FIG. Connection in the PTA unit 324 is the same as that in the PTA unit 326.

  The scan pulse circuit 70 of the PTA units 331, 324 and 326 sends its scan voltage pulse -Vy at the boundary between two adjacent PTA units 331 and 332, 324 and 325, and 326 and 327 with a length of 4Ly. Since each of the electrodes is applied to two portions of length Ly, the length of the Y electrode from the boundary is equal to the lateral width Ly of each of the PTA units 321, 322, 324, 325, 326 and 327. Accordingly, the discharge cells of the Y electrode portion in each of the PTA units 321, 322, 324, 325, 326 and 327 located farthest from the Y electrode portion on the boundary to which the scan voltage pulse of the scan pulse circuit 70 is applied. Then, since the effective width and height of the scanning voltage pulse -Vy are sufficient, the possibility of successful address discharge is increased.

  FIG. 16 serves to explain the scan pulse waveforms for synchronizing the scan pulses of the two or more sets of scan pulse circuits 70 of FIGS.

  In order to prevent an error in address discharge, synchronization between the scan pulses of the two scan pulse circuits 70 of the PTA units 331 and 326 of FIG. 13 controlled by the driver control circuit 42 is controlled by the driver control circuit 42. Synchronization between the scan pulses of the two sets of scan pulse circuits 70 of the PTA units 321 and 326 of FIG. 14 or the three sets of scan pulse circuits 70 of the PTA units 321, 324 and 326 of FIG. It is necessary to prevent the synchronization deviation between the scanning pulses.

  One of two arbitrary sets of scan pulse circuits 70 in each of FIGS. 13 to 15 is a scan pulse circuit A, and the other is a scan pulse circuit B. The scan pulses of the scan pulse circuits A and B have a scan pulse ON period Ta in the scan pulse period of the Y electrode Yj, and the period Tb and Tb ′ (Tb = Tb = minimum value of the scan voltage pulse for address −Vy). Each having Tb ′). In the scan pulse period Ta of the Y electrode Yj, the scan pulse of the scan pulse circuit A for the Y electrodes other than the Y electrode Yj has a scan pulse OFF state as shown in FIG. 16E.

  It is assumed that the scan pulse of the scan pulse circuit B in FIG. 16B is delayed by a delay time D = Tt at most from the scan pulse of the scan pulse circuit A in FIG. 16A. The period Tb in FIG. 16C in which the Y electrode Yj selected by one set of scan pulse circuits A is to be effectively turned on, and the Y electrodes Yj− before and after that selected by another set of scan pulse circuits B The pulse delay time D is considered in the transition between the ON state and the OFF state so that the period Tb ′ in FIG. 16D in which 1 or Yj + 1 is effectively in the ON state does not overlap with the delay of one scan pulse. It is necessary to provide the margin period Tt. Therefore, the scan pulse has a slope (ramp) that falls from the ground potential GND to the potential −Vy in the first margin period Tt, and a slope that rises from the potential −Vy to the ground potential GND in the second margin period Tt.

  The embodiments described above are merely given as typical examples, and it is obvious to those skilled in the art to combine the components of each embodiment, and variations and variations thereof will be apparent to those skilled in the art. It will be apparent that various modifications of the embodiments can be made without departing from the scope of the invention as set forth in the scope.

FIG. 1 illustrates a schematic partial structure of an array of plasma tubes or gas discharge tubes of a conventional color display device. FIG. 2A shows a front side support substrate on which a plurality of transparent display electrode pairs are formed. FIG. 2B shows a back-side support substrate on which a plurality of signal electrodes or signal electrodes are formed. FIG. 3 shows a cross-sectional structure perpendicular to the longitudinal direction of the tubes of the plasma tube array of the display device. FIG. 4 shows the electrical connection of the X electrode driver circuit board, the Y electrode driver circuit, the address electrode driver circuit, and the driver control circuit on the back surface of the PTA unit of a normal display device. FIG. 5 schematically shows a sustain voltage pulse circuit and a scan pulse circuit for the Y electrode in a normal Y electrode driver circuit connected to the PTA unit, and a sustain voltage pulse circuit for the X electrode on the X electrode driver circuit board. The configuration is shown. FIG. 6 illustrates a schematic drive sequence of output drive voltage waveforms of the X electrode driver circuit board, the Y electrode driver circuit, and the address driver circuit in a normal display device. FIG. 7 shows an electrical connection of the X electrode driver circuit board, the Y electrode driver circuit, and the two address electrode driver circuits on the back surface of two PTA units arranged adjacent to each other in a normal display device. FIG. 8 shows the waveform of the scanning voltage pulse -Vy along the longitudinal direction of the scanning electrode Yj of the pair of display electrodes extending across two adjacent PTA units of the display device. FIG. 9 shows an X electrode driver circuit board on the back right side of the PTA unit, a Y electrode driver circuit on the back left side of the PTA unit, and two address electrodes on the lower back side of the PTA unit in the display device according to the embodiment of the present invention. The example of the electrical connection of a driver circuit is shown. FIG. 10 shows two X electrode driver circuit boards on the back right side of the PTA unit and the left back side of the PTA unit, the Y electrode driver circuit on the back left side of the PTA unit, and the PTA in the display device according to another embodiment of the present invention. An example of electrical connection of two address electrode driver circuits on the lower back side of the unit is shown. FIG. 11 shows an X electrode driver circuit board on the back right side of the PTA unit, a Y electrode driver circuit on the back left side of the PTA unit, and 2 on the lower back side of the PTA unit in the display device according to still another embodiment of the present invention. An example of electrical connection of two address electrode driver circuits is shown. 12A and 12B show a method of drawing connection lines from the display electrode pair on the inner surface of the front support substrate to the scan pulse circuit and / or the X electrode driver circuit substrate at the boundary between two adjacent PTA units in FIG. Yes. FIG. 13 illustrates the electrical of two X electrode driver circuit boards, two Y electrode driver circuits, and four address electrode driver circuits on the back of four adjacent PTA units of a display device, according to yet another embodiment of the present invention. Shows an example of dynamic connection. FIG. 14 illustrates the electrical of two X electrode driver circuit boards, two Y electrode driver circuits, and five address electrode driver circuits on the back of five adjacent PTA units of a display device, according to yet another embodiment of the present invention. Shows an example of dynamic connection. FIG. 15 shows the electricity of two X electrode driver circuit boards, three Y electrode driver circuits, and six address electrode driver circuits on the back side of six adjacent PTA units of a display device according to still another embodiment of the present invention. Shows an example of dynamic connection. FIG. 16 serves to explain the scan pulse waveforms for synchronizing the scan pulses of the two or more sets of scan pulse circuits of FIGS.

Claims (5)

Inside, a phosphor layer is formed and a discharge gas is enclosed, and a plurality of gas discharge tubes each having a plurality of light emitting points in the longitudinal direction are juxtaposed, and a plurality of pairs are disposed on the display surface side of the plurality of gas discharge tubes. A display device comprising a plurality of units in which display electrodes are arranged and a plurality of signal electrodes are arranged on the back side of the plurality of gas discharge tubes,
The plurality of pairs of display electrodes of the plurality of units are electrically connected to have a length corresponding to the plurality of units,
A scan voltage pulse is applied to one display electrode of each of the plurality of display electrode pairs of the plurality of units in the first period, and a sustain voltage pulse is applied to the one display electrode in the second period. At least one scan driving circuit for applying
At least one sustain voltage circuit that applies a potential for sustain voltage pulse to the other display electrode of the display electrode pairs of the plurality of pairs of display electrodes of the plurality of units in the second period;
With
The one scan driving circuit applies a scanning voltage pulse to the one display electrode of each of the plurality of display electrode pairs at a boundary between two adjacent units among the plurality of units. A display device, wherein a sustain voltage pulse is applied to the one display electrode.   The display device according to claim 1, wherein the one sustain voltage circuit applies a sustain voltage pulse to the other display electrode on one outer side of the plurality of units.   The display device according to claim 1, wherein the one sustain voltage circuit applies a sustain voltage pulse to the other display electrode at a boundary between the two units.   One outer unit of the plurality of units has, on its rear surface, a control for controlling the one scan drive circuit, the one sustain voltage circuit, the one scan drive circuit, and the one sustain voltage circuit. The display device according to claim 1, further comprising a circuit. Another one of the plurality of scan driving circuits is arranged such that each display electrode pair of the plurality of pairs of display electrodes is arranged at a boundary between the other two adjacent units in the plurality of units. Applying a scanning voltage pulse to one of the display electrodes, applying a sustain voltage pulse to the one display electrode,
Each of the scanning voltage pulses of the one scanning driving circuit and the another scanning driving circuit has a period between adjacent scanning voltage pulses to prevent a synchronization shift with the other scanning voltage pulse. The display device according to claim 1, wherein the display device is a display device.

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