JPS649526A - Branching control system for microcomputer - Google Patents

Branching control system for microcomputer

Info

Publication number
JPS649526A
JPS649526A JP16605587A JP16605587A JPS649526A JP S649526 A JPS649526 A JP S649526A JP 16605587 A JP16605587 A JP 16605587A JP 16605587 A JP16605587 A JP 16605587A JP S649526 A JPS649526 A JP S649526A
Authority
JP
Japan
Prior art keywords
branching
destination address
branching destination
order part
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16605587A
Other languages
Japanese (ja)
Inventor
Noriyuki Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16605587A priority Critical patent/JPS649526A/en
Publication of JPS649526A publication Critical patent/JPS649526A/en
Pending legal-status Critical Current

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  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To branch with the small number of states and to call a sub-routine by dividing a branching destination address to a low-order part and a high-order part and holding, replacing the branching destination address by a branching destination address read from a branching destination address table to output it. CONSTITUTION:First and second branching destination address tables 11, 12 for holding the low-order part and the high-order part of the branching destination address to respective addresses corresponding to a condition value for designating a branching destination and a CPU 1 for setting the condition value for designating this branching destination to the address register 13 of the branching destination address table, and then, starting to read a branching instruction read from a program memory are provided and the low-order part and the high-order part of the branching destination address read from the first and the second branching destination address tables 11, 12 subsequently to the instruction code of the branching instruction read from the program memory are outputted on a data bus 8. Thereby, a processing time for branching or calling the sub-routine can be remarkably shortened and the processing capability of a microcomputer is remarkably improved.
JP16605587A 1987-07-02 1987-07-02 Branching control system for microcomputer Pending JPS649526A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16605587A JPS649526A (en) 1987-07-02 1987-07-02 Branching control system for microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16605587A JPS649526A (en) 1987-07-02 1987-07-02 Branching control system for microcomputer

Publications (1)

Publication Number Publication Date
JPS649526A true JPS649526A (en) 1989-01-12

Family

ID=15824128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16605587A Pending JPS649526A (en) 1987-07-02 1987-07-02 Branching control system for microcomputer

Country Status (1)

Country Link
JP (1) JPS649526A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4955697A (en) * 1987-04-20 1990-09-11 Hitachi, Ltd. Liquid crystal display device and method of driving the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4955697A (en) * 1987-04-20 1990-09-11 Hitachi, Ltd. Liquid crystal display device and method of driving the same

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