JPS6490644A - Multiple access line exchange - Google Patents

Abstract

PURPOSE:To attain multiple access exchange including a subrate by a small sized memory independently of the multi-frame number by assigning plural time slots to one frame and plural time slots to multi-frame. CONSTITUTION:In case of subrate communication, a control section 3 writes an address number 0011 to an idle cell of a memory 2 and as a transmission address to a line circuit 10, informs to a line circuit 20 0011 as a collation address number of an address bus 5 and 000,001,011 as collation address number of an address bus 51. A line control circuit 12 sets 0011 to a register 18, 0000,0001,0011 to registers 181-183 respectively and 1111 to a register 184. A frame number is outputted from a multi-frame counter 9 for each frame by taking 8 as a period to a bus 51 and a frame number 0011 is outputted to the bus 5 from the memory. A comparator circuit 171 outputs an H level when any of the setting value in the registers 181-183 equal to the output of the counter 9. A coincidence signal is outputted to the coincidence of comparators 17, 171.