JPS6488863A - Input data control circuit - Google Patents

Input data control circuit

Info

Publication number
JPS6488863A
JPS6488863A JP24708287A JP24708287A JPS6488863A JP S6488863 A JPS6488863 A JP S6488863A JP 24708287 A JP24708287 A JP 24708287A JP 24708287 A JP24708287 A JP 24708287A JP S6488863 A JPS6488863 A JP S6488863A
Authority
JP
Japan
Prior art keywords
data
rsf
change
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24708287A
Other languages
Japanese (ja)
Inventor
Shinji Miyata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24708287A priority Critical patent/JPS6488863A/en
Publication of JPS6488863A publication Critical patent/JPS6488863A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To execute an optimum response to a peripheral equipment to have the various types of access styles by providing a detecting circuit to detect the change of input data and a detecting circuit to detect that the input data are not changed for a constant time, etc. CONSTITUTION:Data D from a data input terminal DIN are inputted to a delaying circuit DLY and an exclusive OR gate EOR. The gate EOR inputs the data D and the output of the circuit DLY. Then, the decidence of the data D, which are delayed only for the delaying time of the circuit DLY, and present data, namely, the change of the data D is detected and an RSF 1 (FF) is set by the output. An RSF 2 (FF) is set by the logical product signal of the output signal of the RSF 1 and the output signal of an inverter INV. Namely, the data D are not changed after one change and the data are set in case that the delaying time of the circuit DLY passes. Thus, the data are latched by a data latch DL and simultaneously, a bus cycle is ended. Then, since a CPU reads the latch data, the optimum response can be executed to the peripheral equipment.
JP24708287A 1987-09-30 1987-09-30 Input data control circuit Pending JPS6488863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24708287A JPS6488863A (en) 1987-09-30 1987-09-30 Input data control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24708287A JPS6488863A (en) 1987-09-30 1987-09-30 Input data control circuit

Publications (1)

Publication Number Publication Date
JPS6488863A true JPS6488863A (en) 1989-04-03

Family

ID=17158161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24708287A Pending JPS6488863A (en) 1987-09-30 1987-09-30 Input data control circuit

Country Status (1)

Country Link
JP (1) JPS6488863A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59176854A (en) * 1983-03-28 1984-10-06 Meidensha Electric Mfg Co Ltd Memory device of computer control system
JPS6119860B2 (en) * 1979-09-07 1986-05-19 Mitsubishi Motors Corp

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6119860B2 (en) * 1979-09-07 1986-05-19 Mitsubishi Motors Corp
JPS59176854A (en) * 1983-03-28 1984-10-06 Meidensha Electric Mfg Co Ltd Memory device of computer control system

Similar Documents

Publication Publication Date Title
JPS6488863A (en) Input data control circuit
JPS55116122A (en) Information processor
TW369636B (en) Semiconductor integrated circuit and its testing method
JPS5635233A (en) Fault detecting system for bus line
JPS55157022A (en) Output circuit for microcomputer
JPS57210718A (en) Signal change detecting circuit
JPS562047A (en) Debugging unit
JPS55119755A (en) Processor providing test instruction function
JPS5648714A (en) Chattering noise eliminating circuit
JPS5595157A (en) Supervisory unit for program getting out of control
JPS57166645A (en) Logical circuit
JPS57112129A (en) Latch circuit
JPS57194378A (en) Test circuit of electronic clock
JPS57120148A (en) Detecting system for change of state
JPS54125378A (en) Input-output unit for sequence controller
JPS5449039A (en) Logic circuit
JPS6448297A (en) Dram controller
KR950009111A (en) How to read power supply frequency of microwave oven
JPS553093A (en) Integrated circuit for development of computer
JPS55127635A (en) Interruption input interface
JPS5734262A (en) Microcomputer system
JPS5696338A (en) Interrupt processing method of microcomputer
JPS5246737A (en) Changing point detection system of multi-input
JPS5566016A (en) Signal priority level determination circuit
JPS5525123A (en) Sequential controller