JPS648649A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS648649A JPS648649A JP16489787A JP16489787A JPS648649A JP S648649 A JPS648649 A JP S648649A JP 16489787 A JP16489787 A JP 16489787A JP 16489787 A JP16489787 A JP 16489787A JP S648649 A JPS648649 A JP S648649A
- Authority
- JP
- Japan
- Prior art keywords
- pin
- plating
- lead
- layer
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To improve solderability through a simple plating structure and to provide excellent electrical and mechanical reliability at the time of mounting on a mother board by solder plating a metallic lead pin front layer, and forming a lead plating as its base plating. CONSTITUTION:After a plating layer 3 is formed of copper, nickel on a front layer of a lead pin 1 with kovar-42 alloy-phosphorus bronze as a material, sole lead is plated, and a solder plating layer 5 having 53:37 or 90:10 of composition ratio of tin:lead is further formed. A plating layer 3 of copper, nickel and a plating layer 4 of sole lead, and further a solder plating layer 5 are formed in advance on the front layer of the pin 1, and the pin 1 is engaged to be temporarily clamped within the through-hole 10 of a substrate 6 for placing a semiconductor in this state. Thereafter, the pin 1 is dipped in melted solder path to bond the pin 1 to the through-hole 10 with the solder, and the layer 6 is further formed on the pin 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16489787A JPS648649A (en) | 1987-06-30 | 1987-06-30 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16489787A JPS648649A (en) | 1987-06-30 | 1987-06-30 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS648649A true JPS648649A (en) | 1989-01-12 |
Family
ID=15801944
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16489787A Pending JPS648649A (en) | 1987-06-30 | 1987-06-30 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS648649A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6528873B1 (en) * | 1996-01-16 | 2003-03-04 | Texas Instruments Incorporated | Ball grid assembly with solder columns |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5730353A (en) * | 1980-07-30 | 1982-02-18 | Nec Corp | Semiconductor device |
JPS63187656A (en) * | 1987-01-30 | 1988-08-03 | Furukawa Electric Co Ltd:The | Semiconductor device |
-
1987
- 1987-06-30 JP JP16489787A patent/JPS648649A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5730353A (en) * | 1980-07-30 | 1982-02-18 | Nec Corp | Semiconductor device |
JPS63187656A (en) * | 1987-01-30 | 1988-08-03 | Furukawa Electric Co Ltd:The | Semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6528873B1 (en) * | 1996-01-16 | 2003-03-04 | Texas Instruments Incorporated | Ball grid assembly with solder columns |
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