JPS6486193A - Changeover control of double buffer - Google Patents
Changeover control of double bufferInfo
- Publication number
- JPS6486193A JPS6486193A JP62242436A JP24243687A JPS6486193A JP S6486193 A JPS6486193 A JP S6486193A JP 62242436 A JP62242436 A JP 62242436A JP 24243687 A JP24243687 A JP 24243687A JP S6486193 A JPS6486193 A JP S6486193A
- Authority
- JP
- Japan
- Prior art keywords
- frame memory
- switching
- buffer
- display
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Controls And Circuits For Display Device (AREA)
Abstract
PURPOSE: To avoid deviation of a picture which is brought about on a CRT monitor screen in a conventional double buffer switching operation by causing a display switching means to switch a buffer at the timing of reception of a non-display period signal at the display switching of a frame memory buffer. CONSTITUTION: In switching buffers 7a and 7b, a graphic processor 22 first reads a control input port 26 and accesses a control signal output port 28 for write within a frame period fine adjustment time upon detection of a vertical synchronizing signal (waits for detection if it is not detected) and designates display switching of frame memory buffers 7a and 7b. A register or a color pallet as a conversion table of picture data in a frame memory and a color code is provided in a video D/A converter 20, and data write of this color pallet is limited to the non-display period. Thus, blurring on the CRT monitor screen is excluded.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62242436A JPS6486193A (en) | 1987-09-29 | 1987-09-29 | Changeover control of double buffer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62242436A JPS6486193A (en) | 1987-09-29 | 1987-09-29 | Changeover control of double buffer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6486193A true JPS6486193A (en) | 1989-03-30 |
Family
ID=17089063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62242436A Pending JPS6486193A (en) | 1987-09-29 | 1987-09-29 | Changeover control of double buffer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6486193A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02265340A (en) * | 1989-04-05 | 1990-10-30 | Mioji Tsumura | Music information processing system |
US5111091A (en) * | 1989-09-08 | 1992-05-05 | Kabushikigaisha Sekogiken | Reluctance type electric motor |
JPH06266323A (en) * | 1993-03-12 | 1994-09-22 | Nec Corp | Video memory circuit of display device |
WO2007122769A1 (en) * | 2006-04-19 | 2007-11-01 | Sony Computer Entertainment Inc. | Display controller, graphics processor, drawing processor, and drawing control method |
WO2013154027A1 (en) * | 2012-04-13 | 2013-10-17 | ソニー株式会社 | Decoding device and method, audio signal processing device and method, and program |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5855979A (en) * | 1981-09-29 | 1983-04-02 | 富士通株式会社 | Picture display system having animation expressable |
JPS60179786A (en) * | 1984-02-28 | 1985-09-13 | 株式会社アマダ | Video ram control system |
-
1987
- 1987-09-29 JP JP62242436A patent/JPS6486193A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5855979A (en) * | 1981-09-29 | 1983-04-02 | 富士通株式会社 | Picture display system having animation expressable |
JPS60179786A (en) * | 1984-02-28 | 1985-09-13 | 株式会社アマダ | Video ram control system |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02265340A (en) * | 1989-04-05 | 1990-10-30 | Mioji Tsumura | Music information processing system |
US5111091A (en) * | 1989-09-08 | 1992-05-05 | Kabushikigaisha Sekogiken | Reluctance type electric motor |
JPH06266323A (en) * | 1993-03-12 | 1994-09-22 | Nec Corp | Video memory circuit of display device |
WO2007122769A1 (en) * | 2006-04-19 | 2007-11-01 | Sony Computer Entertainment Inc. | Display controller, graphics processor, drawing processor, and drawing control method |
US8026919B2 (en) | 2006-04-19 | 2011-09-27 | Sony Computer Entertainment Inc. | Display controller, graphics processor, rendering processing apparatus, and rendering control method |
WO2013154027A1 (en) * | 2012-04-13 | 2013-10-17 | ソニー株式会社 | Decoding device and method, audio signal processing device and method, and program |
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