JPS56153472A - Driving method for picture analyzer - Google Patents

Driving method for picture analyzer

Info

Publication number
JPS56153472A
JPS56153472A JP5741280A JP5741280A JPS56153472A JP S56153472 A JPS56153472 A JP S56153472A JP 5741280 A JP5741280 A JP 5741280A JP 5741280 A JP5741280 A JP 5741280A JP S56153472 A JPS56153472 A JP S56153472A
Authority
JP
Japan
Prior art keywords
signal
memory
circuit
picture
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5741280A
Other languages
Japanese (ja)
Inventor
Takashi Kitagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5741280A priority Critical patent/JPS56153472A/en
Publication of JPS56153472A publication Critical patent/JPS56153472A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Generation (AREA)

Abstract

PURPOSE:To realize the driving method of the picture processing device without errors of write and read data and lowering of the operation speed, by changing the type for refreshing the picture memory in accordance with the purpose of the use of the picture memory. CONSTITUTION:Analogue video signal A output from television camera 1 is not only converted to a digital video signal by A.D converting circuit 2 but also has synchronizing signal C separated. DMA circuit 3 receives picture write command signal D from the external and gives address designation signal G to picture memory 4 and control signal F to swtich 5 respectively and inputs the video signal to memory 4. At the write or read time, since switch 6 is turned to the upper side, refresh signal generating circuit 7 inputs plural signals to memory 4 during the horizontal blanking period by synchronizing signal C. For operations other than the write and the read, operating circuit 12 and memory 4 are connected; and when switch 6 is turned to the lower side, circuit 7 generates the signal once in a definte time by signal K generated by synchronizing signal generating circuit 13.
JP5741280A 1980-04-30 1980-04-30 Driving method for picture analyzer Pending JPS56153472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5741280A JPS56153472A (en) 1980-04-30 1980-04-30 Driving method for picture analyzer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5741280A JPS56153472A (en) 1980-04-30 1980-04-30 Driving method for picture analyzer

Publications (1)

Publication Number Publication Date
JPS56153472A true JPS56153472A (en) 1981-11-27

Family

ID=13054927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5741280A Pending JPS56153472A (en) 1980-04-30 1980-04-30 Driving method for picture analyzer

Country Status (1)

Country Link
JP (1) JPS56153472A (en)

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