JPS55121784A - Video signal processor - Google Patents
Video signal processorInfo
- Publication number
- JPS55121784A JPS55121784A JP2895879A JP2895879A JPS55121784A JP S55121784 A JPS55121784 A JP S55121784A JP 2895879 A JP2895879 A JP 2895879A JP 2895879 A JP2895879 A JP 2895879A JP S55121784 A JPS55121784 A JP S55121784A
- Authority
- JP
- Japan
- Prior art keywords
- supplied
- multiplexer
- speed
- given
- video signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
- H04N7/122—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal involving expansion and subsequent compression of a signal segment, e.g. a frame, a line
- H04N7/125—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal involving expansion and subsequent compression of a signal segment, e.g. a frame, a line the signal segment being a picture element
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Closed-Circuit Television Systems (AREA)
Abstract
PURPOSE:To memorize the video signals equivalent to one picture screen after selection with every several scanning lines, at the same time reading out the video signals in a low speed to supply them to the low-speed input unit. CONSTITUTION:Output signal ES given from ITV unit 1 is written into 1-line speed conversion memory 3 through analog switch circuit 2. Signal ES read out of memory 3 in a low speed is supplied to the low-speed input unit after the A/D conversion. Vertical synchronous signal VD given from unit is counted by counter 7 featuring maximum 6 bits and then supplied to multiplexer 8. In the same way, horizontal synchronous signal HD is counted by counter 9 of maximum 6 bits and then decoded through decoder 10 to be supplied to multiplexer 8. Accordingly, multiplexer 8 is given to analog switch 2 plus control circuits 4 and 6 in the form of control signal RC which designates the scanning line of No.6N-5 (N=1, 2...). Thus the video signals equivalent to one picture screen can be supplied to the input unit with no loss.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2895879A JPS55121784A (en) | 1979-03-13 | 1979-03-13 | Video signal processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2895879A JPS55121784A (en) | 1979-03-13 | 1979-03-13 | Video signal processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55121784A true JPS55121784A (en) | 1980-09-19 |
Family
ID=12262917
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2895879A Pending JPS55121784A (en) | 1979-03-13 | 1979-03-13 | Video signal processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55121784A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57119574A (en) * | 1981-01-19 | 1982-07-26 | Toshiba Corp | Picture reproduction system |
-
1979
- 1979-03-13 JP JP2895879A patent/JPS55121784A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57119574A (en) * | 1981-01-19 | 1982-07-26 | Toshiba Corp | Picture reproduction system |
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