JPS6484741A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6484741A JPS6484741A JP24303587A JP24303587A JPS6484741A JP S6484741 A JPS6484741 A JP S6484741A JP 24303587 A JP24303587 A JP 24303587A JP 24303587 A JP24303587 A JP 24303587A JP S6484741 A JPS6484741 A JP S6484741A
- Authority
- JP
- Japan
- Prior art keywords
- terminal electrodes
- silicon
- electrodes
- reaction
- highly concentrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To cope with the situation even when connection among a number of terminal electrodes is required and realize the formation of a bonding part having great bonding strength, by making the terminal electrodes equipped with metallic films where silicide can be formed on silicon added by highly concentrated impurities come closely into contact with the terminal electrodes, thereby treating the foregoing electrodes with heat. CONSTITUTION:Terminal electrodes 5 where silicon 3 added by highly concentrated impurities and films 4 consisting of metals which form silicide by acting thermally on silicon are laminated at a rate where excess silicon appears after reaction are formed on the first semiconductor substrate 1 and the terminal electrodes 9 consisting of metals which are the same kinds as the foregoing metal films have are formed on the second semiconductor substrate 6. Then alignment is performed by facing the first and second semiconductor substrates 1 and 6 each other and heat treatment is performed in a state that both electrodes 5 and 9 to be bonded come closely into contact with each other or are welded with pressure and then this approach allows the reaction of a solid phase silicide to take place between highly concentrated impurity-added silicon 3 and the metal films 4 of the terminal electrodes 5 and further allows its reaction to have an effect on the whole metal films of surfaces of the above silicon 3 and on a part or the whole terminal electrodes 9 and then performs connection between elements or devices.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24303587A JPS6484741A (en) | 1987-09-28 | 1987-09-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24303587A JPS6484741A (en) | 1987-09-28 | 1987-09-28 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6484741A true JPS6484741A (en) | 1989-03-30 |
JPH0581189B2 JPH0581189B2 (en) | 1993-11-11 |
Family
ID=17097881
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24303587A Granted JPS6484741A (en) | 1987-09-28 | 1987-09-28 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6484741A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
US7959270B2 (en) | 2005-12-23 | 2011-06-14 | Xerox Corporation | Collapsible packaging system |
-
1987
- 1987-09-28 JP JP24303587A patent/JPS6484741A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
US7959270B2 (en) | 2005-12-23 | 2011-06-14 | Xerox Corporation | Collapsible packaging system |
Also Published As
Publication number | Publication date |
---|---|
JPH0581189B2 (en) | 1993-11-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS57201058A (en) | Insulated semiconductor device | |
EP0248445A3 (en) | Semiconductor device having a diffusion barrier and process for its production | |
EP0229850A4 (en) | Connection terminals between substrates and method of producing the same. | |
TW358992B (en) | Semiconductor device and method of fabricating the same | |
TW350071B (en) | Chip resistor and a method of producing the same | |
WO2004112128A3 (en) | Low profile stacking system and method | |
EP0335679B1 (en) | Bonded ceramic-metal composite substrate, circuit board constructed therewith and methods for production thereof | |
RU2196683C2 (en) | Substrate, method for its production (versions) and metallic compound of articles | |
CA2000838A1 (en) | Method of soldering semiconductor substrate on supporting plate | |
JPS6484741A (en) | Manufacture of semiconductor device | |
KR0129500B1 (en) | Semiconductor device and manufacture thereof | |
WO1999058733A3 (en) | Method and device for the heat treatment of substrates | |
JPS55107238A (en) | Semiconductor device and method of manufacturing the same | |
JPS6453427A (en) | Bonding process | |
JPS5715447A (en) | Production of substrate for carrying components | |
EP0170444A3 (en) | Solderable contact materials | |
JP3859280B2 (en) | Method for manufacturing aluminum-ceramic composite substrate | |
WO2002093637A3 (en) | Product comprising a substrate and a chip attached to the substrate | |
JPS5321570A (en) | Bonding method of semiconductor substrates | |
JPS5526650A (en) | Die bonding method for semiconductor pellet | |
JPS56115548A (en) | Isolating method of semiconductor wafer | |
JP5434087B2 (en) | Semiconductor device and method of soldering the semiconductor device | |
JPS5334483A (en) | Substrate for semiconductor integrating circuit | |
JPS5591132A (en) | Semiconductor device | |
JPS6448437A (en) | Electrode structure |