JPS648467B2 - - Google Patents

Info

Publication number
JPS648467B2
JPS648467B2 JP58185744A JP18574483A JPS648467B2 JP S648467 B2 JPS648467 B2 JP S648467B2 JP 58185744 A JP58185744 A JP 58185744A JP 18574483 A JP18574483 A JP 18574483A JP S648467 B2 JPS648467 B2 JP S648467B2
Authority
JP
Japan
Prior art keywords
circuit board
adhesive
semiconductor device
films
fluorine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58185744A
Other languages
Japanese (ja)
Other versions
JPS6076146A (en
Inventor
Kazuo Iko
Akiko Ono
Hideto Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP58185744A priority Critical patent/JPS6076146A/en
Publication of JPS6076146A publication Critical patent/JPS6076146A/en
Publication of JPS648467B2 publication Critical patent/JPS648467B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5388Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates for flat cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

【発明の詳細な説明】 この発明は半導体素子が薄型にパツケージされ
た薄型半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin semiconductor device in which a semiconductor element is thinly packaged.

近年、電卓、カードなどはその実用性の観点か
ら薄型化の傾向にあり、これら製品内部に半導体
素子を組み込むに当たつてできるだけ薄くパツケ
ージすることが要求されている。従来のパツケー
ジ手段としてはセラミツク封止やエポキシ樹脂封
止などが知られているが、かかる手段では上記要
求に充分に応えにくい。
In recent years, calculators, cards, and the like have tended to become thinner from the viewpoint of practicality, and in order to incorporate semiconductor elements inside these products, it is required to package them as thinly as possible. Ceramic sealing, epoxy resin sealing, and the like are known as conventional packaging means, but such means do not fully meet the above requirements.

この発明は、上記観点から、前記要求にあつた
薄型パツケージされた半導体装置を提供せんとす
るもので、その要旨とするところは、ポリイミド
系フイルムからなる耐熱性フイルムに融点200〜
320℃のフツ素系ポリマーからなる熱可塑性樹脂
を融着剤として塗工してなる2枚の接着フイルム
間に、スルーホールを有する印刷回路板および上
記のスルーホール内の設けられた半導体素子を介
在させて上記両接着フイルムで上記回路板を被覆
するとともに上記素子を封止したことを特徴とす
る薄型半導体装置にある。
In view of the above, the present invention aims to provide a thin packaged semiconductor device that meets the above requirements.
A printed circuit board having through-holes and a semiconductor element installed in the through-hole are placed between two adhesive films coated with a thermoplastic resin made of fluorine-based polymer at 320°C as a fusion agent. A thin semiconductor device characterized in that the circuit board is covered with both of the adhesive films interposed therebetween, and the element is sealed.

以下、この発明を図面を参考にして説明する。
図面はこの発明の薄型半導体装置の一例を示す要
部断面図である。
This invention will be explained below with reference to the drawings.
The drawing is a sectional view of a main part showing an example of a thin semiconductor device of the present invention.

図中、1はスルーホール2を有する銅張り積層
板の如き回路用基板に所定の印刷回路を形成して
なる印刷回路板、3,4は上記回路板1とそのス
ルーホール2内に設けられた半導体素子5とをそ
の両面側から接着被覆してなる接着フイルムであ
り、このフイルム3,4はそれぞれポリイミド系
フイルムからなる耐熱性フイルム3a,4aとこ
れに溶液塗工ないし溶融塗工により塗工された融
点200〜320℃のフツ素系ポリマーからなる熱可塑
性樹脂よりなる融着剤3b,4bとから構成され
ている。6は上記素子5と印刷回路板1とを電気
的に接続したボンデイングワイヤである。
In the figure, 1 is a printed circuit board formed by forming a predetermined printed circuit on a circuit board such as a copper-clad laminate having through holes 2, and 3 and 4 are printed circuit boards provided in the circuit board 1 and its through holes 2. This is an adhesive film formed by adhesively coating a semiconductor element 5 on both sides thereof, and the films 3 and 4 are heat-resistant films 3a and 4a each made of a polyimide film and coated thereon by solution coating or melt coating. The adhesives 3b and 4b are made of a thermoplastic resin made of a fluorine-based polymer having a melting point of 200 to 320°C. A bonding wire 6 electrically connects the element 5 and the printed circuit board 1.

上記構成の半導体装置は、たとえば以下の如く
組み立てることができる。まず、接着フイルム4
上に印刷回路板1を載置するとともに、そのスル
ーホール2内に半導体素子5をセツトし、これら
回路板1および素子5を融着剤4bの熱融着性に
よつて接着フイルム4に接着固定する。ついで、
素子5と回路板1との間をボンデイングワイヤ6
を用いてワイヤボンデイングしたのち、これら素
子5、回路板1およびボンデイングワイヤ6上に
接着フイルム3を設けてその融着剤3bの熱融着
性によつて接着被覆する。
The semiconductor device having the above structure can be assembled, for example, as follows. First, adhesive film 4
The printed circuit board 1 is placed on top, and the semiconductor element 5 is set in the through hole 2, and the circuit board 1 and the element 5 are adhered to the adhesive film 4 by the thermal adhesive properties of the adhesive 4b. Fix it. Then,
A bonding wire 6 is connected between the element 5 and the circuit board 1.
After wire bonding using a bonding agent, an adhesive film 3 is provided on the element 5, the circuit board 1, and the bonding wire 6, and the adhesive film 3 is adhesively coated by the thermal adhesive properties of the adhesive 3b.

これにより、上記回路板1はその全体が接着フ
イルム3,4によつて被覆される一方、上記素子
5は上記回路板1のスルーホール2内において両
面側の接着フイルム3,4によつて接着支持され
るとともに、この両フイルム3,4によつて外部
雰囲気からしや断された封止状態となる。
As a result, the circuit board 1 is entirely covered with the adhesive films 3 and 4, while the element 5 is adhered within the through hole 2 of the circuit board 1 by the adhesive films 3 and 4 on both sides. While being supported, a sealed state is achieved in which the films 3 and 4 are cut off from the external atmosphere.

このように、この発明によれば、2枚の接着フ
イルム3,4を用いてこのフイルムの融着剤3
b,4bの融点以上の温度に加熱することによ
り、回路板1の被覆および半導体素子5のの接着
固定と同時にその樹脂封止を達成できるから、封
止作業が非常に容易である。しかも、この封止は
2枚の接着フイルムによつて行えるものであるか
ら、薄型パツケージが可能で前記要求に充分に応
えることができる。
As described above, according to the present invention, the two adhesive films 3 and 4 are used to apply the adhesive 3 of the film.
By heating to a temperature equal to or higher than the melting point of the circuit board 1 and the semiconductor element 5, the resin sealing can be achieved simultaneously with the coating of the circuit board 1 and the adhesion and fixation of the semiconductor element 5, making the sealing work very easy. Furthermore, since this sealing can be performed using two adhesive films, a thin package is possible and can fully meet the above requirements.

また、上記接着フイルム3,4はポリイミド系
フイルムからなる耐熱性フイルム3a,4aをベ
ースフイルムとするものであつて、このベースフ
イルムは融着剤3b,4bを構成する熱可塑性樹
脂の融着温度以上の耐熱性を有するものであるた
め、半導体装置の前記組み立て時および使用時の
耐熱性に良好な結果を与え、一方これに塗工され
てなる融着剤3b,4bは半導体素子5などに対
する均一で強固な接着を可能とするから、半導体
素子表面への水分の侵入防止にも好結果が得られ
る。
Further, the adhesive films 3 and 4 have heat-resistant films 3a and 4a made of polyimide films as base films, and these base films have a melting temperature of the thermoplastic resin constituting the fusing agents 3b and 4b. Since it has the above heat resistance, it gives good results in heat resistance during the assembly and use of the semiconductor device, and on the other hand, the fusing agents 3b and 4b coated thereon are effective against the semiconductor elements 5, etc. Since uniform and strong adhesion is possible, good results can be obtained in preventing moisture from entering the surface of the semiconductor element.

上記の融着剤3b,4bを構成する熱可塑性樹
脂としては、既述のとおり、融点が200〜320℃の
フツ素系ポリマーが用いられるが、ここで融点が
200℃より低いものでは半導体装置としての耐熱
性に問題を生じやすく、また320℃より高くなる
と接着時に高温を要するため、いずれも不適当で
ある。
As mentioned above, a fluorine-based polymer having a melting point of 200 to 320°C is used as the thermoplastic resin constituting the above-mentioned fusing agents 3b and 4b.
If the temperature is lower than 200°C, problems tend to occur in the heat resistance of the semiconductor device, and if it is higher than 320°C, high temperatures are required during bonding, so both are unsuitable.

なお、融着剤3bと4bとはその融着温度が同
じであるか、あるいは前記組み立て法にあつては
融着剤4bが3bに較べて高い融着温度を有して
いることが好ましい。逆の場合、接着フイルム3
の接着時にすでに接着固化された融着剤4bの熱
流動がおこり、素子5の位置ずれなどをきたすお
それがあり、好ましくない。
Note that it is preferable that the fusing agents 3b and 4b have the same fusing temperature, or in the case of the above assembly method, the fusing agent 4b has a higher fusing temperature than the fusing temperature of the fusing agent 3b. In the opposite case, adhesive film 3
At the time of bonding, thermal flow of the adhesive 4b that has already been bonded and solidified may occur, which may cause displacement of the element 5, which is not preferable.

上記フツ素系ポリマーとしてはフツ素含有量が
通常20重量%以上、好ましくは50〜76重量%のも
のが用いられる。特に、パーフルオロアルケンな
いしパーフルオロビニルエーテルのホモポリマー
またはコポリマーが好適であり、その代表例とし
ては、テトラフルオロエチレン−ヘキサフルオロ
プロピレン共重合体(以下、FEPという)、つぎ
の構造式; −〔CF2−CF2−CF2−CF(ORf)−〕o (ただし、式中Rfは炭素数7以下、好ましくは
1〜3のフツ化アルキル基を意味する) で表されるテトラフルオロエチレン−パーフルオ
ロビニルエーテル共重合体(以下、PFAという)
を挙げることができる。上記PFAの市販品とし
ては、ダイキン工業社製の商品名ネオフロン
PFA、デユポン社製の商品名テフロンPFAなど
がある。
The fluorine-based polymer used has a fluorine content of usually 20% by weight or more, preferably 50 to 76% by weight. In particular, homopolymers or copolymers of perfluoroalkenes or perfluorovinyl ethers are suitable, and typical examples thereof include tetrafluoroethylene-hexafluoropropylene copolymer (hereinafter referred to as FEP), and the following structural formula: −[CF 2 -CF 2 -CF 2 -CF(ORf)-] o (However, in the formula, Rf means a fluorinated alkyl group having 7 or less carbon atoms, preferably 1 to 3 carbon atoms) Fluorovinyl ether copolymer (hereinafter referred to as PFA)
can be mentioned. Commercial products of the above PFA include the product name Neoflon manufactured by Daikin Industries, Ltd.
PFA, trade name Teflon PFA manufactured by DuPont, etc.

その他の上記フツ素系ポリマーとして、上記構
造式で表されるPFAのフツ素の一部が水素に置
換されたものや、ポリクロロトリフルオロエチレ
ン、エチレン−テトラフルオロエチレン共重合体
(以下、ETFEという)、エチレン−クロルトリフ
ルオロエチレン共重合体なども使用可能である。
Other examples of the above-mentioned fluorine-based polymers include those in which a part of the fluorine in PFA represented by the above structural formula is replaced with hydrogen, polychlorotrifluoroethylene, and ethylene-tetrafluoroethylene copolymer (hereinafter referred to as ETFE). ), ethylene-chlorotrifluoroethylene copolymer, etc. can also be used.

これらのフツ素系ポリマーは、常温では非接着
性であるが、融点以上に加熱すると金属などに対
して容易に融着する性質を有しているとともに、
溶融時のポリマーの流れが少ないという特徴を有
している。
These fluorine-based polymers are non-adhesive at room temperature, but when heated above their melting point, they easily fuse to metals, etc.
It has the characteristic that there is little polymer flow during melting.

接着フイルム3,4の厚みとしては、一般に
20μm以上、好適には30μm以上で100μm以下で
あり、このうち耐熱性フイルム3a,4aの厚み
は15〜90μm、融着剤3b,4bの厚みは5〜
25μmである。
The thickness of the adhesive films 3 and 4 is generally
20 μm or more, preferably 30 μm or more and 100 μm or less, of which the heat-resistant films 3a and 4a have a thickness of 15 to 90 μm, and the adhesives 3b and 4b have a thickness of 5 to 90 μm.
It is 25 μm.

以上のように、この発明においては、特定の2
枚の接着フイルム間にスルーホールを有する印刷
回路板および上記スルーホール内に設けられた半
導体素子を接着被覆する構成としたことにより、
電卓、カードなどに応用可能な薄型半導体装置を
製造容易に提供することができる。
As described above, in this invention, two specific
By adopting a structure in which a printed circuit board having a through hole between two sheets of adhesive film and a semiconductor element provided in the through hole are adhesively coated,
A thin semiconductor device applicable to calculators, cards, etc. can be easily manufactured and provided.

実施例 1 厚さ25μmのポリイミドフイルム上に融点が
270℃のFEPを10μm厚に塗着して接着フイルム
を作製した。つぎに、所定の印刷回路板とそのス
ルーホール内にセツトされた半導体メモリ素子
(64KMOS DRAM)を、上記接着フイルム2枚
を用いて前記方法にて接着固定すると同時に上記
素子を封止して、図面に示される如き薄型半導体
装置を得た。なお、接着条件は、FEP側からの
加熱圧着で350℃、5Kg/cm2、5秒の条件とした。
Example 1 Melting point on a 25 μm thick polyimide film
An adhesive film was prepared by applying FEP at 270°C to a thickness of 10 μm. Next, a semiconductor memory element (64KMOS DRAM) set in a predetermined printed circuit board and its through hole is adhesively fixed in the above method using two adhesive films, and at the same time, the above element is sealed. A thin semiconductor device as shown in the drawings was obtained. The bonding conditions were heat compression bonding from the FEP side at 350° C., 5 kg/cm 2 , and 5 seconds.

実施例 2 厚さ25μmのポリイミドフイルム上に融点が
305℃のPFAを10μm厚に塗着して接着フイルム
を作製した。この接着フイルムを用いて以下実施
例1と全く同様にして薄型半導体装置をつくつ
た。
Example 2 Melting point on a 25 μm thick polyimide film
An adhesive film was prepared by applying PFA at 305°C to a thickness of 10 μm. Using this adhesive film, a thin semiconductor device was fabricated in exactly the same manner as in Example 1.

実施例 3 厚さ25μmのポリイミドフイルム上に融点が
260℃のETFEを10μm厚に塗着して接着フイルム
を作製した。この接着フイルムを用いて以下実施
例1と全く同様にして薄型半導体装置をつくつ
た。
Example 3 Melting point on a 25 μm thick polyimide film
An adhesive film was prepared by applying ETFE at 260°C to a thickness of 10 μm. Using this adhesive film, a thin semiconductor device was fabricated in exactly the same manner as in Example 1.

上記実施例1〜3より明らかなように、この発
明によれば電卓、カードなどに有用な薄型半導体
装置を作業容易に製造できるものであることが判
る。
As is clear from the above Examples 1 to 3, it can be seen that according to the present invention, thin semiconductor devices useful for calculators, cards, etc. can be easily manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

図面はこの発明の薄型半導体装置の一例を示す
要部断面図である。 1……印刷回路板、2……スルーホール、3,
4……接着フイルム、3a,4a……耐熱性フイ
ルム、3b,4b……融着剤、5……半導体素
子。
The drawing is a sectional view of a main part showing an example of a thin semiconductor device of the present invention. 1...Printed circuit board, 2...Through hole, 3,
4... Adhesive film, 3a, 4a... Heat resistant film, 3b, 4b... Fusion adhesive, 5... Semiconductor element.

Claims (1)

【特許請求の範囲】 1 ポリイミド系フイルムからなる耐熱性フイル
ムに融点200〜320℃のフツ素系ポリマーからなる
熱可塑性樹脂を融着剤として塗工してなる2枚の
接着フイルム間に、スルーホールを有する印刷回
路板および上記のスルーホール内に設けられた半
導体素子を介在させて上記両接着フイルムで上記
回路板を被覆するとともに上記素子を封止したこ
とを特徴とする薄型半導体装置。 2 フツ素系ポリマーがパーフルオロアルケンな
いしパーフルオロビニルエーテルのホモポリマー
またはコポリマーからなる特許請求の範囲第1項
記載の薄型半導体装置。
[Claims] 1. A heat-resistant film made of a polyimide film coated with a thermoplastic resin made of a fluorine-based polymer having a melting point of 200 to 320°C as a fusion agent. 1. A thin semiconductor device comprising: a printed circuit board having a hole; and a semiconductor element provided in the through hole; the circuit board is covered with both of the adhesive films, and the element is sealed. 2. The thin semiconductor device according to claim 1, wherein the fluorine-based polymer is a homopolymer or copolymer of perfluoroalkene or perfluorovinyl ether.
JP58185744A 1983-10-03 1983-10-03 Thin type semiconductor device Granted JPS6076146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58185744A JPS6076146A (en) 1983-10-03 1983-10-03 Thin type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58185744A JPS6076146A (en) 1983-10-03 1983-10-03 Thin type semiconductor device

Publications (2)

Publication Number Publication Date
JPS6076146A JPS6076146A (en) 1985-04-30
JPS648467B2 true JPS648467B2 (en) 1989-02-14

Family

ID=16176095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58185744A Granted JPS6076146A (en) 1983-10-03 1983-10-03 Thin type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6076146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01141153A (en) * 1987-11-26 1989-06-02 Kato Seisakusho:Kk X-type outrigger device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0832492B2 (en) * 1988-10-18 1996-03-29 セイコーエプソン株式会社 IC card manufacturing method
CN1079053C (en) * 1996-06-17 2002-02-13 三菱电机株式会社 Method for producing thin IC cards and construction thereof
US6207004B1 (en) 1996-06-17 2001-03-27 Mitsubishi Denki Kabushiki Kaisha Method for producing thin IC cards and construction thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379379A (en) * 1976-12-24 1978-07-13 Hitachi Ltd Production of semiconductor and divice for the same
JPS5543871A (en) * 1978-09-22 1980-03-27 Casio Comput Co Ltd Packaging of semiconductor device
US4293706A (en) * 1980-06-19 1981-10-06 Ppg Industries, Inc. Preparation of N-benzyloxycarbonyl aspartic acid

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01141153A (en) * 1987-11-26 1989-06-02 Kato Seisakusho:Kk X-type outrigger device

Also Published As

Publication number Publication date
JPS6076146A (en) 1985-04-30

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