JPS6477954A - Package for semiconductor element - Google Patents

Package for semiconductor element

Info

Publication number
JPS6477954A
JPS6477954A JP23552787A JP23552787A JPS6477954A JP S6477954 A JPS6477954 A JP S6477954A JP 23552787 A JP23552787 A JP 23552787A JP 23552787 A JP23552787 A JP 23552787A JP S6477954 A JPS6477954 A JP S6477954A
Authority
JP
Japan
Prior art keywords
chip
micro
tips
packaging
pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23552787A
Other languages
Japanese (ja)
Inventor
Akio Murase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23552787A priority Critical patent/JPS6477954A/en
Publication of JPS6477954A publication Critical patent/JPS6477954A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To facilitate mounting and dismantling, and to attain high density packaging by engaging a chip with a pocket section for a member through hermetic seal by filling a sealing medium and projecting the tip of a micro-pin directly attached to the chip to the outside. CONSTITUTION:A chip 4 with which micro-pins 5 are joined through direct attachment is fixed to a pocket section 2 for a member 1 formed by an insulating material such as a ceramic material. Joining tips 5A at one tips are held by a sealing medium 6, and tips 5B are shaped so as to be projected to an opening 3. According to such constitution, the micro-pins 5 can be formed to the whole surface of one surface of the chip 4. A large number of the chips 4 can be juxtaposed by being brought near on packaging, thus improving packaging efficiency.
JP23552787A 1987-09-18 1987-09-18 Package for semiconductor element Pending JPS6477954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23552787A JPS6477954A (en) 1987-09-18 1987-09-18 Package for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23552787A JPS6477954A (en) 1987-09-18 1987-09-18 Package for semiconductor element

Publications (1)

Publication Number Publication Date
JPS6477954A true JPS6477954A (en) 1989-03-23

Family

ID=16987295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23552787A Pending JPS6477954A (en) 1987-09-18 1987-09-18 Package for semiconductor element

Country Status (1)

Country Link
JP (1) JPS6477954A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6586845B1 (en) 1998-10-28 2003-07-01 Shinko Electric Industries Co., Ltd. Semiconductor device module and a part thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6586845B1 (en) 1998-10-28 2003-07-01 Shinko Electric Industries Co., Ltd. Semiconductor device module and a part thereof

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