JPS6477949A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6477949A
JPS6477949A JP62235528A JP23552887A JPS6477949A JP S6477949 A JPS6477949 A JP S6477949A JP 62235528 A JP62235528 A JP 62235528A JP 23552887 A JP23552887 A JP 23552887A JP S6477949 A JPS6477949 A JP S6477949A
Authority
JP
Japan
Prior art keywords
film
oxygen
vacuum
barrier
torr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62235528A
Other languages
Japanese (ja)
Inventor
Hitoshi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62235528A priority Critical patent/JPS6477949A/en
Publication of JPS6477949A publication Critical patent/JPS6477949A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Abstract

PURPOSE:To limit intrusion into Ni evaporated particles of moisture, oxygen, etc., and to form an excellent Ni film by bringing the partial pressure of oxygen in a vacuum vessel at a time when the Ni film as an uppermost layer in a barrier metallic film is deposited in a vacuum of 1X10<-4>Torr or below. CONSTITUTION:An aluminum pad 12 is shaped onto an Si substrate 11, and a PSG film 13 is formed as a protective insulating film with a bump contact window. Ti as the lower layer of a barrier metallic film 14 is grown onto the semiconductor substrate 11 with the bump contact window through a vacuum deposition method to shape a Ti film 14a, Cu is grown continuously, and a Cu film 14b is formed. Ni constituting an uppermost layer in the metallic film 14 is grown continuously, and an Ni film 14c is shaped. The degree of vacuum is adjusted so that PO2-1X10<-4>Torr holds in the partial pressure PO2 of oxygen in a vacuum vessel at that time. Accordingly, intrusion to Ni evaporated particles of moisture, oxygen, etc., having an adverse effect on the adhesive properties of a plating metal forming a bump 16 and the Ni film 14c and barrier properties can be limited.
JP62235528A 1987-09-18 1987-09-18 Manufacture of semiconductor device Pending JPS6477949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62235528A JPS6477949A (en) 1987-09-18 1987-09-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62235528A JPS6477949A (en) 1987-09-18 1987-09-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6477949A true JPS6477949A (en) 1989-03-23

Family

ID=16987309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62235528A Pending JPS6477949A (en) 1987-09-18 1987-09-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6477949A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100386081B1 (en) * 2000-01-05 2003-06-09 주식회사 하이닉스반도체 Semiconductor package and fabricating method thereof
JP2006005322A (en) * 2004-05-18 2006-01-05 Sony Corp Part mounting wiring board and method for mounting part to wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100386081B1 (en) * 2000-01-05 2003-06-09 주식회사 하이닉스반도체 Semiconductor package and fabricating method thereof
JP2006005322A (en) * 2004-05-18 2006-01-05 Sony Corp Part mounting wiring board and method for mounting part to wiring board

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