JPS6472558A - Iii-v compound semiconductor device - Google Patents
Iii-v compound semiconductor deviceInfo
- Publication number
- JPS6472558A JPS6472558A JP62229246A JP22924687A JPS6472558A JP S6472558 A JPS6472558 A JP S6472558A JP 62229246 A JP62229246 A JP 62229246A JP 22924687 A JP22924687 A JP 22924687A JP S6472558 A JPS6472558 A JP S6472558A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- laminated
- electrode
- iii
- compound semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H01L2924/01014—Silicon [Si]
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- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
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- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H01L2924/01028—Nickel [Ni]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Abstract
PURPOSE:To obtain a bonding pad which can be favorably wire bonded even through a heat treatment process after an electrode metal layer is formed by sequentially laminating a thin Mo film layer and an Au layer, or Al layer, on an electrode layer which contains Au or a metal film containing Au as a main ingredient, formed on a III-V compound semiconductor substrate. CONSTITUTION:A thin Mo film layer, an Au layer or an Al layer are sequentially laminated on electrode layers 7-9 which contain Au or a metal film containing Au as a main ingredient, formed on a III-V compound semiconductor substrate 1. For example, source, drain electrodes made of laminated Au-Ge/Ni/ Au metal layers, the lower layer electrode 4 of a capacitor and a gate electrode 5 of laminated Ti/Pt/Au are formed in a circuit in which a GaAs FET and the capacitor are connected in series. Then, an Si-N interlayer insulating film 6 is formed, Ti and Au thin films are further laminated, and wirings and upper electrodes 7, 8 and 9 of the capacitor are formed. Thereafter, after a protective film 10 made of Si-N is formed, a position to be bonded is opened, Mo/Au are laminated in the opening, and bonding pads 11, 12 are formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62229246A JPS6472558A (en) | 1987-09-11 | 1987-09-11 | Iii-v compound semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62229246A JPS6472558A (en) | 1987-09-11 | 1987-09-11 | Iii-v compound semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6472558A true JPS6472558A (en) | 1989-03-17 |
Family
ID=16889106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62229246A Pending JPS6472558A (en) | 1987-09-11 | 1987-09-11 | Iii-v compound semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6472558A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004036635A1 (en) * | 2002-10-15 | 2004-04-29 | Sumitomo Chemical Company, Limited | Production method for thin-film crystal wafer, semiconductor device using it and production method therefor |
US10361666B2 (en) | 2017-04-25 | 2019-07-23 | Murata Manufacturing Co., Ltd. | Semiconductor device and power amplifier module |
-
1987
- 1987-09-11 JP JP62229246A patent/JPS6472558A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004036635A1 (en) * | 2002-10-15 | 2004-04-29 | Sumitomo Chemical Company, Limited | Production method for thin-film crystal wafer, semiconductor device using it and production method therefor |
US10361666B2 (en) | 2017-04-25 | 2019-07-23 | Murata Manufacturing Co., Ltd. | Semiconductor device and power amplifier module |
US10594271B2 (en) | 2017-04-25 | 2020-03-17 | Murata Manufacturing Co., Ltd. | Semiconductor device and power amplifier module |
US10903803B2 (en) | 2017-04-25 | 2021-01-26 | Murata Manufacturing Co., Ltd. | Semiconductor device and power amplifier module |
US11621678B2 (en) | 2017-04-25 | 2023-04-04 | Murata Manufacturing Co., Ltd. | Semiconductor device and power amplifier module |
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