JPS6472302A - Sound recording equalizer circuit - Google Patents
Sound recording equalizer circuitInfo
- Publication number
- JPS6472302A JPS6472302A JP22914987A JP22914987A JPS6472302A JP S6472302 A JPS6472302 A JP S6472302A JP 22914987 A JP22914987 A JP 22914987A JP 22914987 A JP22914987 A JP 22914987A JP S6472302 A JPS6472302 A JP S6472302A
- Authority
- JP
- Japan
- Prior art keywords
- pass filter
- low
- band
- output
- integration circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE:To facilitate the IC-conversion, and to prevent inductive noise by connecting in parallel a band-pass filter, a low-pass filter and a high-pass filter, executing a compensation of a high frequency by the band-pass filter and determining a characteristic of a middle frequency by the low-pass filter and the high-pass filter. CONSTITUTION:The titled circuit is provided with a band-pass filter 31 formed by being connected so that an output of a first integration circuit 8 is supplied to an input side of a second integration circuit 13, and also, each output of the first and second integration circuits 8, 13 is brought to negative feedback to an input side of the first integration circuit 8, a low-pass filter 33 formed by being connected so that an output of a third integration circuit 17 is brought to negative feedback to its input side, and a high-pass filter 34 formed by being connected so that an output of its low-pass filter 33 is subtracted from an input to the low-pass filter 33. In this state, the compensation of a high frequency is executed by the band-pass filter 31, and a characteristic of a middle frequency is determined by the low-pass filter 33 and the high-pass filter 34. In such a way, the IC-conversion is facilitated, and the inductive noise can be eliminated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22914987A JP2663453B2 (en) | 1987-09-11 | 1987-09-11 | Recording equalizer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22914987A JP2663453B2 (en) | 1987-09-11 | 1987-09-11 | Recording equalizer circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6472302A true JPS6472302A (en) | 1989-03-17 |
JP2663453B2 JP2663453B2 (en) | 1997-10-15 |
Family
ID=16887540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22914987A Expired - Lifetime JP2663453B2 (en) | 1987-09-11 | 1987-09-11 | Recording equalizer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2663453B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004084407A1 (en) * | 2003-03-17 | 2004-09-30 | Fujitsu Limited | Gain equalization device |
-
1987
- 1987-09-11 JP JP22914987A patent/JP2663453B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004084407A1 (en) * | 2003-03-17 | 2004-09-30 | Fujitsu Limited | Gain equalization device |
Also Published As
Publication number | Publication date |
---|---|
JP2663453B2 (en) | 1997-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term | ||
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080620 Year of fee payment: 11 |