JPS647140A - Address generating circuit - Google Patents

Address generating circuit

Info

Publication number
JPS647140A
JPS647140A JP16126987A JP16126987A JPS647140A JP S647140 A JPS647140 A JP S647140A JP 16126987 A JP16126987 A JP 16126987A JP 16126987 A JP16126987 A JP 16126987A JP S647140 A JPS647140 A JP S647140A
Authority
JP
Japan
Prior art keywords
address generating
memories
generating part
circuit
frame memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16126987A
Other languages
Japanese (ja)
Inventor
Seiki Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Broadcasting Corp
Original Assignee
Nippon Hoso Kyokai NHK
Japan Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Hoso Kyokai NHK, Japan Broadcasting Corp filed Critical Nippon Hoso Kyokai NHK
Priority to JP16126987A priority Critical patent/JPS647140A/en
Publication of JPS647140A publication Critical patent/JPS647140A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To flexibly cope with the change of a frame memory or the like by preliminarily writing the addresses, where decoded picture data should be written, on a RAM or a ROM hierarchically. CONSTITUTION:A decoder consists of a decoding circuit 10, an address generating part 20, a latch circuit 12, a writing circuit 13, a frame memory 12, and a timing generating circuit 14. The address generating part 20 is provided with an intra-block address generating part 21, which consists of memories 23 and 24, a counter circuits 25 and 26, and comparators 27 and 28, and a block address generating part 22. Address data is hierarchically stored on memories 23 and 24, and memories 23 and 24 are read out to quickly obtain address data. Contents of memories 23 and 24 are exchanged to cope with the change of constitution of the frame memory 2 or the like.
JP16126987A 1987-06-30 1987-06-30 Address generating circuit Pending JPS647140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16126987A JPS647140A (en) 1987-06-30 1987-06-30 Address generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16126987A JPS647140A (en) 1987-06-30 1987-06-30 Address generating circuit

Publications (1)

Publication Number Publication Date
JPS647140A true JPS647140A (en) 1989-01-11

Family

ID=15731895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16126987A Pending JPS647140A (en) 1987-06-30 1987-06-30 Address generating circuit

Country Status (1)

Country Link
JP (1) JPS647140A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391045A (en) * 1989-09-04 1991-04-16 Sharp Corp Address generating circuit for picture memory
JPH04237382A (en) * 1991-01-22 1992-08-25 Fujitsu Ltd Device and method for generating image address
US11918432B2 (en) 2006-04-20 2024-03-05 Sonendo, Inc. Apparatus and methods for treating root canals of teeth

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59178544A (en) * 1983-03-30 1984-10-09 Fujitsu Ltd Memory access circuit
JPS6198385A (en) * 1984-10-19 1986-05-16 三洋電機株式会社 Display controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59178544A (en) * 1983-03-30 1984-10-09 Fujitsu Ltd Memory access circuit
JPS6198385A (en) * 1984-10-19 1986-05-16 三洋電機株式会社 Display controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391045A (en) * 1989-09-04 1991-04-16 Sharp Corp Address generating circuit for picture memory
JPH04237382A (en) * 1991-01-22 1992-08-25 Fujitsu Ltd Device and method for generating image address
US11918432B2 (en) 2006-04-20 2024-03-05 Sonendo, Inc. Apparatus and methods for treating root canals of teeth

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