JPS6469039A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPS6469039A
JPS6469039A JP62226844A JP22684487A JPS6469039A JP S6469039 A JPS6469039 A JP S6469039A JP 62226844 A JP62226844 A JP 62226844A JP 22684487 A JP22684487 A JP 22684487A JP S6469039 A JPS6469039 A JP S6469039A
Authority
JP
Japan
Prior art keywords
resin
package
high insulating
contained
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62226844A
Other languages
Japanese (ja)
Inventor
Yuki Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62226844A priority Critical patent/JPS6469039A/en
Publication of JPS6469039A publication Critical patent/JPS6469039A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PURPOSE:To prevent the charging phenomenon of the surface of a package due to the rubbing of the surface of the package by composing the resin package of a conductive resin and forming a high insulating film between an internally sealed body and the resin package. CONSTITUTION:A resin package is constituted of a conductive resin 6, and high insulating films 7 are shaped among the resin package and metallic small- gage wires 4, a lead frame 3, a chip 2, a chip loading tab 1, etc., so that the resin package is not brought into contact directly with these parts. A material in which carbon is contained in a resin is used as a conductive resin material. When metal powder (such as Cu, etc.) is contained or even when the resin having conductivity itself is employed, the same effect can be expected. A polyimide resin coated before resin seal is used as the high insulating film, but it is not limited particularly when it has high insulating properties.
JP62226844A 1987-09-10 1987-09-10 Resin-sealed semiconductor device Pending JPS6469039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62226844A JPS6469039A (en) 1987-09-10 1987-09-10 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62226844A JPS6469039A (en) 1987-09-10 1987-09-10 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS6469039A true JPS6469039A (en) 1989-03-15

Family

ID=16851455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62226844A Pending JPS6469039A (en) 1987-09-10 1987-09-10 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS6469039A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5717232A (en) * 1993-07-27 1998-02-10 Kabushiki Kaisha Toshiba Semiconductor device sealed with molded resin
US5883439A (en) * 1996-03-19 1999-03-16 Nec Corporation Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer
US6107690A (en) * 1995-09-26 2000-08-22 Micron Technology, Inc. Coated semiconductor die/leadframe assembly and method for coating the assembly
US6331735B1 (en) * 1998-09-25 2001-12-18 Advanced Micro Devices, Inc. Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts
WO2023013146A1 (en) * 2021-08-03 2023-02-09 Ｔｏｗａ株式会社 Processing device and processed object manufacturing method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5717232A (en) * 1993-07-27 1998-02-10 Kabushiki Kaisha Toshiba Semiconductor device sealed with molded resin
US6107690A (en) * 1995-09-26 2000-08-22 Micron Technology, Inc. Coated semiconductor die/leadframe assembly and method for coating the assembly
US6445060B1 (en) 1995-09-26 2002-09-03 Micron Technology, Inc. Coated semiconductor die/leadframe assembly and method for coating the assembly
US5883439A (en) * 1996-03-19 1999-03-16 Nec Corporation Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer
US6331735B1 (en) * 1998-09-25 2001-12-18 Advanced Micro Devices, Inc. Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts
WO2023013146A1 (en) * 2021-08-03 2023-02-09 Ｔｏｗａ株式会社 Processing device and processed object manufacturing method

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