JPS6461046A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6461046A
JPS6461046A JP21941787A JP21941787A JPS6461046A JP S6461046 A JPS6461046 A JP S6461046A JP 21941787 A JP21941787 A JP 21941787A JP 21941787 A JP21941787 A JP 21941787A JP S6461046 A JPS6461046 A JP S6461046A
Authority
JP
Japan
Prior art keywords
electrodes
resistance value
layer
covering
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21941787A
Other languages
Japanese (ja)
Inventor
Kiyoshi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21941787A priority Critical patent/JPS6461046A/en
Publication of JPS6461046A publication Critical patent/JPS6461046A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802Resistors only

Abstract

PURPOSE:To regulate a resistance value to be high or low by covering a polycrystalline layer with a plurality of electrodes, and applying a potential difference between the electrodes to alter the resistivity of the layer. CONSTITUTION:Electrodes 7, 8 similarly cover between an electrode 5 (X terminal) and an electrode 6 (Y terminal) covering a polycrystalline silicon layer 3 to form polycrystalline silicon resistors 3a, 3b, 3c. 3 series resistors are formed between the electrodes 5 and 6 on the layer 3, and the resistance values are R1, R2, R3. A voltage of predetermined level is applied between the electrodes 7 and 8, the resistance value of the resistor 3b between the electrodes 7 and 8 is reduced by approx. one/hundredth or more, and the whole resistance value can be reduced to RXY R1+R3. Thus, the resistance value can be regulated to high or low value.
JP21941787A 1987-09-01 1987-09-01 Semiconductor device Pending JPS6461046A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21941787A JPS6461046A (en) 1987-09-01 1987-09-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21941787A JPS6461046A (en) 1987-09-01 1987-09-01 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6461046A true JPS6461046A (en) 1989-03-08

Family

ID=16735068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21941787A Pending JPS6461046A (en) 1987-09-01 1987-09-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6461046A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592006A (en) * 1994-05-13 1997-01-07 International Rectifier Corporation Gate resistor for IGBT
US6060760A (en) * 1997-08-13 2000-05-09 Tritech Microelectronics, Ltd. Optimal resistor network layout

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5685934A (en) * 1979-12-14 1981-07-13 Nippon Telegr & Teleph Corp <Ntt> Control signal generating circuit
JPS618965A (en) * 1984-06-22 1986-01-16 Nec Kansai Ltd Manufacture of semiconductor device
JPS6222470A (en) * 1985-07-23 1987-01-30 Nippon Denso Co Ltd Apparatus for trimming semiconductor circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5685934A (en) * 1979-12-14 1981-07-13 Nippon Telegr & Teleph Corp <Ntt> Control signal generating circuit
JPS618965A (en) * 1984-06-22 1986-01-16 Nec Kansai Ltd Manufacture of semiconductor device
JPS6222470A (en) * 1985-07-23 1987-01-30 Nippon Denso Co Ltd Apparatus for trimming semiconductor circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592006A (en) * 1994-05-13 1997-01-07 International Rectifier Corporation Gate resistor for IGBT
US6060760A (en) * 1997-08-13 2000-05-09 Tritech Microelectronics, Ltd. Optimal resistor network layout

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