JPS6460897A - Random access memory - Google Patents

Random access memory

Info

Publication number
JPS6460897A
JPS6460897A JP62218882A JP21888287A JPS6460897A JP S6460897 A JPS6460897 A JP S6460897A JP 62218882 A JP62218882 A JP 62218882A JP 21888287 A JP21888287 A JP 21888287A JP S6460897 A JPS6460897 A JP S6460897A
Authority
JP
Japan
Prior art keywords
cell
outside
data transfer
random access
access memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62218882A
Other languages
Japanese (ja)
Inventor
Kazutami Arimoto
Kiyohiro Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62218882A priority Critical patent/JPS6460897A/en
Publication of JPS6460897A publication Critical patent/JPS6460897A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To easily test a detecting and correcting cell such as a parity cell, etc., by providing a data transfer path establishing means, and establishing a data transfer path between the outside of a random access memory and the detecting and correcting cell based on control input from the outside. CONSTITUTION:A cell P for parity check is switched and connected to information data transfer paths 8a and 8b communicated to the outside of the random access memory by providing a data transfer path switching and connecting circuit 29. And the data transfer path is established between the cell P for parity check and the outside of the random access memory. Therefore, it is possible to perform the transfer of data between the outside by making access at random similarly as an information storing memory cell M. In such a way, it is possible to test the cell P for parity check with a simple procedure and in a short time.
JP62218882A 1987-08-31 1987-08-31 Random access memory Pending JPS6460897A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62218882A JPS6460897A (en) 1987-08-31 1987-08-31 Random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62218882A JPS6460897A (en) 1987-08-31 1987-08-31 Random access memory

Publications (1)

Publication Number Publication Date
JPS6460897A true JPS6460897A (en) 1989-03-07

Family

ID=16726783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62218882A Pending JPS6460897A (en) 1987-08-31 1987-08-31 Random access memory

Country Status (1)

Country Link
JP (1) JPS6460897A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100864035B1 (en) * 2001-11-22 2008-10-16 후지쯔 마이크로일렉트로닉스 가부시키가이샤 Memory circuit having parity cell array

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100864035B1 (en) * 2001-11-22 2008-10-16 후지쯔 마이크로일렉트로닉스 가부시키가이샤 Memory circuit having parity cell array

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