JPS6457716A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To miniaturize a CMOS by a method wherein a substrate, to which ions are implanted, is coated with a polycrystalline silicon layer, a window is bored only in a region requiring activation, the window is irradiated with beams having a wavelength shorter than the fundamental absorption end of silicon, and the region is heated and activated. CONSTITUTION:Inter-element isolation layers 3 composed of SiO2 and insulating layers 4 are formed onto an Si substrate 7. Ions are implanted, activation treatment is conducted and a diffusion layer is shaped previously in a diffusion layer 8 and ions are implanted beforehand in a diffusion layer 9 at that time. A poly Si layer is formed through a chemical vapor growth method using silane and hydrogen as a reaction gas, a window is bored to the section of the diffusion layer 9 through dry etching employing carbon tetrafluoride (CF4) and oxygen (O2) as an etchant, and the window is irradiated by an arc lamp in an N2 atmosphere, thus heating and activating the diffusion layer 9. The diffusion layer 9 is activated completely, and a poly Si layer 10 is removed through dry etching using CF4 and O2 as an etchant.