JPS6457535U - - Google Patents
Info
- Publication number
- JPS6457535U JPS6457535U JP15133387U JP15133387U JPS6457535U JP S6457535 U JPS6457535 U JP S6457535U JP 15133387 U JP15133387 U JP 15133387U JP 15133387 U JP15133387 U JP 15133387U JP S6457535 U JPS6457535 U JP S6457535U
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- storing
- comparing
- master
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Debugging And Monitoring (AREA)
Description
第1図は本考案の一実施例を示す端末装置の構
成図、第2図は本考案の実施例2を示す端末装置
の構成図である。
1……データ比較器、2……メモリ、3……メ
モリ、4……バス、5……制御信号線、6……ホ
スト、7……バス、8……バス、9……バス、1
0……制御信号線、11……画面、12……バス
、13……制御回路、14……制御信号線、15
……バス、16……バス、17……キーボードコ
ントローラ、18……キーボード、19……コン
ソールコントローラ、20……メモリ、21……
バス、22……制御信号線、23……端末、24
……通信回線、25……LED、26……制御信
号線。
FIG. 1 is a block diagram of a terminal device showing one embodiment of the present invention, and FIG. 2 is a block diagram of a terminal device showing a second embodiment of the present invention. 1... Data comparator, 2... Memory, 3... Memory, 4... Bus, 5... Control signal line, 6... Host, 7... Bus, 8... Bus, 9... Bus, 1
0... Control signal line, 11... Screen, 12... Bus, 13... Control circuit, 14... Control signal line, 15
... bus, 16 ... bus, 17 ... keyboard controller, 18 ... keyboard, 19 ... console controller, 20 ... memory, 21 ...
Bus, 22... Control signal line, 23... Terminal, 24
...Communication line, 25...LED, 26...Control signal line.
Claims (1)
タ保存用のメモリと既に入力済みのマスタデータ
保存用のメモリ及び前記コンペアデータと前記マ
スタデータを比較するデータ比較器を有し、さら
に、前記マスタデータ保存用のメモリとコンペア
データ保存用のメモリ及びデータ比較器を制御す
る制御回路と制御信号を有し、マスタデータとコ
ンペアデータとを比較させる機能を備えたことを
特徴とする端末装置。 The terminal includes a memory for storing compare data displayed on the screen, a memory for storing already input master data, and a data comparator for comparing the compare data and the master data, and further includes a memory for storing the master data to be displayed on the screen, and a data comparator for comparing the compare data and the master data. 1. A terminal device comprising a memory for storing data, a memory for storing compared data, a control circuit and a control signal for controlling a data comparator, and a function for comparing master data and compared data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15133387U JPS6457535U (en) | 1987-10-01 | 1987-10-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15133387U JPS6457535U (en) | 1987-10-01 | 1987-10-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6457535U true JPS6457535U (en) | 1989-04-10 |
Family
ID=31425284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15133387U Pending JPS6457535U (en) | 1987-10-01 | 1987-10-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6457535U (en) |
-
1987
- 1987-10-01 JP JP15133387U patent/JPS6457535U/ja active Pending
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