JPS6376889U - - Google Patents
Info
- Publication number
- JPS6376889U JPS6376889U JP17047586U JP17047586U JPS6376889U JP S6376889 U JPS6376889 U JP S6376889U JP 17047586 U JP17047586 U JP 17047586U JP 17047586 U JP17047586 U JP 17047586U JP S6376889 U JPS6376889 U JP S6376889U
- Authority
- JP
- Japan
- Prior art keywords
- display
- crt
- address
- area
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
- 230000002457 bidirectional effect Effects 0.000 description 1
Description
第１図は本考案を実施した表示制御回路の構成
を表わすブロツク図、第２図は本考案の回路の動
作を説明するための図、第３図は従来の表示制御
回路の動作を表わすタイムチヤート、第４図は本
考案の表示制御回路の動作を表わすタイムチヤー
ト、第５図は従来の表示制御回路の構成を表わす
ブロツクである。
１……中央処理装置ＭＰＵ、２……メモリ、３
……ＣＲＴコントローラ、４……ライン・ポイン
タ、５……加算器、６，１２……セレクタ、７…
…リフレツシユ・メモリ、８……キヤラクタ・ジ
エネレータ、９……パラレル・シリアル変換器、
１０……表示装置、１１……双方向データ・バツ
フア、１３……ラツチ回路。
Figure 1 is a block diagram showing the configuration of a display control circuit implementing the present invention, Figure 2 is a diagram for explaining the operation of the circuit of the present invention, and Figure 3 is a time diagram showing the operation of a conventional display control circuit. FIG. 4 is a time chart showing the operation of the display control circuit of the present invention, and FIG. 5 is a block diagram showing the configuration of a conventional display control circuit. 1...Central processing unit MPU, 2...Memory, 3
...CRT controller, 4...Line pointer, 5...Adder, 6, 12...Selector, 7...
...Refresh memory, 8...Character generator, 9...Parallel-serial converter,
10...Display device, 11...Bidirectional data buffer, 13...Latch circuit.
Claims (1)
ＲＴコントローラと、編集表示を行なう際に表示
設定値が与えられるライン・ポインタと、全体を
制御する中央処理装置と、文字パターン、属性情
報を格納する表示用メモリとを有してＣＲＴ表示
動作を制御する表示制御回路において、前記表示
用メモリに一画面分の表示情報を格納する領域を
設け、前記中央処理装置からのアクセス・アドレ
スと前記ＣＲＴコントローラからの連続アドレス
と前記ＣＲＴコントローラと前記ライン・ポイン
タの出力よりなる表示アドレスを切り換えるセレ
クタと、このセレクタのアドレス出力のタイミン
グに応じて表示情報をラツチして前記表示用メモ
リの領域にこの表示情報を渡すラツチ回路とを有
する表示制御回路。 C that outputs continuous addresses for one CRT screen
The CRT display operation includes an RT controller, a line pointer to which display setting values are given when editing and displaying, a central processing unit that controls the entire system, and a display memory that stores character patterns and attribute information. In the display control circuit to be controlled, an area for storing display information for one screen is provided in the display memory, and an access address from the central processing unit, a continuous address from the CRT controller, and an area between the CRT controller and the line. A display control circuit comprising a selector that switches a display address formed by the output of a pointer, and a latch circuit that latches display information in accordance with the timing of address output of the selector and transfers the display information to an area of the display memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986170475U JPH0610392Y2 (en) | 1986-11-06 | 1986-11-06 | Display control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986170475U JPH0610392Y2 (en) | 1986-11-06 | 1986-11-06 | Display control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6376889U true JPS6376889U (en) | 1988-05-21 |
| JPH0610392Y2 JPH0610392Y2 (en) | 1994-03-16 |
Family
ID=31105240
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986170475U Expired - Lifetime JPH0610392Y2 (en) | 1986-11-06 | 1986-11-06 | Display control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0610392Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60257489A (en) * | 1984-06-01 | 1985-12-19 | 株式会社ピーエフユー | Display controller |
-
1986
- 1986-11-06 JP JP1986170475U patent/JPH0610392Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60257489A (en) * | 1984-06-01 | 1985-12-19 | 株式会社ピーエフユー | Display controller |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0610392Y2 (en) | 1994-03-16 |
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