JPS5811793U - graphic display device - Google Patents
graphic display deviceInfo
- Publication number
- JPS5811793U JPS5811793U JP10572981U JP10572981U JPS5811793U JP S5811793 U JPS5811793 U JP S5811793U JP 10572981 U JP10572981 U JP 10572981U JP 10572981 U JP10572981 U JP 10572981U JP S5811793 U JPS5811793 U JP S5811793U
- Authority
- JP
- Japan
- Prior art keywords
- display device
- graphic display
- refresh
- sections
- color
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Image Generation (AREA)
- Digital Computer Display Output (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案の二実施例を電気的接続図である。第
２図は、マスクパターンの一例を示す図である。第３図
は、重ね書き用マスク回路の具体的な電気回路の一実施
例を示す図である。
１・・・・・・ＣＰＵ、 ２・・・・・・高速図形発生
器、３・・・・・・重ね書き用マスク回路、４・・・・
・・コントロール回路、５〜７・・・・・・リフレッシ
ュメモリ、８・・・・・・ＣＲＴ。
１０・・・・・・色指定用レジスタ、１１・・・・・・
特定色計算回路、１２・・・・・・一致検出回路、Ｂ・
・・・・・システムバス。−FIG. 1 is an electrical connection diagram of two embodiments of the present invention. FIG. 2 is a diagram showing an example of a mask pattern. FIG. 3 is a diagram showing an example of a specific electric circuit of the overwriting mask circuit. 1...CPU, 2...High speed figure generator, 3...Mask circuit for overwriting, 4...
... Control circuit, 5 to 7 ... Refresh memory, 8 ... CRT. 10...Register for color specification, 11...
Specific color calculation circuit, 12... Match detection circuit, B.
...System bus. −
Claims (1)
容量ごとのセクションに分割し、これら分割されたセク
ションのそれぞれのドツトに特定の色を割り当て、割り
当てられたドツト位置に当該データが入力した時のみリ
フレッシュメモリにデータを書き込むようにした重ね書
き用マスク回路を具えたことを特徴とする図形表示装置
。Divide the refresh memory provided for each color into sections with a certain capacity, assign a specific color to each dot in these divided sections, and refresh only when the relevant data is input to the assigned dot position. A graphic display device comprising an overwriting mask circuit configured to write data into a memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10572981U JPS5811793U (en) | 1981-07-16 | 1981-07-16 | graphic display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10572981U JPS5811793U (en) | 1981-07-16 | 1981-07-16 | graphic display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5811793U true JPS5811793U (en) | 1983-01-25 |
| JPS6118549Y2 JPS6118549Y2 (en) | 1986-06-05 |
Family
ID=29900256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10572981U Granted JPS5811793U (en) | 1981-07-16 | 1981-07-16 | graphic display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5811793U (en) |
-
1981
- 1981-07-16 JP JP10572981U patent/JPS5811793U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6118549Y2 (en) | 1986-06-05 |
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