JPS645384Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Schmitt trigger circuit having a hysteresis function.

FIG. 1 shows an example of a conventional Schmitt trigger circuit. FIG. 2 shows the hysteresis characteristics of the circuit shown in FIG. 1, and the positive threshold level is represented by VT ₊ , and the negative threshold level is represented by _VT- .

Consider a case where, for example, a voltage waveform V1 shown in FIG. 4 is applied to the input terminal 1 in the circuit shown in FIG. Here, the waveform V3 is the voltage at the collector terminal 3 of the transistor Q1, the waveform V4 is the voltage at the common emitter terminal 4 of the two transistors, and the waveform V
5 represents the voltage at the output terminal 5. Also broken line 8
indicates the potential level of V _T+ in FIG. 2, and similarly, the broken line 9 indicates the potential level of V _T- .

Now, at time _tA , transistor Q1 is in a non-conducting state (hereinafter referred to as OFF), and transistor Q2
is in a conductive state (hereinafter referred to as ON), and output 5 indicates a low level.

Thereafter, the input voltage V1 gradually increases, and when V1 reaches V _T+ at time t _B , the transistor Q1
When the base current begins to flow and the collector voltage V3 begins to decrease, the base current and emitter current of the transistor Q2 decrease. Then, the voltage V4 of 4 also decreases, which causes the transistor Q2 to be turned off rapidly.
I can't turn it off. Thereafter, the transistor Q1 is turned on, the transistor Q2 is turned off, and the output 5 shows a high level at time _tC .

Transistor Q1 is ON between time t _C and t _D
Transistor Q2 remains OFF and output 5
maintains a high level. In this state, the voltage V
3 and V4 are lower than the values at _tA .

When the input voltage V1 gradually decreases and reaches V _T- at time _tD , the base current of the transistor Q1 decreases and the voltage V3 increases. Then, the base current flows through the transistor Q2, and the emitter current also begins to flow, so that the voltage V4 also rises. Therefore, transistor Q2 cannot be turned on rapidly. After that, transistor Q1 turns OFF, transistor Q2 turns ON, and at time t _E , the output is 5.
indicates a low level.

As mentioned above, in the conventional Schmitt trigger circuit, as shown in Figure 4, the voltages V3 and V4 at terminals 3 and 4 follow each other and change, resulting in slow rise and fall times of transistor Q2. However, there were significant drawbacks to the high speed of the circuit.

An object of the present invention is to provide a Schmitt trigger circuit which eliminates these drawbacks and is capable of high-speed operation.

The shmitt trigger circuit according to the present invention is characterized in that, in the shmitt trigger circuit including two transistors whose emitters are commonly connected, a capacitor is inserted in parallel with a resistor connected between the common emitter and the lowest potential. do.

FIG. 3 is a circuit connection diagram of a Schmitt trigger circuit showing an embodiment of the present invention. A capacitor C is inserted in parallel with the resistor R4.

Consider the case where the same waveform V1' as the input waveform V1 in FIG. 4 is applied to this circuit as shown in FIG. Here, voltage waveforms V3', V4',
V5' corresponds to V3, V4, and V5 of the waveform in FIG. 4, respectively.

In FIG. 5, from time _tA to time _tB , irrespective of the waveform in FIG. 4, the transistor Q1 is in a stable state of OFF and transistor Q2 is ON, and the output 5 maintains a low level.

At time _tB , the input voltage V1' reaches V _T+ , and when the base current flows through the transistor Q1, V3' decreases, and the emitter current of the transistor Q2 also decreases, but because the capacitor C is discharged, the way V4' decreases is as follows. It becomes slower than the V4' waveform in Figure 4. Therefore, the potential difference between V3' and V4' decreases rapidly, transistor Q2 turns off instantly, and output 5 becomes high level at time t _C '. Therefore, the speed is increased by t' _C - t _C by capacitor C.

From time _t'C to _tD , the transistor Q1 is on and the transistor Q2 is off, in a stable state, and the output 5 maintains a high level.

When the input V1' reaches T _T- at time _tD , the base current of the transistor Q1 decreases, V3' increases, and the emitter current of the transistor Q2 begins to flow, as in FIG. However, since this emitter current is also used as a charging current for capacitor C, the voltage at V4' increases slowly. For that reason V
The potential difference between 3' and V4' suddenly increases, transistor Q2 turns on instantly, and output 5 changes at time t' _E
becomes a low level. Therefore, capacitor C has increased the spade by t' _E - t _E.

To explain this operation in more detail, first, Q
When Q1 is in the off state, Q2 is in the on state;
The collector current and base current of Q2 flow through the resistor R4, thereby determining the emitter potential. After that, when the input potential rises and exceeds the threshold value of Q1, Q1 starts to turn on. When Q1 starts to turn on, first the collector current of Q1 flows, which causes the base potential V3 of Q2 to fall. Therefore, the base current and collector current of Q2 decrease, and the emitter potential V4 decreases. However, by inserting the capacitor C in parallel with the emitter resistor R4 as in this embodiment, the electric charge of the capacitor C is discharged through the resistor R4, and the emitter potential decreases slowly. When the emitter potential decreases slowly, the collector potential V3 is affected by this, and the extent of the potential decrease becomes slow.
However, since the collector potential V3 has already become sufficiently low at this point, the base-emitter potential of Q2 has become low enough to turn off Q2, and as a result, the off speed of Q2 becomes faster. On the other hand, when Q1 changes from on to off and Q2 changes from off to on, Q1 begins to turn off first in response to the input signal, thereby increasing the collector potential of Q1. In response to this, base current begins to flow through Q2, and Q2 begins to turn on. However, since the base current first charges the capacitor C, the emitter potential rises slowly, the base-emitter potential difference becomes larger, and Q2 turns off more quickly. Here, capacitor C
By inserting Q1, the emitter potential changes slowly, which affects the collector potential, but since Q1 is turned on/off by the input signal before that, the collector potential changes first due to the emitter potential change. changes, and for this reason, by the time the effect of the potential drop at the emitter appears on the collector, the collector has already changed enough to decide whether to turn on or off Q2, so the on/off speed of Q2 becomes faster. That's why.

[Brief explanation of drawings]

Fig. 1 is a connection diagram of a conventional Schmitt trigger circuit. Fig. 2 is a diagram showing the hysteresis characteristics of the circuit shown in Fig. 1. Fig. 3 is a circuit connection diagram showing an embodiment of the present invention.
5 is a voltage waveform diagram for explaining the operation of a conventional Schmitt trigger circuit, and FIG. 5 is a voltage waveform diagram for explaining the operation of the Schmitt trigger circuit according to the present invention. Explanation of symbols, 1...Input terminal, 2...Base terminal of transistor Q1, 3...Transistor Q1
collector terminal, 4...transistors Q1 and Q
Emitter terminal of 2, 5...output terminal, 6...base terminal of transistor Q2, 7...power supply, GND
...Lowest potential, Q1, Q2...Transistor, R
1 to R6...Resistor, D...Diode, C...Capacitor, V1, V1'...Input 1 voltage waveform,
V3, V3'... Voltage waveform of terminal 3, V4, V
4'... Voltage waveform of terminal 4, V5, V5'... Voltage waveform of output 5, 8... Positive direction threshold level, 9... Negative direction threshold level.

Claims (1)

[Scope of utility model registration request] a first transistor whose base receives an input signal; a first resistor provided between the collector of the first transistor and one end of a power supply; and a connection between the first transistor and the first resistor. a second transistor having a base coupled to a point; a second resistor provided between a collector of the second transistor and one end of the power supply;
a third resistor provided between a common connection point of each emitter of the transistors and the other end of the power supply; and a third resistor provided between a common connection point of the emitters of the first and second transistors and the other end of the power supply. A Schmitt trigger circuit characterized in that it has a capacitor provided in parallel with the third resistor, and takes out an output from the collector of the second transistor.