JPS6447056U - - Google Patents

Info

Publication number
JPS6447056U
JPS6447056U JP14212287U JP14212287U JPS6447056U JP S6447056 U JPS6447056 U JP S6447056U JP 14212287 U JP14212287 U JP 14212287U JP 14212287 U JP14212287 U JP 14212287U JP S6447056 U JPS6447056 U JP S6447056U
Authority
JP
Japan
Prior art keywords
package
semiconductor device
utility
scope
arranged along
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14212287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14212287U priority Critical patent/JPS6447056U/ja
Publication of JPS6447056U publication Critical patent/JPS6447056U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Multi-Conductor Connections (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a及びbはそれぞれ本考案の第1の実施
例の側面図及び底面図、第2図及び第3図はそれ
ぞれ本考案の第2及び第3の実施例の底面図、第
4図a及びbはそれぞれ本考案の第4の実施例の
底面図及びその部分拡大図、第5図は従来のパツ
ケージの一例の側面図である。 1,1′…パツケージ基板、2a,2b,2c
…突起状部、3a,3b,3c,3′…リード線
、4…スリツト。
Figures 1a and b are side and bottom views of the first embodiment of the present invention, respectively; Figures 2 and 3 are bottom views of the second and third embodiments of the present invention, respectively; Figure 4; A and b are a bottom view and a partially enlarged view of the fourth embodiment of the present invention, respectively, and FIG. 5 is a side view of an example of a conventional package. 1, 1'...Package board, 2a, 2b, 2c
...Protrusions, 3a, 3b, 3c, 3'...Lead wires, 4...Slits.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パツケージの底面に突出た突起状部側面に沿つ
てアウターリードを配置したことを特徴とする半
導体装置。
A semiconductor device characterized in that an outer lead is arranged along a side surface of a protrusion protruding from the bottom of a package.
JP14212287U 1987-09-16 1987-09-16 Pending JPS6447056U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14212287U JPS6447056U (en) 1987-09-16 1987-09-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14212287U JPS6447056U (en) 1987-09-16 1987-09-16

Publications (1)

Publication Number Publication Date
JPS6447056U true JPS6447056U (en) 1989-03-23

Family

ID=31407799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14212287U Pending JPS6447056U (en) 1987-09-16 1987-09-16

Country Status (1)

Country Link
JP (1) JPS6447056U (en)

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