JPS6446292A - Memory refreshing device - Google Patents

Memory refreshing device

Info

Publication number
JPS6446292A
JPS6446292A JP62201369A JP20136987A JPS6446292A JP S6446292 A JPS6446292 A JP S6446292A JP 62201369 A JP62201369 A JP 62201369A JP 20136987 A JP20136987 A JP 20136987A JP S6446292 A JPS6446292 A JP S6446292A
Authority
JP
Japan
Prior art keywords
refreshing
bank
memory
memory access
execute
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62201369A
Other languages
Japanese (ja)
Inventor
Hideyuki Yano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62201369A priority Critical patent/JPS6446292A/en
Publication of JPS6446292A publication Critical patent/JPS6446292A/en
Pending legal-status Critical Current

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  • Dram (AREA)

Abstract

PURPOSE:To execute the high speed of a memory access by reducing the probability in which the memory access is held in abeyance because of a memory refreshing width. CONSTITUTION:Time supervising circuits to input respectively refreshing instructing signals fA and fB output signals gA and gB to OR gates 5A and 5B respectively. It is decided whether or not a prescribed time passes after the bank to refresh is previously refreshed and the bank is accessed and refreshed, and refreshing is executed. It is decided whether or not the bank is within the prescribed time from an instruction execution start in other bank, and the refreshing is executed. Consequently, in the bank, it can be avoided as much as possible that an access request and the refreshing collide. Thus, a memory refreshing device to execute the high speed of the memory access can be obtained.
JP62201369A 1987-08-12 1987-08-12 Memory refreshing device Pending JPS6446292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62201369A JPS6446292A (en) 1987-08-12 1987-08-12 Memory refreshing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62201369A JPS6446292A (en) 1987-08-12 1987-08-12 Memory refreshing device

Publications (1)

Publication Number Publication Date
JPS6446292A true JPS6446292A (en) 1989-02-20

Family

ID=16439919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62201369A Pending JPS6446292A (en) 1987-08-12 1987-08-12 Memory refreshing device

Country Status (1)

Country Link
JP (1) JPS6446292A (en)

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