JPS5227230A - Refresh control system of dynamic mos memory - Google Patents

Refresh control system of dynamic mos memory

Info

Publication number
JPS5227230A
JPS5227230A JP50103221A JP10322175A JPS5227230A JP S5227230 A JPS5227230 A JP S5227230A JP 50103221 A JP50103221 A JP 50103221A JP 10322175 A JP10322175 A JP 10322175A JP S5227230 A JPS5227230 A JP S5227230A
Authority
JP
Japan
Prior art keywords
control system
refresh control
mos memory
dynamic mos
dynamic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50103221A
Other languages
Japanese (ja)
Inventor
Masaaki Sakai
Koichi Saito
Miyoshi Kikuchi
Katsumi Miwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50103221A priority Critical patent/JPS5227230A/en
Publication of JPS5227230A publication Critical patent/JPS5227230A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:Reduce time required for refreshing as much as possible and improve overall operational speed.
JP50103221A 1975-08-25 1975-08-25 Refresh control system of dynamic mos memory Pending JPS5227230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50103221A JPS5227230A (en) 1975-08-25 1975-08-25 Refresh control system of dynamic mos memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50103221A JPS5227230A (en) 1975-08-25 1975-08-25 Refresh control system of dynamic mos memory

Publications (1)

Publication Number Publication Date
JPS5227230A true JPS5227230A (en) 1977-03-01

Family

ID=14348429

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50103221A Pending JPS5227230A (en) 1975-08-25 1975-08-25 Refresh control system of dynamic mos memory

Country Status (1)

Country Link
JP (1) JPS5227230A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5330237A (en) * 1976-09-01 1978-03-22 Hitachi Ltd Clock timing circuit for dynamic semiconductor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498146A (en) * 1972-05-10 1974-01-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498146A (en) * 1972-05-10 1974-01-24

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5330237A (en) * 1976-09-01 1978-03-22 Hitachi Ltd Clock timing circuit for dynamic semiconductor

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