JPS523346A - Memory control system - Google Patents
Memory control systemInfo
- Publication number
- JPS523346A JPS523346A JP50078941A JP7894175A JPS523346A JP S523346 A JPS523346 A JP S523346A JP 50078941 A JP50078941 A JP 50078941A JP 7894175 A JP7894175 A JP 7894175A JP S523346 A JPS523346 A JP S523346A
- Authority
- JP
- Japan
- Prior art keywords
- control system
- memory control
- memory
- volatil
- executing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:A memory control system capable of effecting control with a simplified circuit by executing with a common control system refresh operation and clear operation in a volatil memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50078941A JPS523346A (en) | 1975-06-24 | 1975-06-24 | Memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50078941A JPS523346A (en) | 1975-06-24 | 1975-06-24 | Memory control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS523346A true JPS523346A (en) | 1977-01-11 |
JPS5539076B2 JPS5539076B2 (en) | 1980-10-08 |
Family
ID=13675898
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50078941A Granted JPS523346A (en) | 1975-06-24 | 1975-06-24 | Memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS523346A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52103038U (en) * | 1976-02-02 | 1977-08-05 | ||
JPS56164421A (en) * | 1980-05-21 | 1981-12-17 | Mitsubishi Electric Corp | Operating processor |
-
1975
- 1975-06-24 JP JP50078941A patent/JPS523346A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52103038U (en) * | 1976-02-02 | 1977-08-05 | ||
JPS56164421A (en) * | 1980-05-21 | 1981-12-17 | Mitsubishi Electric Corp | Operating processor |
Also Published As
Publication number | Publication date |
---|---|
JPS5539076B2 (en) | 1980-10-08 |
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