JPS51136250A - Memory - Google Patents

Memory

Info

Publication number
JPS51136250A
JPS51136250A JP50059576A JP5957675A JPS51136250A JP S51136250 A JPS51136250 A JP S51136250A JP 50059576 A JP50059576 A JP 50059576A JP 5957675 A JP5957675 A JP 5957675A JP S51136250 A JPS51136250 A JP S51136250A
Authority
JP
Japan
Prior art keywords
memory
shift control
capacity expansion
simple integration
memory capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50059576A
Other languages
Japanese (ja)
Other versions
JPS5913119B2 (en
Inventor
Toshio Kashio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP50059576A priority Critical patent/JPS5913119B2/en
Publication of JPS51136250A publication Critical patent/JPS51136250A/en
Publication of JPS5913119B2 publication Critical patent/JPS5913119B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • G11C19/188Organisation of a multiplicity of shift registers, e.g. regeneration, timing or input-output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:Shift control memory with simple integration and memory capacity expansion.
JP50059576A 1975-05-21 1975-05-21 Storage device Expired JPS5913119B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50059576A JPS5913119B2 (en) 1975-05-21 1975-05-21 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50059576A JPS5913119B2 (en) 1975-05-21 1975-05-21 Storage device

Publications (2)

Publication Number Publication Date
JPS51136250A true JPS51136250A (en) 1976-11-25
JPS5913119B2 JPS5913119B2 (en) 1984-03-27

Family

ID=13117185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50059576A Expired JPS5913119B2 (en) 1975-05-21 1975-05-21 Storage device

Country Status (1)

Country Link
JP (1) JPS5913119B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121197A (en) * 1982-01-12 1983-07-19 Nippon Texas Instr Kk Storage device of mos shift register

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121197A (en) * 1982-01-12 1983-07-19 Nippon Texas Instr Kk Storage device of mos shift register
JPH0348597B2 (en) * 1982-01-12 1991-07-24 Nippon Tekisasu Insutsurumentsu Kk

Also Published As

Publication number Publication date
JPS5913119B2 (en) 1984-03-27

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