JPS56164421A - Operating processor - Google Patents

Operating processor

Info

Publication number
JPS56164421A
JPS56164421A JP6747180A JP6747180A JPS56164421A JP S56164421 A JPS56164421 A JP S56164421A JP 6747180 A JP6747180 A JP 6747180A JP 6747180 A JP6747180 A JP 6747180A JP S56164421 A JPS56164421 A JP S56164421A
Authority
JP
Japan
Prior art keywords
program
zero
temporary storage
memory
initial reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6747180A
Other languages
Japanese (ja)
Inventor
Mitsuaki Tanno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6747180A priority Critical patent/JPS56164421A/en
Publication of JPS56164421A publication Critical patent/JPS56164421A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To make small the processor with a simple circuit constitution, by applying the lower rank of data of a program memory to the address of a temporary storage directly, executing the program even during the reset period and constituting the reset circuit while keeping the input of the temporary storage to zero. CONSTITUTION:An initial reset signal is given to an initial reset terminal 30, then a storage circuit 2 is reset and output terminals 29a-29c are all kept at zero. Further, the output of an oscillator 1 is fed to a program counter 2, which keeps advancing even during the initial reset period. A program memory 3 outputs instructions to data lines 5a-5d sequentially. Further, during the initial reset period, the data input terminal 12 of a temporary storage memory is kept zero to write in zero to all the areas of the temporary storage memory used in the program in a memory 3. By releasing the initial reset signal after that, the operational processor starts a normal operation.
JP6747180A 1980-05-21 1980-05-21 Operating processor Pending JPS56164421A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6747180A JPS56164421A (en) 1980-05-21 1980-05-21 Operating processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6747180A JPS56164421A (en) 1980-05-21 1980-05-21 Operating processor

Publications (1)

Publication Number Publication Date
JPS56164421A true JPS56164421A (en) 1981-12-17

Family

ID=13345900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6747180A Pending JPS56164421A (en) 1980-05-21 1980-05-21 Operating processor

Country Status (1)

Country Link
JP (1) JPS56164421A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127226A (en) * 1981-12-19 1983-07-29 Fujitsu Ltd Clearing method for memory device
JPS63311551A (en) * 1987-06-15 1988-12-20 Fujitsu Ltd Memory initializing system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS523346A (en) * 1975-06-24 1977-01-11 Nec Corp Memory control system
JPS52132747A (en) * 1976-04-30 1977-11-07 Fuji Electric Co Ltd Memory media initial clear control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS523346A (en) * 1975-06-24 1977-01-11 Nec Corp Memory control system
JPS52132747A (en) * 1976-04-30 1977-11-07 Fuji Electric Co Ltd Memory media initial clear control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127226A (en) * 1981-12-19 1983-07-29 Fujitsu Ltd Clearing method for memory device
JPS63311551A (en) * 1987-06-15 1988-12-20 Fujitsu Ltd Memory initializing system

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