JPS523347A - Refresh control system in memory - Google Patents

Refresh control system in memory

Info

Publication number
JPS523347A
JPS523347A JP50079045A JP7904575A JPS523347A JP S523347 A JPS523347 A JP S523347A JP 50079045 A JP50079045 A JP 50079045A JP 7904575 A JP7904575 A JP 7904575A JP S523347 A JPS523347 A JP S523347A
Authority
JP
Japan
Prior art keywords
control system
refresh control
memory
type memory
dynamic type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50079045A
Other languages
Japanese (ja)
Other versions
JPS5518991B2 (en
Inventor
Toshio Ichige
Masamitsu Kobayashi
Kiyokatsu Iijima
Haruhiko Tsunoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP50079045A priority Critical patent/JPS523347A/en
Publication of JPS523347A publication Critical patent/JPS523347A/en
Publication of JPS5518991B2 publication Critical patent/JPS5518991B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:A refresh control system for dynamic type memory in common employed in plural memories.
JP50079045A 1975-06-24 1975-06-24 Refresh control system in memory Granted JPS523347A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50079045A JPS523347A (en) 1975-06-24 1975-06-24 Refresh control system in memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50079045A JPS523347A (en) 1975-06-24 1975-06-24 Refresh control system in memory

Publications (2)

Publication Number Publication Date
JPS523347A true JPS523347A (en) 1977-01-11
JPS5518991B2 JPS5518991B2 (en) 1980-05-22

Family

ID=13678923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50079045A Granted JPS523347A (en) 1975-06-24 1975-06-24 Refresh control system in memory

Country Status (1)

Country Link
JP (1) JPS523347A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0022819A1 (en) * 1979-01-08 1981-01-28 Ncr Corporation Control circuit for refreshing a dynamic memory
JPH02132697A (en) * 1988-11-11 1990-05-22 Matsushita Electric Ind Co Ltd Refresh delivery method for dynamic random access memory
JP2007035039A (en) * 2005-07-25 2007-02-08 Samsung Electronics Co Ltd Refresh control method in multiport dram and multiport memory system using this method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0022819A1 (en) * 1979-01-08 1981-01-28 Ncr Corporation Control circuit for refreshing a dynamic memory
EP0022819A4 (en) * 1979-01-08 1982-07-12 Ncr Corp Control circuit for refreshing a dynamic memory.
JPH02132697A (en) * 1988-11-11 1990-05-22 Matsushita Electric Ind Co Ltd Refresh delivery method for dynamic random access memory
JP2007035039A (en) * 2005-07-25 2007-02-08 Samsung Electronics Co Ltd Refresh control method in multiport dram and multiport memory system using this method
US8122188B2 (en) 2005-07-25 2012-02-21 Samsung Electronics Co., Ltd. Method of controlling refresh operation in multi-port DRAM and a memory system using the method

Also Published As

Publication number Publication date
JPS5518991B2 (en) 1980-05-22

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