JPS6444920A - Active matrix substrate - Google Patents
Active matrix substrateInfo
- Publication number
- JPS6444920A JPS6444920A JP62202705A JP20270587A JPS6444920A JP S6444920 A JPS6444920 A JP S6444920A JP 62202705 A JP62202705 A JP 62202705A JP 20270587 A JP20270587 A JP 20270587A JP S6444920 A JPS6444920 A JP S6444920A
- Authority
- JP
- Japan
- Prior art keywords
- patterned
- picture element
- electrodes
- layer
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
Abstract
PURPOSE:To enable display with high contrast and high quality at fine picture element pitches by forming layers which constitute data lines and layers which constitute picture element electrodes in such a manner as to have the layer disposition parted most in the thickness direction of a substrate. CONSTITUTION:A thin metallic film is deposited on the glass substrate 1 and the data lines 8 are patterned and formed. A CVD silicon oxide film and a thin metallic film are deposited as an inter-layer insulating film 13 thereon and gate electrodes 2 and timing lines 3 are patterned and formed. A gate insulating film 4 and a thin amorphous silicon film 5 are then patterned and formed. A transparent conductive film is further deposited thereon and the picture element electrodes 6 are patterned and formed. After contact holes 14 are opened, a thin metallic film is deposited and source electrodes 7 and drain electrodes 9 are patterned and formed. The layer which constitute the data lines and the layer which constitutes and picture element electrodes, therefore, has the layer disposition parted most in the thickness direction. The spacings between the data lines and the picture element electrodes are thereby narrowed in plane and the quantity of the light transmitting through said spacings is decreased and, therefore the display with the high contrast at a high density is enabled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62202705A JPS6444920A (en) | 1987-08-14 | 1987-08-14 | Active matrix substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62202705A JPS6444920A (en) | 1987-08-14 | 1987-08-14 | Active matrix substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6444920A true JPS6444920A (en) | 1989-02-17 |
Family
ID=16461790
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62202705A Pending JPS6444920A (en) | 1987-08-14 | 1987-08-14 | Active matrix substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6444920A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018078334A (en) * | 2012-08-10 | 2018-05-17 | 三星ディスプレイ株式會社Samsung Display Co.,Ltd. | Thin-film transistor substrate |
-
1987
- 1987-08-14 JP JP62202705A patent/JPS6444920A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018078334A (en) * | 2012-08-10 | 2018-05-17 | 三星ディスプレイ株式會社Samsung Display Co.,Ltd. | Thin-film transistor substrate |
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