JPS6444689A - Teletext receiver - Google Patents

Abstract

PURPOSE:To quicken the data display speed by providing a serial/parallel conversion means converting character information into a parallel data, a data storage means, a data write means, a data storage status detection means and a data readout means reading the stored data sequentially from the head. CONSTITUTION:First-into/first-out circuits (FIFO circuits) 33, 34 are provided and after character information sent as a serial data from a home use computer is converted into a parallel data by a serial/parallel conversion circuit 31, the result is stored in the FIFO circuit 33 or 34. When data of 34 bytes are stored in the FIFO circuit 33 or 34, a CPU 34 is interrupted and the stored data is fetched by the CPU 37. Thus, the CPU 37 has only to execute the fetch processing of data in the unit of bytes. Thus, the time bound for the CPU 37 by the data fetch processing is remarkably reduced in comparison with a conventional device where the data is subject to fetch processing in the unit of one byte.