JPS6444588A - Memory cartridge - Google Patents

Memory cartridge

Info

Publication number
JPS6444588A
JPS6444588A JP62199911A JP19991187A JPS6444588A JP S6444588 A JPS6444588 A JP S6444588A JP 62199911 A JP62199911 A JP 62199911A JP 19991187 A JP19991187 A JP 19991187A JP S6444588 A JPS6444588 A JP S6444588A
Authority
JP
Japan
Prior art keywords
address
memory
data
terminals
clock pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62199911A
Other languages
Japanese (ja)
Inventor
Kaoru Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Holdings Corp
Original Assignee
Fuji Photo Film Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Photo Film Co Ltd filed Critical Fuji Photo Film Co Ltd
Priority to JP62199911A priority Critical patent/JPS6444588A/en
Publication of JPS6444588A publication Critical patent/JPS6444588A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To use an input terminal in time division and to reduce the number of terminals by holding inputted address and data signals in respective latch circuits at the leading edge and trailing edge of a clock pulse. CONSTITUTION:In case of executing writing processing in a memory, characteristic data stored in a memory 2 of a memory cartridge 1 is read out at first. Then, a read/write signal R/W and a clock pulse phi are set to L levels. Since the address and data signals use terminals 13, 3C in common, the address signal is prevented from being sent to a data bus. At this time, the clock signal phiis raised and the address signal sent from a CPU 11 is latched by an address latch circuit 4 through the terminals 13, 3C. After a fixed time, data to be written in the memory 2 is outputted to a data bus, the clock pulse phi is decayed and latched by a data latch circuit 5 and written in the memory 2 on the basis of the address.
JP62199911A 1987-08-12 1987-08-12 Memory cartridge Pending JPS6444588A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62199911A JPS6444588A (en) 1987-08-12 1987-08-12 Memory cartridge

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62199911A JPS6444588A (en) 1987-08-12 1987-08-12 Memory cartridge

Publications (1)

Publication Number Publication Date
JPS6444588A true JPS6444588A (en) 1989-02-16

Family

ID=16415654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62199911A Pending JPS6444588A (en) 1987-08-12 1987-08-12 Memory cartridge

Country Status (1)

Country Link
JP (1) JPS6444588A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394354A (en) * 1989-09-07 1991-04-19 Canon Inc Ic card
JPH07182270A (en) * 1993-12-22 1995-07-21 Nec Corp Address/data multiplex-controllable rom internal circuit
JP2002045570A (en) * 2000-05-24 2002-02-12 Nintendo Co Ltd Game system and cartridge for game machine used therefor
JP2002049578A (en) * 2000-05-24 2002-02-15 Nintendo Co Ltd Information processor and storage device used for the same
EP1655142A1 (en) 2004-10-12 2006-05-10 Mitsubishi Paper Mills Limited Ink-jet recording material and method for preparing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54134934A (en) * 1978-04-12 1979-10-19 Toshiba Corp Semiconductor memory device
JPS5645227A (en) * 1979-09-18 1981-04-24 Kasatani Hatsujo Kk Die setter for press machine or the like

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54134934A (en) * 1978-04-12 1979-10-19 Toshiba Corp Semiconductor memory device
JPS5645227A (en) * 1979-09-18 1981-04-24 Kasatani Hatsujo Kk Die setter for press machine or the like

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394354A (en) * 1989-09-07 1991-04-19 Canon Inc Ic card
JPH07182270A (en) * 1993-12-22 1995-07-21 Nec Corp Address/data multiplex-controllable rom internal circuit
JP2002045570A (en) * 2000-05-24 2002-02-12 Nintendo Co Ltd Game system and cartridge for game machine used therefor
JP2002049578A (en) * 2000-05-24 2002-02-15 Nintendo Co Ltd Information processor and storage device used for the same
EP1655142A1 (en) 2004-10-12 2006-05-10 Mitsubishi Paper Mills Limited Ink-jet recording material and method for preparing the same

Similar Documents

Publication Publication Date Title
ATE24617T1 (en) DIRECT ACCESS STORAGE ARRANGEMENTS.
EP0327463A3 (en) Semiconductor memory device having function of generating write signal internally
JPS6488662A (en) Semiconductor memory
KR910015999A (en) Semiconductor memory device
JPS6444588A (en) Memory cartridge
KR920010624A (en) Semiconductor memory device
JPS54107228A (en) Memory circuit
JPS648580A (en) Memory device for electronic equipment
KR890008823A (en) Serial memory device
EP0809189B1 (en) Data latch for high-speed peripheral
JPS6446300A (en) Semiconductor memory
JPS57103547A (en) Bit word access circuit
CA1284388C (en) Time partitioned bus arrangement
JPS6431253A (en) Data transferring system
EP0496002A4 (en) Register circuit
JPS57174750A (en) Data processor
JPS5589985A (en) Semiconductor memory unit
JPS6476487A (en) Serial access memory
JPH04319597A (en) Initialization circuit for storage circuit
KR900006978A (en) Dynamic Memory
JPS56152028A (en) Interface circuit
KR870003510A (en) Memory connection state detection circuit
JPS5647979A (en) Decoding system
JPS6134795A (en) Read only memory
JPS57103531A (en) Memory controller