JPS6444025A - System for assembling semiconductor device - Google Patents

System for assembling semiconductor device

Info

Publication number
JPS6444025A
JPS6444025A JP20113387A JP20113387A JPS6444025A JP S6444025 A JPS6444025 A JP S6444025A JP 20113387 A JP20113387 A JP 20113387A JP 20113387 A JP20113387 A JP 20113387A JP S6444025 A JPS6444025 A JP S6444025A
Authority
JP
Japan
Prior art keywords
substrate
automatically
bonder
die
curing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20113387A
Other languages
Japanese (ja)
Other versions
JP2605725B2 (en
Inventor
Satoshi Uchikoba
Takeshi Osono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62201133A priority Critical patent/JP2605725B2/en
Publication of JPS6444025A publication Critical patent/JPS6444025A/en
Application granted granted Critical
Publication of JP2605725B2 publication Critical patent/JP2605725B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area

Abstract

PURPOSE:To shorten a leading time, to eliminate an insufficient curing, and to smoothly and efficiently assemble a semiconductor device by composing a die bonder, a die bonding paste curing furnace, an inspecting unit, a defective component container, a good component container and a wire bonder in in-line. CONSTITUTION:A die bonder 1 for automatically die bonding to a predetermined part of a substrate, a curing furnace 3 for curing the die bonded substrate automatically conveyed from the bonder 1, an inspecting unit 5 for automatically inspecting the presence or absence of a predetermined type of malfunction of the cured substrate automatically conveyed from the furnace, a defective component container 8 for automatically containing the substrate judged as being improper by the unit 5, a good component contained 10 for automatically containing the substrate judged as being good by the unit 5, and a wire bonder 11 of the good substrate are provided. Accordingly, according to this assembling system, since a series of processes to the wire bonding can be performed in in-line, an insufficient curing might not occur, energy-saving is performed, and a leading time can be shortened.
JP62201133A 1987-08-12 1987-08-12 Semiconductor device assembly system Expired - Fee Related JP2605725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62201133A JP2605725B2 (en) 1987-08-12 1987-08-12 Semiconductor device assembly system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62201133A JP2605725B2 (en) 1987-08-12 1987-08-12 Semiconductor device assembly system

Publications (2)

Publication Number Publication Date
JPS6444025A true JPS6444025A (en) 1989-02-16
JP2605725B2 JP2605725B2 (en) 1997-04-30

Family

ID=16435952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62201133A Expired - Fee Related JP2605725B2 (en) 1987-08-12 1987-08-12 Semiconductor device assembly system

Country Status (1)

Country Link
JP (1) JP2605725B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005026695A (en) * 2003-07-01 2005-01-27 Samsung Electronics Co Ltd Manufacturing equipment of inline integrated circuit chip package, and manufacturing method of integrated circuit chip package using the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5925234A (en) * 1982-08-03 1984-02-09 Toshiba Corp Assembly method for semiconductor
JPS59232430A (en) * 1983-06-16 1984-12-27 Nec Corp Apparatus for manufacturing semiconductor element
JPS61154041A (en) * 1984-12-26 1986-07-12 Toshiba Corp Fabricating apparatus of semiconductor
JPS61177732A (en) * 1985-02-01 1986-08-09 Hitachi Ltd Producer
JPS6220333A (en) * 1985-07-19 1987-01-28 Hitachi Ltd Semiconductor manufacturing equipment

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5925234A (en) * 1982-08-03 1984-02-09 Toshiba Corp Assembly method for semiconductor
JPS59232430A (en) * 1983-06-16 1984-12-27 Nec Corp Apparatus for manufacturing semiconductor element
JPS61154041A (en) * 1984-12-26 1986-07-12 Toshiba Corp Fabricating apparatus of semiconductor
JPS61177732A (en) * 1985-02-01 1986-08-09 Hitachi Ltd Producer
JPS6220333A (en) * 1985-07-19 1987-01-28 Hitachi Ltd Semiconductor manufacturing equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005026695A (en) * 2003-07-01 2005-01-27 Samsung Electronics Co Ltd Manufacturing equipment of inline integrated circuit chip package, and manufacturing method of integrated circuit chip package using the same

Also Published As

Publication number Publication date
JP2605725B2 (en) 1997-04-30

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees