JPS6439687A - Semiconductor circuit - Google Patents

Semiconductor circuit

Info

Publication number
JPS6439687A
JPS6439687A JP62086107A JP8610787A JPS6439687A JP S6439687 A JPS6439687 A JP S6439687A JP 62086107 A JP62086107 A JP 62086107A JP 8610787 A JP8610787 A JP 8610787A JP S6439687 A JPS6439687 A JP S6439687A
Authority
JP
Japan
Prior art keywords
inversion circuit
pulse signal
circuit
conductance
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62086107A
Other languages
Japanese (ja)
Other versions
JP2563796B2 (en
Inventor
Yoshihiko Okihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62086107A priority Critical patent/JP2563796B2/en
Publication of JPS6439687A publication Critical patent/JPS6439687A/en
Application granted granted Critical
Publication of JP2563796B2 publication Critical patent/JP2563796B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To surely obtain an amplifier and waveform-arranged pulse signal from a third inversion circuit, by delaying the output signal of a first inversion circuit, and inputting it to a second inversion circuit having two different decision levels. CONSTITUTION:A pulse signal is inverted at the first inversion circuit 3. A p-channel transistor pTrQ1 has conductance larger than that of an n-channel transistor nTrQ2. A delay circuit is formed with capacitors C1 and C2. The signal is inverted at the second inversion circuit 4, however, a Q21 is the driving Tr of the pTr which inputs the output of the third inversion circuit. An nTrQ4 has the conductance larger than that of pTrs Q3 and Q7. At the third inversion circuit 5, a pTrQ5 has the same conductance as that of an nTrQ6. By using a driving transistor which controls the decision level in the second inversion circuit 4, it is possible to surely amplify, waveform-arrange and transmit the pulse signal.
JP62086107A 1987-04-07 1987-04-07 Semiconductor circuit Expired - Lifetime JP2563796B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62086107A JP2563796B2 (en) 1987-04-07 1987-04-07 Semiconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62086107A JP2563796B2 (en) 1987-04-07 1987-04-07 Semiconductor circuit

Publications (2)

Publication Number Publication Date
JPS6439687A true JPS6439687A (en) 1989-02-09
JP2563796B2 JP2563796B2 (en) 1996-12-18

Family

ID=13877479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62086107A Expired - Lifetime JP2563796B2 (en) 1987-04-07 1987-04-07 Semiconductor circuit

Country Status (1)

Country Link
JP (1) JP2563796B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11239608B2 (en) 2020-02-06 2022-02-01 Panasonic Intellectual Property Management Co., Ltd. Information processing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11239608B2 (en) 2020-02-06 2022-02-01 Panasonic Intellectual Property Management Co., Ltd. Information processing device

Also Published As

Publication number Publication date
JP2563796B2 (en) 1996-12-18

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